Before:
The cache won't be disabled when XIP on psram. But during flash
erasing/programming, read data will be courrupt.
When XIP in psram is enabled, the image is not mapped to the cache so
usually there will be no flash access. The only way to read from flash
is via the driver or use mmap. The driver has protection during erasing,
while th mmap region not.
Now:
Mmap APIs provide a flag to make mmap->unmap region mutually exclusive
to flash erase/programming when XIP from psram. SPI Flash write APIs
will benefit from this. When the flag is used, no concurrent access to
mapped region will happen while writing; otherwise the cache will be
disable to avoid data corruption.
Most ESP-IDF APIs calls mmap with this flag. As for users calling
mmap-like APIs directly, they can choose whether to enable this by a
flag.
Closes https://github.com/espressif/esp-idf/issues/14897
ESP32-C6/H2 bootloaders <= v5.2.1 configure and lock PMP entries 3-4 as their
D-ROM region; a locked PMP entry cannot be reconfigured until CPU reset.
Commit 366e4ee944 ("Remove redundant PMP entry for ROM region") dropped the
D-ROM entry, and commit d4167fea60 (which also restructured C6/H2 PMP setup)
then renumbered the regions down, placing the application IRAM/DRAM split on
entries 3-4. On an already-deployed older bootloader those entries are locked,
so IRAM never gains execute permission and the chip resets before app_main()
(GitHub issue #18769).
Restore the separate (redundant) D-ROM PMP entry on indices 3-4 so the
application IRAM/DRAM split stays on entries 5-7, clear of the locked range.
This keeps newer applications bootable on older bootloaders.
Closes https://github.com/espressif/esp-idf/issues/18769
spinlock.h used #else to include riscv/rv_utils.h for all non-Xtensa
targets. On Linux host (neither __XTENSA__ nor __riscv defined), this
pulls in a non-existent header. Change to #elif __riscv, matching
esp_cpu.h's existing pattern.
fix(components): linux host-build failure fixes+ disable esp_tee in buildv2 + esp_hw_support and xtensa fixes (v6.1)
See merge request espressif/esp-idf!48919
Moved the linux spinlock.h stub into esp_hw_support/include/linux.
esp_hw_support's INCLUDE_DIRS already places include/linux before
include, so the correct include files are picked up for the linux
target.
- Drop the FreeRTOS-Kernel-SMP linux spinlock.h duplicate.
- rv_decode_test: use PRIV_REQUIRES esp_hw_support instead of
hardcoding component include paths.
- add ESP32-S31 debug probe LL, target IDs, capability macros, and GPIO signal mapping
- allow LP probe channels to configure four signal bytes while keeping 16 GPIO outputs
- add HP and LP probe read tests, including LP 32-bit read verification
- keep existing vbat LP probe usage aligned with the new LP channel behavior
1) Add support for MAC randomization in Active scan and connect
2) Add support for randomizaton of sequence numbers
3) Add support for randomization of dialog token for GAS frames
Xiao Xufeng
nilesh.kale
Jiang Jiang Jian
wuzhenghui
Sudeep Mohanty
JiangGuangMingandCursor
hebinglin
Si Bei Bei
yanzihan@espressif.com
morris
Aditi