Jiang Jiang Jian
d27b57156f
Merge branch 'feat/pm_components_ram_optimize_v6.0' into 'release/v6.0'
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feat(pm): pm components ram optimize (v6.0)
See merge request espressif/esp-idf!52426
2026-09-15 12:03:15 +08:00
morris
5383352582
Merge branch 'bugfix/uart_extra_current_consumption_in_sleep_v6.0' into 'release/v6.0'
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fix(uart): reduce current consumption in sleep mode (v6.0)
See merge request espressif/esp-idf!52347
2026-09-08 15:07:26 +08:00
morris
50642bc839
Merge branch 'feat/move_flash_120_out_from_experimental_v6.0' into 'release/v6.0'
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feat(flash): p4 flash 120MHz is no longer experimental feature (v6.0)
See merge request espressif/esp-idf!51699
2026-09-08 14:41:26 +08:00
Laukik Hase
ab5b29e52c
Merge branch 'fix/tee_reentrant_svc_and_non_det_sign_v6.0' into 'release/v6.0'
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feat(esp_tee): Backports to v6.0
See merge request espressif/esp-idf!52290
2026-09-07 10:10:44 +05:30
Song Ruo Jing
da21a60e82
fix(uart): reduce current consumption in sleep mode
2026-09-04 21:27:16 +08:00
wuzhenghui and Cursor
13e99fcfb0
fix(esp_hw_support): fix regdma link dump to print module number
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Co-authored-by: Cursor <cursoragent@cursor.com >
2026-09-04 18:38:15 +08:00
wuzhenghui
07bafcf856
feat(esp_hw_support): use dynamic memory allocation for retention module instances
2026-09-04 18:38:15 +08:00
wuzhenghui
6b3840e3e5
change(esp_hw_support): optimize sleep_phy retention static RAM cost
2026-09-04 18:38:15 +08:00
morris
17dabceecf
Merge branch 'fix/dualcore_branch_predictor_cache_race_v6.0' into 'release/v6.0'
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fix(spi_flash): disable branch prediction on the parked core during flash ops (v6.0)
See merge request espressif/esp-idf!52202
2026-09-04 17:57:09 +08:00
wuzhenghui
38493ef42a
change(esp_hw_support): optimize pmu_sleep RAM cost
2026-09-04 14:51:01 +08:00
wuzhenghui and Cursor
ddfaf24b06
change(esp_hw_support): optimize retention driver RAM cost
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Co-authored-by: Cursor <cursoragent@cursor.com >
2026-09-04 14:51:00 +08:00
Laukik Hase
8e34cc16cc
feat(esp_tee): Use CTR-DRBG for assisting random number generation in TEE
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- For ESP-TEE, fault-assert in `esp_random()` if the RNG is held in a
freeze state
2026-09-04 10:23:24 +05:30
Fu Hanxi
ddb9fd017c
ci: apply idf-ci 1.x
2026-09-03 20:24:50 +02:00
Jiang Jiang Jian
f6211328fe
Merge branch 'feat/c5_eco4_newlib_support_v6.0' into 'release/v6.0'
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change(esp_libc): use C5 ECO4 ROM newlib functions (v6.0)
See merge request espressif/esp-idf!51903
2026-09-03 19:53:38 +08:00
Roland Dobai
d6ccd2a7df
Merge branch 'feature/use_zcmp_by_default_v6.0' into 'release/v6.0'
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feat(build): add ZCMP workaround post-build check (v6.0)
See merge request espressif/esp-idf!51326
2026-09-03 09:36:29 +02:00
wuzhenghui
87e3dda66d
fix(spi_flash): integrate branch prediction control during cache operations
2026-08-31 10:43:20 +08:00
Marius Vikhammer and Cursor
7b89184536
change(esp_libc): use C5 ECO4 ROM newlib functions
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Co-authored-by: Cursor <cursoragent@cursor.com >
2026-08-21 10:12:44 +08:00
Jiang Jiang Jian
27515af469
Merge branch 'fix/fix_deepsleep_deadlock_if_threadsafe_claim_is_not_enabled_v6.0' into 'release/v6.0'
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fix(esp_hw_support): fix deepsleep deadlock if threadsafe claim is not enabled (v6.0)
See merge request espressif/esp-idf!51190
2026-08-20 20:45:23 +08:00
wuzhenghui
b5bd8395fc
fix(esp_hw_support): fix esp32p4 PVT clock lost
2026-08-19 11:50:48 +08:00
Armando (Dou Yiwen)
d6f4172d14
feat(flash): p4 flash 120MHz is no longer experimental feature
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Signed-off-by: Armando (Dou Yiwen) <douyiwen@espressif.com >
2026-08-14 02:33:11 +00:00
Armando (Dou Yiwen)
5af18cd40b
fix(mpll): fix mpll calibration fail bug
2026-08-12 13:33:08 +08:00
Alexey Lapshin
fbaf869fb9
feat(build): add RISC-V ZCMP post-link workaround check
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Validate linked RISC-V executables when
CONFIG_COMPILER_ENABLE_RISCV_ZCMP is enabled on affected chips.
Disassemble each function and reject mstatus.MIE clears that lack an
earlier mintthresh write of 0xff.
Handle csrrci, csrrw, and register-mask csrrc patterns while ignoring
csrrs. Add build-only coverage for valid and invalid sequences with
CMake v1 and v2.
Stop the hardware stack guard before switching stacks during restart,
and keep ZCMP disabled for TEE test apps that still require the
workaround.
2026-07-30 12:14:54 +07:00
wuzhenghui
8bcb658ec0
fix(esp_hw_support): fix deepsleep deadlock at s_phy_int_mux
2026-07-27 15:14:40 +08:00
wuzhenghui
5d528ee6d4
feat(esp_hw_support): fix esp32p4 PVT retention link
2026-07-17 16:24:05 +08:00
yanzihan@espressif.com
d6e6ee1dbb
feat(pvt): add en reset in pvt func for p4 on master
2026-07-17 16:23:53 +08:00
Jiang Jiang Jian
a89931243c
Merge branch 'bugfix/change_pvt_timer_target_param_backport_v6.0' into 'release/v6.0'
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feat(pvt): change pvt timer target & limit on release v6.0
See merge request espressif/esp-idf!50814
2026-07-17 16:13:16 +08:00
yanzihan@espressif.com
77effaabb2
feat(pvt): change pvt timer target & limit
2026-07-16 14:14:14 +08:00
wuzhenghui
68bb4a1c44
fix(esp_hw_support): disable esp32 livelock workaround before stall another core
2026-07-15 16:28:17 +08:00
wuzhenghui
8ff6ec32b0
fix(esp_hw_support): update memory pointer checks for SPM support
2026-07-10 12:38:47 +08:00
morris
db3825c799
Merge branch 'fix/spi_buslock_multi_dev_acq_release_issue_v6.0' into 'release/v6.0'
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fix(esp_hw_support): fixed spi buslock multi dev acq/release logic issue (v6.0)
See merge request espressif/esp-idf!49168
2026-07-07 14:53:55 +08:00
morris
f4af8b9335
Merge branch 'feature/dma2d_ppa_sleep_retention_support_v6.0' into 'release/v6.0'
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feat(ppa): add sleep retention support for DMA2D and PPA (v6.0)
See merge request espressif/esp-idf!50350
2026-07-07 10:35:38 +08:00
nilesh.kale
2f8960a8ed
fix(esp_hw_support): Keep D-ROM PMP entry so newer apps boot on old bootloaders
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ESP32-C6/H2 bootloaders <= v5.2.1 configure and lock PMP entries 3-4 as their
D-ROM region; a locked PMP entry cannot be reconfigured until CPU reset.
Commit 366e4ee944 ("Remove redundant PMP entry for ROM region") dropped the
D-ROM entry, and commit d4167fea60 (which also restructured C6/H2 PMP setup)
then renumbered the regions down, placing the application IRAM/DRAM split on
entries 3-4. On an already-deployed older bootloader those entries are locked,
so IRAM never gains execute permission and the chip resets before app_main()
(GitHub issue #18769 ).
Restore the separate (redundant) D-ROM PMP entry on indices 3-4 so the
application IRAM/DRAM split stays on entries 5-7, clear of the locked range.
This keeps newer applications bootable on older bootloaders.
Closes https://github.com/espressif/esp-idf/issues/18769
2026-07-03 20:57:18 +05:30
Song Ruo Jing
abe1d3ae48
feat(ppa): add sleep retention support for DMA2D and PPA
2026-07-03 21:57:39 +08:00
morris
1c04de442d
Merge branch 'feature/psram_halfsleep_mode_support_v6.0' into 'release/v6.0'
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feat(psram): allow PSRAM to enter halfsleep mode during light sleep (v6.0)
See merge request espressif/esp-idf!49759
2026-07-03 11:14:20 +08:00
hebinglin
7f67950e83
fix(esp_hw_support): fix LP core exception interrupt not being cleared
2026-06-29 16:27:05 +08:00
hebinglin
a764b5f222
fix(ulp): record wakeup causes before lp core request sleep
2026-06-29 16:25:56 +08:00
Jiang Jiang Jian
543395fb87
Merge branch 'fix/use_unilock_for_sleep_process_v6.0' into 'release/v6.0'
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fix(esp_hw_support): use same lock for lightsleep/deepsleep process (v6.0)
See merge request espressif/esp-idf!49847
2026-06-29 15:42:06 +08:00
Jiang Jiang Jian
87d6d58dc8
Merge branch 'fix/move_system_retention_to_esp_hw_support_v6.0' into 'release/v6.0'
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refactor(esp_hw_support): move system_periph_retention from soc to esp_hw_support (v6.0)
See merge request espressif/esp-idf!49750
2026-06-29 15:41:21 +08:00
wanckl
94831e429b
fix(esp_hw_support): fixed spi buslock multi dev acq/release logic issue
2026-06-29 15:41:15 +08:00
Jiang Jiang Jian
e3ef21aa13
Merge branch 'feat/support_usb_wakeup_v6.0' into 'release/v6.0'
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feat: support usb as wakeup source from light sleep (v6.0)
See merge request espressif/esp-idf!49502
2026-06-29 15:39:20 +08:00
Jiang Jiang Jian
e1b8106e92
Merge branch 'doc-fix_sleep_mode_doc_v6.0' into 'release/v6.0'
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docs(system): update GPIO wakeup section for clarity on EXT0 and EXT1 support (v6.0)
See merge request espressif/esp-idf!49113
2026-06-29 15:36:02 +08:00
wuzhenghui
44fc6c986f
fix(esp_hw_support): use same lock for lightsleep/deepsleep process
2026-06-22 11:26:25 +08:00
wuzhenghui
8950ee3cd9
fix(esp_hw_support): fix psram data corrupt after lightsleep if halfsleep is enabled
2026-06-18 11:50:42 +08:00
wuzhenghui
b7f8e676be
fix(esp_hw_support): adjust PSRAM half-sleep resume handling for CONFIG_SPIRAM_XIP_FROM_PSRAM
2026-06-18 11:50:42 +08:00
Song Ruo Jing
33ad4d358a
feat(psram): allow PSRAM to enter halfsleep mode during light sleep
2026-06-18 11:50:35 +08:00
wuzhenghui
c669729707
refactor(esp_hw_support): move system_periph_retention from soc to esp_hw_support
2026-06-17 12:18:57 +08:00
JiangGuangMing and Cursor
a90989cd6f
feat(usb): add usb wakeup from light sleep example
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Co-authored-by: Cursor <cursoragent@cursor.com >
2026-06-11 09:24:04 +08:00
JiangGuangMing and Cursor
e89a04d89e
feat(sleep/usb): support usb as wakeup source from light sleep
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Co-authored-by: Cursor <cursoragent@cursor.com >
2026-06-11 09:13:20 +08:00
Frantisek Hrbata
003e049ba8
fix(esp_hw_support): guard SPIRAM-dependent code with !BOOTLOADER_BUILD
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The bootloader subproject's full Kconfig discovery resolves CONFIG_SPIRAM=y
when the parent app has it enabled, even though esp_psram is not linked
into the bootloader (the CMake gate is
'if(NOT non_os_build) if(CONFIG_SPIRAM) idf_component_optional_requires(PRIVATE esp_psram)').
Shared sources in esp_hw_support that #include esp_psram private headers
or call esp_psram functions guarded only by '#if CONFIG_SPIRAM' then fail
to compile in the bootloader with
"fatal error: esp_private/esp_psram_extram.h: No such file or directory".
Mirror the CMake gate in source guards: every '#if CONFIG_SPIRAM' block in
a bootloader-compiled source that touches esp_psram becomes
'#if !BOOTLOADER_BUILD && CONFIG_SPIRAM'. The leaked CONFIG_SPIRAM value
in the bootloader's sdkconfig.h is then harmless because every dependent
block evaluates to false.
Sites updated:
- esp_memory_utils.c: include of esp_psram_extram.h and all
esp_psram_check_ptr_addr() call sites
- port/esp32{c5,c61,p4}/cpu_region_protect.c: include of
esp_psram_extram.h (inner SPIRAM_FETCH/RODATA/PRE_CONFIGURE blocks are
already inside outer !BOOTLOADER_BUILD guards)
Signed-off-by: Frantisek Hrbata <frantisek.hrbata@espressif.com >
2026-06-08 18:34:50 +08:00
yanzihan@espressif.com
c348f39ad4
feat(pvt): fix monitor en rst error in pvt func on v6.0
2026-06-04 17:36:20 +08:00