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4439 Commits

Author SHA1 Message Date
morris
ef6b7b742f refactor(lcdcam): move shared core clock setup to drivers 
Configure the shared LCDCAM core clock through guarded LCD and CAM LL APIs,
and unify LCD functional clock LL calls around group IDs across supported targets.

Co-authored-by: Cursor <cursoragent@cursor.com>
 2026-09-08 14:47:41 +08:00
Jiang Jiang Jian
9330c1c8b1 Merge branch 'feat/pm_components_ram_optimize_v6.1' into 'release/v6.1' 
feat(pm): pm components ram optimize (v6.1)

See merge request espressif/esp-idf!52425
 2026-09-04 23:30:35 +08:00
Konstantin Kondrashov
91458cf023 feat(efuse): Adds efuse ADC calibration support for ESP32S31 2026-09-04 14:06:59 +03:00
morris
28a4aaa1db Merge branch 'fix/psram-ecc-mspi-dma-align_v6.1' into 'release/v6.1' 
fix(mspi): handle PSRAM ECC DMA alignment across MSPI users (v6.1)

See merge request espressif/esp-idf!52363
 2026-09-04 18:48:05 +08:00
wuzhenghui
64f8bdd2e1 change(esp_hw_support): optimize retention driver RAM cost 2026-09-04 18:00:35 +08:00
Jiang Jiang Jian
59512efe9c Merge branch 'fix/use_conflict_cb_for_regi2c_when_regdma_rf_is_used_v6.1' into 'release/v6.1' 
feat(sleep): applied regi2c conflict process at regdma rf (6.1)

See merge request espressif/esp-idf!52411
 2026-09-04 17:17:09 +08:00
Jiang Jiang Jian
6d6facef39 Merge branch 'stub_bins_for_more_targets_v6.1' into 'release/v6.1' 
Increase OCD stub memory reservation from 8K to 12K and extend this feature to more targets (v6.1)

See merge request espressif/esp-idf!51534
 2026-09-04 15:55:25 +08:00
Jiang Jiang Jian
7b6e1a4ef6 Merge branch 'feat/support_esp32s31_clock_tree_management_v6.1' into 'release/v6.1' 
feat: support esp32s31 clock tree management (v6.1)

See merge request espressif/esp-idf!51205
 2026-09-04 15:45:46 +08:00
Jiang Jiang Jian
9c8d416346 Merge branch 'fix/update_trng_workflow_for_esp32s31_v6.1' into 'release/v6.1' 
fix(rng): fix esp_random failed beacuse do not enable RNG clock(v6.1)

See merge request espressif/esp-idf!52317
 2026-09-04 11:42:23 +08:00
cjin
df470e9dee feat(sleep): applied regi2c conflict process at regdma rf 2026-09-04 10:51:55 +08:00
cjin
275e34f318 fix(phy): added fe set freq reset to rf retention list 2026-09-04 10:27:25 +08:00
cjin
40dbcb9ea6 feat(phy): support retention module for phy FE retgisters 2026-09-04 10:27:25 +08:00
cjin
3c875310d1 feat(modem): add phy retention related api 2026-09-04 10:27:25 +08:00
cjin
506e3b30ed feat(sleep): add config SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY 2026-09-04 10:27:25 +08:00
cjin
639ae612ed feat(phy): rename sleep modem state to sleep phy 2026-09-04 10:27:25 +08:00
Jiang Jiang Jian
a4bbf950c8 Merge branch 'feat/enable_zcmp_for_c5_c61_v6.1' into 'release/v6.1' 
feat(soc): esp32c5, esp32c61: enable zc extensions (v6.1)

See merge request espressif/esp-idf!51525
 2026-09-03 20:41:23 +08:00
Chen Jichang
305d434bda feat(mspi): split dma and mspi alignment 2026-09-03 19:09:30 +08:00
gaoxu
0f2f24dca1 fix(rng): fix esp_random failed beacuse do not enable RNG clock 2026-09-03 16:02:59 +08:00
wuzhenghui
175cf9a521 feat(bootloader): use CPLL/4 as flash default 80M clock source 2026-09-02 19:20:15 +08:00
wuzhenghui
5f23a5646e change(hal): rename PLL_F80M to REF_80M for esp32s31 peripherals clock defination 2026-09-02 19:20:14 +08:00
wuzhenghui
f9428ecc1e feat(esp_hw_support): support esp32s31 clock tree management 2026-09-02 19:20:13 +08:00
morris
5005636662 Merge branch 'feat/support_rgb_lcd_dma2d_v6.1' into 'release/v6.1' 
feat(rgb_lcd): support draw bitmap using dma2d (v6.1)

See merge request espressif/esp-idf!51979
 2026-09-02 16:18:08 +08:00
Erhan Kurubas
ae0c69d9d8 feat(system): add OCD stub bin support for more targets 
Add SOC_DEBUG_HAVE_OCD_STUB_BINS for esp32c5, esp32c61, esp32h4,
esp32h21, esp32p4, and esp32s31. Update TEE linker scripts with
correct esp_tee_app_config offsets for the 0x3000 stub reservation
 2026-08-31 11:35:49 +08:00
Alexey Lapshin
da344a7d59 feat(soc): esp32c5, esp32c61: enable zc extensions 2026-08-31 11:35:35 +08:00
Jiang Jiang Jian
fe321e73c8 Merge branch 'feature/enable_zc_extension_for_esp32s31_v6.1' into 'release/v6.1' 
feat(soc): esp32s31 enable zc* extension (v6.1)

See merge request espressif/esp-idf!51324
 2026-08-31 11:25:39 +08:00
Jiang Jiang Jian
aa98c93718 Merge branch 'feat/optimize_for_esp32h4_light_sleep_ble_current_v6.1' into 'release/v6.1' 
Feat/optimize for esp32h4 light sleep ble current (6.1)

See merge request espressif/esp-idf!50789
 2026-08-31 11:11:41 +08:00
Jiang Jiang Jian
37ae031039 Merge branch 'feature/enable_zb_for_esp32p4_v6.1' into 'release/v6.1' 
feat(soc): enable zb* extensions for esp32p4 greater v3 (v6.1)

See merge request espressif/esp-idf!50778
 2026-08-31 11:09:40 +08:00
Jiang Jiang Jian
c5355945ae Merge branch 'fix/esp_idf_h4_pmu_icg_mapping_6.1' into 'release/v6.1' 
fix(esp_hw_support): pmu_icg_mapping define mistake(v6.1)

See merge request espressif/esp-idf!51912
 2026-08-31 10:56:22 +08:00
harshal.patil
0580cff0e4 change(esp_hw_support): harden the ESP32-S31 PSRAM region permissions 
Both PSRAM layouts were mapped as a single RWX window, so everything in external
RAM - the heap included - was executable.

PSRAM used as data only is now RW, and under XIP-from-PSRAM it is split per
section as ESP32-P4 does: .text RX, .rodata read-only, and the MMU-page
alignment gaps and the reclaimed heap RW, so neither is executable.

Both describe the layout that esp_psram_init() produces, and the entries are
locked, so - again as on ESP32-P4 - they are only narrowed when
CONFIG_SPIRAM_PRE_CONFIGURE_MEMORY_PROTECTION says that layout applies. Without
it the application owns the region and PSRAM stays RWX.

The per-section entries cost one PMP entry more than the 16 available, so the CPU
subsystem and peripheral windows are chained as TOR entries, taking one entry
instead of three.

soc.h is corrected against the S31 bus address map: the peripheral window base
was 1 MB too low, and the LP peripheral top, derived from a register base plus a
size rather than from the map, was 16 KB short. SOC_NON_CACHEABLE_OFFSET_FLASH
is added.
 2026-08-28 18:06:56 +05:30
nilesh.kale
8f3d9e7445 feat: enable cpu region protection for esp32s31 2026-08-28 18:06:56 +05:30
morris
43e6da1796 Merge branch 'refactor/dac_priv_dma_callbacks_v6.1' into 'release/v6.1' 
refactor(dac): move DMA interrupt handling behind dac_priv_dma callbacks (v6.1)

See merge request espressif/esp-idf!52150
 2026-08-28 10:15:29 +08:00
morris
b4f9033645 Merge branch 'feature/add_asrc_sleep_retention_v6.1' into 'release/v6.1' 
feat(asrc): Add sleep retention

See merge request espressif/esp-idf!51807
 2026-08-28 10:10:37 +08:00
Wang Meng Yang
33c6931f9e Merge branch 'docs/update_coexist_docs_v6.1' into 'release/v6.1' 
docs(coex): enable coexist docs for c61 h21 h4 s31 (v6.1)

See merge request espressif/esp-idf!51376
 2026-08-28 07:49:54 +08:00
Alexey Lapshin
9b554b76ae feat(soc): enable zb* extensions for esp32p4 greater v3 2026-08-27 22:48:54 +07:00
Hu Rui
f7dc7a638d refactor(dac): move DMA interrupt handling behind dac_priv_dma callbacks 2026-08-27 20:25:24 +08:00
morris
4afe3c8206 Merge branch 'fix/ci_h4_enable_spi_test_v6.1' into 'release/v6.1' 
fix(driver_spi): ci enable h4 generic test (v6.1)

See merge request espressif/esp-idf!51985
 2026-08-27 17:56:06 +08:00
morris
b9ebe95a44 Merge branch 'fix/fix_mpll_cali_flow_s31_v6.1' into 'release/v6.1' 
mpll: improved mpll calibration flow on s31 (v6.1)

See merge request espressif/esp-idf!52000
 2026-08-27 17:53:03 +08:00
Mahavir Jain
ead61fe10e Merge branch 'feat/update_documentation_and_cleanup_for_s31_v6.1' into 'release/v6.1' 
enable tests and cleanup JIRA references for s31 (v6.1)

See merge request espressif/esp-idf!50378
 2026-08-27 13:45:25 +05:30
Mahavir Jain
9058e758d7 Merge branch 'fix/disable-key-mgr_v6.1' into 'release/v6.1' 
Disable Key Manager support (v6.1)

See merge request espressif/esp-idf!51390
 2026-08-27 12:29:18 +05:30
nilesh.kale
256244e89a feat: enable tests and cleanup jira references for s31 2026-08-27 12:28:24 +05:30
Roland Dobai
26793ea144 Merge branch 'feat/enable_zb_extensions_for_s31_v6.1' into 'release/v6.1' 
feat(soc): enable zb* extensions for esp32s31 (v6.1)

See merge request espressif/esp-idf!51323
 2026-08-27 08:25:51 +02:00
harshal.patil
a827d27b12 change(security): disable Key Manager support on ESP32-C5/P4/S31 
The Key Manager hardware peripheral in its current form needs further
design changes before it can be offered as a production feature.
Until a revised peripheral design is available, withdraw ESP-IDF
support for it on all Key Manager capable targets.
 2026-08-26 13:23:56 +05:30
Armando (Dou Yiwen)
36fc263512 fix(mpll): improved mpll calibration flow on esp32s31 
Signed-off-by: Armando (Dou Yiwen) <douyiwen@espressif.com>
 2026-08-25 10:50:09 +08:00
wanckl
013abfbb11 fix(driver_spi): ci enable h4 generic test 2026-08-24 16:41:37 +08:00
Chen Jichang
c997b4b026 feat(rgb_lcd): support draw bitmap hook 2026-08-24 11:44:30 +08:00
hebinglin
6fab30ecb7 fix(esp_hw_support): pmu_icg_mapping define mistake 2026-08-20 17:39:08 +08:00
Ma Jing Jing
409e7b5012 feat(asrc): Add sleep retention 2026-08-17 15:13:04 +08:00
linruihao
b26969aaf6 docs(coex): enable coexist docs for c61 h21 h4 s31 2026-08-13 08:23:06 +08:00
Armando (Dou Yiwen)
569c22ea2b fix(mpll): fix mpll calibration fail bug 2026-08-12 13:22:22 +08:00
cjin
eefe1d8316 feat(modem_clock): added bt_apb module and separete bt_apb from bt_mac module 2026-08-03 20:25:15 +08:00