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4388 Commits

Author SHA1 Message Date
Armando (Dou Yiwen)
569c22ea2b fix(mpll): fix mpll calibration fail bug 2026-08-12 13:22:22 +08:00
Jiang Jiang Jian
fdf5ee1e93 Merge branch 'feat/optimize_for_esp32h4_light_sleep_ble_current_v6.1_new_chip_only' into 'release/v6.1' 
Feat/optimize for esp32h4 light sleep ble current v6.1 new chip only

See merge request espressif/esp-idf!51302
 2026-07-31 11:32:41 +08:00
Steven Yang
b597024afc feat(mcpwm): support RC_FAST group clock source 
Expose RC_FAST as a shared MCPWM group clock source for timers,
capture timers, and carriers on ESP32-C5, ESP32-C6, ESP32-H2,
and ESP32-P4. Fix the ESP32-S31 MCPWM clock selector mapping.

Add a hardware runtime test that verifies MCPWM Timer counting
resolution for every supported clock source.

(cherry picked from commit 8a982614a2)
 2026-07-30 16:38:14 +08:00
morris
6c0c836148 Merge branch 'feat/i2s_tx_sync_esp31s31_v6.1' into 'release/v6.1' 
feat(i2s): support TX FIFO sync (v6.1)

See merge request espressif/esp-idf!50338
 2026-07-30 10:20:49 +08:00
cjin
466097d370 feat(modem_clock): added bt_apb module and separete bt_apb from bt_mac module 2026-07-30 08:17:20 +08:00
morris
f955f05a43 Merge branch 'bugfix/uart_sw_flow_ctrl_xoff_char_v6.1' into 'release/v6.1' 
fix(uart): fix uart sw flow ctrl XOFF char write to wrong reg on ESP32C6 (v6.1)

See merge request espressif/esp-idf!50523
 2026-07-29 18:57:00 +08:00
Jiang Jiang Jian
e61a30edce Merge branch 'backport/support-esp32s31-dfu-v6.1' into 'release/v6.1' 
Feat/support esp32s31 dfu (v6.1)

See merge request espressif/esp-idf!50863
 2026-07-18 08:07:22 +08:00
Jiang Jiang Jian
e56f3d4c20 Merge branch 'fix/jpeg_enc_encrypt_v6.1' into 'release/v6.1' 
fix(jpeg): Jpeg can encode and decode in encryption situation (backport v6.1)

See merge request espressif/esp-idf!50662
 2026-07-17 15:57:07 +08:00
JiangGuangMing
a37b9efc90 feat: support esp32s31 dfu feature 2026-07-17 11:09:20 +08:00
Jiang Jiang Jian
07c65b3819 Merge branch 'feature/chip764_power_glitch_support_v6.1' into 'release/v6.1' 
feat(s31): bootloader power glitch reset config (v6.1)

See merge request espressif/esp-idf!50545
 2026-07-17 10:44:46 +08:00
hongshuqing
4ab85accea feat(pwr_glitch): chip764 power glitch reset config 2026-07-16 17:51:17 +08:00
hongshuqing
47009c5458 fix(vol): update dreg_1p1 and dreg_1p1_pvt in bootloader 2026-07-16 17:51:17 +08:00
igor.masar
f7e24571ea feat(soc): add USB DFU and OTG console caps 
Add USB DFU and OTG console SOC capability flags for esp32s2, esp32s3, and esp32p4.

Use these caps in Kconfig, documentation conditionals, and idf.py DFU actions so USB support
is derived from SOC capabilities instead of hardcoded target names.
 2026-07-16 12:16:11 +08:00
Jiang Jiang Jian
5595996fe8 Merge branch 'feat/update_pmu_pau_reg_description_v6.1' into 'release/v6.1' 
feat(soc): update esp32c61 PMU & PAU reg header descriptions (v6.1)

See merge request espressif/esp-idf!50431
 2026-07-16 11:28:44 +08:00
Jiang Jiang Jian
0e479cbf81 Merge branch 'bugfix/i2c_set_but_not_used_variable_v6.1' into 'release/v6.1' 
fix(i2c): remove unused but set variables (v6.1)

See merge request espressif/esp-idf!50370
 2026-07-16 10:48:53 +08:00
Jiang Jiang Jian
e813155ec4 Merge branch 'feature/dma2d_ppa_sleep_retention_support_v6.1' into 'release/v6.1' 
feat(ppa): add sleep retention support for DMA2D and PPA (v6.1)

See merge request espressif/esp-idf!50342
 2026-07-16 10:48:27 +08:00
Jiang Jiang Jian
b259c51ee3 Merge branch 'change/update_c61_gdma_header_v6.1' into 'release/v6.1' 
change(ahb_dma): update c61 eco3 header files (v6.1)

See merge request espressif/esp-idf!49835
 2026-07-16 10:38:55 +08:00
Song Ruo Jing
a59daff749 fix(uart): fix uart sw flow ctrl XOFF char write to wrong reg on ESP32C6 
Add software flow control test case

Introduced in e6ef4d1791

Closes https://github.com/espressif/esp-idf/issues/18779
 2026-07-15 16:45:39 +08:00
C.S.M
9adcf8677b feat(psram): Add unencrypted region for psram for esp32s31 2026-07-13 15:01:29 +08:00
Chen Chen
f44f4a82e6 feat(i2s): support TX FIFO sync on esp32s31 2026-07-13 14:43:55 +08:00
morris
a28640f417 fix(i2c): remove unused but set variables 2026-07-13 14:40:45 +08:00
wuzhenghui
c5ffc85029 feat(soc): update PMU & PAU register description 2026-07-06 21:20:58 +08:00
nilesh.kale
c9e90831b8 feat: enable AES GCM support for ESP32-S31 2026-07-06 15:08:38 +05:30
Chen Jichang
1b9d03fd10 change(ahb_dma): update c61 eco3 header files 2026-07-06 10:29:16 +08:00
Jiang Jiang Jian
d6d41b0215 Merge branch 'feat/support_esp32s31_icg_control_v6.1' into 'release/v6.1' 
feat(esp_hw_support): support PMU clock ICG management for esp32s31 (v6.1)

See merge request espressif/esp-idf!50107
 2026-07-03 21:45:42 +08:00
Song Ruo Jing
c8a4073e2b feat(ppa): add sleep retention support for DMA2D and PPA 2026-07-03 20:56:59 +08:00
Jiang Jiang Jian
88554f3551 Merge branch 'fix/backport_some_wifi_fixes_v6.1' into 'release/v6.1' 
fix(wifi): backport some wifi fixes to v6.1

See merge request espressif/esp-idf!50183
 2026-07-02 17:38:57 +08:00
Jiang Jiang Jian
cf515d20d7 Merge branch 'feat/support_usb_wakeup_v6.1' into 'release/v6.1' 
feat: support usb as wakeup source from light sleep (v6.1)

See merge request espressif/esp-idf!49497
 2026-06-30 19:40:33 +08:00
muhaidong
d7ac95f709 fix(coex): remove unsupported external coex soc caps 2026-06-30 14:52:19 +08:00
wuzhenghui
d5d3cddf23 feat(esp_hw_support): support PMU clock ICG management for esp32s31 2026-06-30 14:23:54 +08:00
Jiang Jiang Jian
d7053ae578 Merge branch 'fix/move_system_retention_to_esp_hw_support_v6.1' into 'release/v6.1' 
refactor(esp_hw_support): move system_periph_retention from soc to esp_hw_support (v6.1)

See merge request espressif/esp-idf!49749
 2026-06-30 14:14:08 +08:00
JiangGuangMing
4625335d93 feat(sleep/usb): support usb as wakeup source from light sleep 
Co-authored-by: Cursor <cursoragent@cursor.com>
 2026-06-29 16:08:35 +08:00
wuzhenghui
3ad4cfebd6 refactor(esp_hw_support): move system_periph_retention from soc to esp_hw_support 2026-06-17 12:17:19 +08:00
wuzhenghui
964511ca30 feat(soc): disable esp32s31 WFE feature at startup 2026-06-15 10:31:06 +08:00
wuzhenghui
ce0fcbaa9a feat(esp_system): support esp32s31 esp_perip_clk_init 2026-06-15 10:31:06 +08:00
sibeibei
f7a2fc94a6 feat(pm): select XTAL for HP dig_sysclk in modem state 
On ESP32-S31, SOC and modem APB are decoupled, so the digital
system can run from XTAL while the modem domain stays in modem state.
 2026-06-10 20:41:47 +08:00
sibeibei
9a3b0b5f02 update(pmu_sleep): enable SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED 2026-06-10 20:40:09 +08:00
sibeibei
32a7c32c25 bugfix(apm): workaround to clear apm related reg on S31 
Until full TEE/APM retention is supported (IDF-14620).
 2026-06-10 20:39:29 +08:00
sibeibei
d0434b0ddd change(esp_hw_support): enable wifi beacon wakeup and support wifi modem state for esp32s31 2026-06-10 20:39:21 +08:00
Mahavir Jain
3664bd2d7e Merge branch 'fix/disable_secure_boot_v2_ecdsa_v6.1' into 'release/v6.1' 
Fix/disable secure boot v2 ecdsa (v6.1)

See merge request espressif/esp-idf!49469
 2026-06-10 14:39:06 +05:30
Mahavir Jain
ab40e38287 Merge branch 'fix/remove_nonexistent_crypto_registers_c61_v6.1' into 'release/v6.1' 
Remove non-existent crypto registers (ESP32-C61) (v6.1)

See merge request espressif/esp-idf!49449
 2026-06-10 10:10:00 +05:30
Jiang Jiang Jian
895974c34d Merge branch 'feat/enable_sb_and_fe_support_for_esp32s31_v6.1' into 'release/v6.1' 
feat: enable Secure Boot, Flash Encryption and Key Manager support in ESP32S31 (v6.1)

See merge request espressif/esp-idf!49161
 2026-06-10 11:13:43 +08:00
Aditya Patwardhan
4f2f37ca69 change(secure_boot): mark ECDSA based Secure Boot V2 as insecure on affected SoCs 
ECDSA based Secure Boot V2 is not functional for certain input vectors on
ESP32-C5/C61/H2/P4 and on the preview targets ESP32-H4/H21. RSA based Secure
Boot V2 is the recommended scheme where the SoC supports it. This issue will be
fixed in a future hardware ECO revision; more details will be shared through the
hardware errata document.

A new hidden Kconfig option SECURE_BOOT_V2_ECDSA_INSECURE marks the affected
mass-production SoCs (ESP32-C5/C61/H2/P4). On these SoCs, when hardware Secure
Boot V2 is enabled, the ECDSA (V2) signing scheme is no longer offered by
default; it must be turned on explicitly via SECURE_BOOT_V2_FORCE_ENABLE_ECDSA
under "Allow potentially insecure options" (CONFIG_SECURE_BOOT_INSECURE). App
signing without hardware Secure Boot is not affected. Note that ESP32-C61 has no
RSA based Secure Boot V2, so it has no Secure Boot scheme enabled by default.

The preview targets ESP32-H4 and ESP32-H21 mark ECDSA Secure Boot V2 as not
supported in their SoC capabilities instead of using the option above. As
ESP32-H4 has no other Secure Boot V2 scheme, Secure Boot is disabled entirely on
it; ESP32-H21 retains RSA based Secure Boot V2.

The security documentation keeps the ECDSA Secure Boot V2 content visible and
adds a warning describing the limitation (including that ECDSA Secure Boot V2 on
ESP32-C61 is not recommended for production). CI apps that exercise ECDSA Secure
Boot V2 on the affected SoCs set CONFIG_SECURE_BOOT_V2_FORCE_ENABLE_ECDSA
accordingly.
 2026-06-10 03:10:27 +05:30
harshal.patil
6bdaf2a293 fix(soc): Remove non-existent crypto registers (ESP32-C61) 2026-06-09 18:16:33 +05:30
morris
c66f9a3a8e Merge branch 'feature/esp32h4_flash_support_v6.1' into 'release/v6.1' 
feat(spi_flash): Add exclusive support for ESP32H4 (v6.1)

See merge request espressif/esp-idf!49419
 2026-06-09 18:19:15 +08:00
Jiang Jiang Jian
785ab7a4e6 Merge branch 'fix/esp_idf_lp_uart_wakeup_muti_times_v6.1' into 'release/v6.1' 
fix(ulp): fix lp uart keep wakeup triggered v6.1

See merge request espressif/esp-idf!49396
 2026-06-09 17:22:21 +08:00
Song Ruo Jing
5934c5b7f1 fix(spi_flash): gpspi flash clock could reach higher frequency 2026-06-09 15:27:41 +08:00
Song Ruo Jing
c9f52c7ca7 feat(spi_flash): Add exclusive support for ESP32H4 
Add 32bit addr support for esp32s31 as well
 2026-06-09 15:27:41 +08:00
hebinglin
5ff1c38cb8 fix(ulp): fix lp uart keep wakeup triggered 2026-06-08 19:29:53 +08:00
C.S.M
01a9cbe421 fix(spi_flash): Fix suspend issue on esp32s31, and add trs timing on other target 2026-06-08 14:39:47 +08:00