fix(vol): update dreg_1p1 and dreg_1p1_pvt in bootloader

This commit is contained in:
hongshuqing
2026-05-29 11:24:12 +08:00
parent 8158e1d350
commit 47009c5458
2 changed files with 39 additions and 0 deletions

View File

@@ -34,6 +34,8 @@
#include "esp_rom_sys.h"
#include "hal/clk_tree_ll.h"
#include "hal/psram_ctrlr_ll.h"
#include "soc/regi2c_bias.h"
#include "hal/regi2c_ctrl.h"
ESP_LOG_ATTR_TAG(TAG, "boot.esp32s31");
@@ -61,6 +63,8 @@ static inline void bootloader_hardware_init(void)
_psram_ctrlr_ll_select_clk_source(PSRAM_CTRLR_LL_MSPI_ID_2, PSRAM_CLK_SRC_XTAL);
_psram_ctrlr_ll_select_clk_source(PSRAM_CTRLR_LL_MSPI_ID_3, PSRAM_CLK_SRC_XTAL);
clk_ll_mpll_disable();
REGI2C_WRITE_MASK(I2C_BIAS, I2C_BIAS_DREG_1P1, 10);
REGI2C_WRITE_MASK(I2C_BIAS, I2C_BIAS_DREG_1P1_PVT, 10);
}
void bootloader_enable_cpu_reset_info(void)

View File

@@ -0,0 +1,35 @@
/*
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
*/
#pragma once
/**
* @file regi2c_bias.h
* @brief Register definitions for bias
*
* This file lists register fields of BIAS. These definitions are used via macros defined in regi2c_ctrl.h, by
* rtc_clk_init function in esp32s31/rtc_clk_init.c.
*/
#define I2C_BIAS 0x6A
#define I2C_BIAS_HOSTID 0
#define I2C_BIAS_DREG_1P6 0
#define I2C_BIAS_DREG_1P6_MSB 3
#define I2C_BIAS_DREG_1P6_LSB 0
#define I2C_BIAS_DREG_1P1 0
#define I2C_BIAS_DREG_1P1_MSB 7
#define I2C_BIAS_DREG_1P1_LSB 4
#define I2C_BIAS_DREG_1P1_PVT 1
#define I2C_BIAS_DREG_1P1_PVT_MSB 3
#define I2C_BIAS_DREG_1P1_PVT_LSB 0
#define I2C_BIAS_DREG_2P2_PVT 1
#define I2C_BIAS_DREG_2P2_PVT_MSB 7
#define I2C_BIAS_DREG_2P2_PVT_LSB 4