Frantisek Hrbata e9cf6abc31 Merge branch 'fix/harden_empty_toolchain_output' into 'master' ...

fix: harden build against empty toolchain output

Closes IDFGH-17820

See merge request espressif/esp-idf!50136

2026-08-10 09:31:40 +02:00

..

baremetal

xtensa: Add bare metal port stub functions for G0 build test

2023-04-18 15:51:38 +08:00

deprecated_include

change(xtensa): Deprecate ".../xtensa_timer.h" include path

2023-11-30 21:58:52 +08:00

esp32

fix(gdbstub): xtensa: fix FPU registers read and write

2026-02-02 10:49:16 +07:00

esp32s2

refactor(xtensa): Rename specreg.h register macros

2025-06-17 15:37:33 +02:00

esp32s3

fix(gdbstub): xtensa: fix FPU registers read and write

2026-02-02 10:49:16 +07:00

include

feat(freertos): speed up SMP critical section enter and exit

2026-08-06 12:43:28 +02:00

test_apps/include

refactor: Remove idf_test component

2026-01-01 02:26:42 +08:00

trax

feat: Update esptool to v5

2025-09-30 15:28:55 +02:00

CMakeLists.txt

fix(xtensa): detect freertos exclusion via __COMPONENT_REQUIRES_COMMON

2026-05-25 15:24:25 +02:00

eri.c

feat(license): Dual-license source files built by OpenOCD stub flasher

2024-01-15 23:45:23 +01:00

linker.lf

xtensa: Move Xtensa RTOS porting layer files to xtensa component

2023-04-18 15:28:05 +08:00

project_include.cmake

fix: harden build against empty toolchain output

2026-08-05 20:58:36 +08:00

xt_trax.c

xtensa: move out trax

2021-02-26 19:45:48 +08:00

xtensa_context.S

fix(xtensa): Reset zero overhead loop counter in ISRs

2026-03-04 09:09:09 +02:00

xtensa_intr_asm.S

refactor(xtensa): Rename specreg.h register macros

2025-06-17 15:37:33 +02:00

xtensa_intr.c

change(app_trace): move sysview to component registry

2025-11-10 15:55:41 +08:00

xtensa_loadstore_handler.S

fix(esp32): Fix access to MALLOC_CAP_IRAM_8BIT byte array in loop

2026-02-13 16:12:58 +02:00

xtensa_vectors.S

fix(esp_system): update cache livelock workaround bind to interrupt WDT configuration

2026-05-28 12:10:59 +08:00