Commit Graph
8077 Commits
Author SHA1 Message Date
Mahavir Jain a4a2a4a5cb Merge branch 'fix_https_request_rom_impl_ci_failure_v6.0' into 'release/v6.0'
fix(examples): make https_request rom_impl CI test resilient to transient external server failures (backport v6.0)

See merge request espressif/esp-idf!48418
2026-06-29 11:18:51 +05:30
Mahavir Jain 7292d67dd6 Merge branch 'feat/restful_server_upgrade_vite_version_v6.0' into 'release/v6.0'
feat(http_server/restful_server): Upgraded Vite version (v6.0)

See merge request espressif/esp-idf!49415
2026-06-29 11:17:58 +05:30
Mahavir Jain e082ad95da Merge branch 'fix/memory_leak_cross_signed_cert_verify_v6.0' into 'release/v6.0'
fix(esp_crt_bundle): fixes verification failures with cross signed certificates (v6.0)

See merge request espressif/esp-idf!48624
2026-06-29 11:17:37 +05:30
Roland Dobai 913be3895f Merge branch 'fix/idfgh-17712-bootloader-extra-components_v6.0' into 'release/v6.0'
fix(bootloader): discover BOOTLOADER_EXTRA_COMPONENT_DIRS in cmake v1 (v6.0)

See merge request espressif/esp-idf!49720
2026-06-29 07:40:28 +02:00
morris 32a54c35de Merge branch 'fix/twaifd_assert_fail_v6.0' into 'release/v6.0'
fix(driver_twai): fix driver assert fail when send frame (v6.0)

See merge request espressif/esp-idf!49941
2026-06-29 12:35:29 +08:00
morris d91bff2f0f Merge branch 'ci/twai-runner-update-v6.0' into 'release/v6.0'
ci: twai runner setup v6.0

See merge request espressif/esp-idf!49803
2026-06-29 10:59:17 +08:00
morris 6c6071aa3c Merge branch 'ci/move_adc_runner_to_generic_v6.0' into 'release/v6.0'
ci(adc): move all ADC runners to generic (v6.0)

See merge request espressif/esp-idf!49793
2026-06-29 10:50:11 +08:00
morris b090f3d602 Merge branch 'fix/fix_mipi_lcd_dirty_buffer_v6.0' into 'release/v6.0'
feat(lcd): support buffer switch interrupt (v6.0)

See merge request espressif/esp-idf!49101
2026-06-29 10:49:26 +08:00
cjin 57732dbc59 fix(ble): use default frequency for ble power save example 2026-06-29 10:30:23 +08:00
morris 94fa48c111 Merge branch 'fix/fix_i80_example_high_failure_ratio_v6.0' into 'release/v6.0'
test(lcd): fix i80 lcd example pytest failure (v6.0)

See merge request espressif/esp-idf!49025
2026-06-29 10:20:31 +08:00
morris 6dc0cc8de2 Merge branch 'test/uart_dma_ota_fix_v6.0' into 'release/v6.0'
refactor(uhci): refactor uart_dma_ota example (v6.0)

See merge request espressif/esp-idf!48755
2026-06-29 10:15:47 +08:00
morris df8b29aafc Merge branch 'doc/i2s_esp32_mclk_restriction_v6.0' into 'release/v6.0'
docs(i2s): add note for the restriction of MCLK on esp32 (v6.0)

See merge request espressif/esp-idf!48571
2026-06-29 10:12:10 +08:00
Erhan Kurubas 6cb1b59e7c feat(esp_trace): add example to demonstrate external lib integration 2026-06-26 14:12:09 +02:00
Erhan Kurubas b0896d9171 feat(esp_trace): add usb-serial-jtag as a transport channel 2026-06-26 14:11:50 +02:00
Jin Chen c05182d0fc feat(ble): update ble power save sdkconfig on ESP32-c5
(cherry picked from commit 3fdabaedaa)

Co-authored-by: cjin <jinchen@espressif.com>
2026-06-26 10:09:05 +08:00
Jin Chen b99b2ce04d feat(ble): update ble power save sdkconfig on ESP32-C61
(cherry picked from commit e603f41667)

Co-authored-by: cjin <jinchen@espressif.com>
2026-06-26 10:09:05 +08:00
yangfeng e27d9efe13 fix(bt): Fix the high issues related to AVRCP from AI review report
- SDP/registration: handle SDP record creation and discovery failures safely
- AVRC stack: fix packet checks, fragment leaks, response build, and compile guards
- BTC AVRCP: fix return codes, connection state, metadata parsing, and memory leaks
- AVCTP: fix event passing, L2CAP conflicts, TX queue leaks, and disconnect handling
- Example: remove TG RN capability setup before initialization
2026-06-25 14:48:50 +08:00
Ashish Sharma 0f11ac0623 feat(esp_http_client_mutual_auth): add mutual TLS example
Closes https://github.com/espressif/esp-idf/issues/18393
2026-06-25 10:41:00 +08:00
Mayank Tyagi 7744dc5854 fix(nimble): Optimize Nimble throughput example for 1M/2M/S2/S8 2026-06-24 16:58:21 +05:30
wanckl 14b5df881a feat(driver_twai): add prioritized TX queue support 2026-06-24 14:15:51 +08:00
Wan Lei 9f694876bf fix(driver_twai): enable ci test for h4 2026-06-24 14:15:51 +08:00
wanckl 35fb412e71 fix(ci): twai test close board to fixed ci jobs pullotion 2026-06-23 14:27:46 +08:00
2bb8dfe213 docs(jtag-debugging): add semihosting chapter
Co-authored-by: Shen Mengjing <shenmengjing@espressif.com>
Co-authored-by: Zhang Shu Xian <zhangshuxian@espressif.com>
2026-06-22 13:02:29 +02:00
Zhou Xiao d3409dbac6 docs(ble): add BLE UART tutorial and opencode bridge demo
- Add BLE UART service example with OpenCode companion docs
- Add BLE UART bridge demo for opencode integration
- Add BLE UART common library improvements
2026-06-22 10:20:47 +08:00
harshal.patil 5ed711bc06 fix(esp_common/esp_fault): make ESP_FAULT_ASSERT survive optimization
ESP_FAULT_ASSERT(C) was silently deleted by the optimizer when C is a cached
flag/status already proven by a preceding `if (!C) return/goto`: the compiler
folds C to a constant and drops all three checks, removing the fault-injection
protection with no warning.
2026-06-18 19:41:56 +05:30
igor.udot 44b52749af ci: twai runner setup 2026-06-18 13:26:21 +08:00
gaoxu 84c58612c0 ci(adc): remove ADC runner and move ADC tests to generic 2026-06-18 10:32:44 +08:00
Konstantin Kondrashov 255478ce73 fix(bootloader): handle extra component dirs in v1 subproject
Closes https://github.com/espressif/esp-idf/issues/18651
2026-06-16 12:20:48 +03:00
Chen Yu Dong 635697a7e0 ci: fix pytest markers
Backport of !49647 to release/v6.0 (power_management only)
- IDFCI-12304
2026-06-16 12:24:38 +08:00
harshal.patil 5f824c8683 fix(secure_boot): range-check ECDSA r,s in bootloader before ROM verify 2026-06-12 17:32:38 +05:30
Laukik Hase 93466c1fd3 feat(esp_tee): Add some required fields in the attestation token
- Chip ID from the ROM
- Device MAC address from eFuse BLK1
- Device Optional Unique ID from eFuse BLK2
2026-06-12 10:04:06 +05:30
Laukik Hase 140e1ae1f3 ci(esp_tee): Removed common_components dependency from ESP-TEE test-apps 2026-06-12 10:03:02 +05:30
Zhi Wei Jian 29a6200e40 fix(examples): improve bluedroid BLE example error handling
Check GAP/GATT event status, fix prepare-write buffer lifecycle, and
align example code with updated Bluedroid API behavior.

(cherry picked from commit bfc47ace48)

Co-authored-by: zhiweijian <zhiweijian@espressif.com>
2026-06-12 10:54:03 +08:00
Zhi Wei Jian ccd011323c refactor(examples): disable unused BT options in bluedroid BLE examples
Add sdkconfig.defaults to turn off unused Bluedroid host features per
example role (GATT client/server, SMP, legacy adv, etc.).

(cherry picked from commit b4b640f233)

Co-authored-by: zhiweijian <zhiweijian@espressif.com>
2026-06-12 10:52:49 +08:00
ShenWeilong c1f60d93ce fix(bluedroid): Set CONFIG_PARTITION_TABLE_SINGLE_APP_LARGE=y in bluedroid host examples 2026-06-12 10:51:17 +08:00
JiangGuangMingandCursor a90989cd6f feat(usb): add usb wakeup from light sleep example
Co-authored-by: Cursor <cursoragent@cursor.com>
2026-06-11 09:24:04 +08:00
Aditya Patwardhan 94be07050f change(secure_boot): mark ECDSA based Secure Boot V2 as insecure on affected SoCs
ECDSA based Secure Boot V2 is not functional for certain input vectors on
ESP32-C5/C61/H2/P4 and on the preview targets ESP32-H4/H21. RSA based Secure
Boot V2 is the recommended scheme where the SoC supports it. This issue will be
fixed in a future hardware ECO revision; more details will be shared through the
hardware errata document.

A new hidden Kconfig option SECURE_BOOT_V2_ECDSA_INSECURE marks the affected
mass-production SoCs (ESP32-C5/C61/H2/P4). On these SoCs, when hardware Secure
Boot V2 is enabled, the ECDSA (V2) signing scheme is no longer offered by
default; it must be turned on explicitly via SECURE_BOOT_V2_FORCE_ENABLE_ECDSA
under "Allow potentially insecure options" (CONFIG_SECURE_BOOT_INSECURE). App
signing without hardware Secure Boot is not affected. Note that ESP32-C61 has no
RSA based Secure Boot V2, so it has no Secure Boot scheme enabled by default.

The preview targets ESP32-H4 and ESP32-H21 mark ECDSA Secure Boot V2 as not
supported in their SoC capabilities instead of using the option above. As
ESP32-H4 has no other Secure Boot V2 scheme, Secure Boot is disabled entirely on
it; ESP32-H21 retains RSA based Secure Boot V2.

The security documentation keeps the ECDSA Secure Boot V2 content visible and
adds a warning describing the limitation (including that ECDSA Secure Boot V2 on
ESP32-C61 is not recommended for production). CI apps that exercise ECDSA Secure
Boot V2 on the affected SoCs set CONFIG_SECURE_BOOT_V2_FORCE_ENABLE_ECDSA
accordingly.
2026-06-10 18:06:48 +05:30
yangfeng 774c334372 fix: Fix the incorrect connection of the same-name devices in the HFP example 2026-06-10 19:12:31 +08:00
Hrushikesh Bhosale 542ae64088 feat(http_server/restful_server): Upgraded Vite version
- Bumped up the Vite version to 7.3.2
2026-06-09 11:24:40 +05:30
yangfeng 539b98274f fix: Fix the potential stack overflow issue in the Classic Bluetooth example 2026-06-09 09:42:04 +08:00
hebinglin f088b73ea8 fix(ulp): fix lp uart keep wakeup triggered 2026-06-08 19:49:42 +08:00
Ashish Sharma 8554f060cc fix(http_request): shifts to HTTP/1.1 in example pytest 2026-06-03 11:31:27 +08:00
wuzhenghui b1a40fc626 docs(system): update GPIO wakeup section for clarity on EXT0 and EXT1 support 2026-06-02 20:52:10 +08:00
Chen Jichang 9274289a62 feat(lcd): support buffer switch interrupt 2026-06-01 18:34:58 +08:00
yinqingzhao 199dd66783 feat(wifi): update itwt example for different chips 2026-05-29 14:57:25 +08:00
Chen Jichang a42184d7b7 test(lcd): fix i80 lcd example pytest failure 2026-05-29 10:37:17 +08:00
Jimmy Wennlund 6036ec961d feat(esp_http_server): Make HTTP(S)_SERVER_EVENT events optional
Make it possible to disable http(s) server events. This improves
performance of the server, as http server creates events on every signle
read or write to the socket.
2026-05-27 11:58:58 +05:30
Hrushikesh Bhosale 579769ad28 fix(examples): make https_request rom_impl test resilient to transient external server errors
The rom_impl variant of the https_request example test connects to an
external server, which requires a valid system time for TLS certificate
validation. In CI, SNTP time sync can be unreachable, causing transient
failures. Write the host timestamp into the DUT's NVS partition (via the
existing write_time_to_nvs helper) before running the test, so the
firmware can set its clock without depending on external NTP servers.
2026-05-27 11:56:53 +05:30
Hu Rui 98128e8b56 refactor(uhci): improve uart_dma_ota example & uhci docs
add const to UHCI rx callback edata->data
2026-05-25 10:57:16 +08:00
Jiang Guang Ming 6eb7f181a2 feat(mbedtls): enable ROM mbedTLS pytest with esp32c2 rev2.0 2026-05-25 10:07:47 +08:00