Commit Graph
50698 Commits
Author SHA1 Message Date
zhiweijian 76b7ddd13e fix(ble/bluedroid): note LE Coded PHY impact on Wi-Fi coexistence in bluedroid GAP/GATT APIs 2026-05-28 10:30:54 +08:00
linruihao 799a720989 fix(coex): fix ble coded phy rx issue when aborted by coex 2026-05-28 10:30:53 +08:00
Island bac0d603b9 Merge branch 'change/ble_update_lib_20260520_v6.0' into 'release/v6.0'
change(ble): [AUTO_MR] 20260520 - Update ESP BLE Controller Lib (6.0)

See merge request espressif/esp-idf!48770
2026-05-27 19:00:28 +08:00
ShenWeilong d1930f9d45 fix(ble): won't add -Wno-unterminated-string-initialization for clang 2026-05-26 17:07:46 +08:00
luoxu 3dd06b7abe fix(bt): Normalize source paths for log compression pattern matching 2026-05-26 13:34:43 +08:00
ShenWeilong d8c912eb4d change(bt): Separated bt/cmakelist to bt/controller/cmakelist and bt/porting/cmakelist 2026-05-25 21:01:21 +08:00
zhaoweiliang 527c3a0ade change(ble): [AUTO_MR] Update lib_esp32c6 to 4adb29e0 2026-05-21 10:41:15 +08:00
zhaoweiliang 8782647ac7 change(ble): [AUTO_MR] Update lib_esp32c5 to 4adb29e0 2026-05-21 10:40:18 +08:00
zhaoweiliang a4066942af change(ble): [AUTO_MR] Update lib_esp32h2 to 4adb29e0 2026-05-21 10:37:53 +08:00
Jiang Jiang Jian 8f3d8b41c3 Merge branch 'feat/support_esp3261_cert_test_example_v6.0' into 'release/v6.0'
feat(phy): support esp32c61 example cert test and antenna(Backport v6.0)

See merge request espressif/esp-idf!48596
2026-05-16 10:27:40 +08:00
Jiang Jiang Jian f9f299a9fa Merge branch 'fix/freertos_delete_with_caps_smp_race_v6.0' into 'release/v6.0'
fix(freertos): close vTaskDeleteWithCaps cross-core delete race on SMP preview kernel (v6.0)

See merge request espressif/esp-idf!48600
2026-05-16 10:27:26 +08:00
Jiang Jiang Jian 603f91e2fd Merge branch 'fix/s3_xip_opt_os_startup_v6.0' into 'release/v6.0'
fix(mspi): fixed possible boot failure in some builds when psram is enabled (v6.0)

See merge request espressif/esp-idf!48583
2026-05-16 10:26:41 +08:00
Jiang Jiang Jian 6006c9cba1 Merge branch 'feat/riscv-spiram-stack-pointer-update-before-restart_v6.0' into 'release/v6.0'
fix(esp_system): fix PSRAM stack crash in esp_restart_noos on RISC-V SPIRAM chips (v6.0)

See merge request espressif/esp-idf!48067
2026-05-16 08:22:38 +08:00
Zhang Wen Xu a1ba61203e Merge branch 'fix/disable_i2c_master_clk_while_hw_hop_processing_v6.0' into 'release/v6.0'
fix(esp_phy): check hw freq hop done before disabling common clock (v6.0)

See merge request espressif/esp-idf!48558
2026-05-15 17:54:02 +00:00
Jiang Jiang Jian 4c36706b41 Merge branch 'backport/backport_dfs_channel_check_and_max_tb_tu_power_v6.0' into 'release/v6.0'
fix(wifi): fix dfs channel check and max tb ru power issues(backport v6.0)

See merge request espressif/esp-idf!48594
2026-05-16 01:39:57 +08:00
Jiang Jiang Jian 7c4a5faed6 Merge branch 'fix/component_manager_version_v6.0' into 'release/v6.0'
Tools: seed IDF_VERSION before idf.py parses dependencies.lock (v6.0)

See merge request espressif/esp-idf!48607
2026-05-16 01:39:34 +08:00
Roland Dobai 29dcff2cdc fix(tools): seed IDF_VERSION before idf.py parses dependencies.lock
Any idf.py invocation could hang indefinitely with no output while
spawning an unbounded chain of "idf.py --version" subprocesses,
eventually exhausting system memory.

During init_cli(), idf.py parses the project's dependencies.lock to
vet trusted component-provided idf_ext.py extensions. If the lock
contains a component whose manifest has an "if: idf_version" clause,
evaluating it calls idf-component-manager's _get_idf_version(). Outside
a CMake build the IDF_VERSION environment variable is not set, so that
function falls back to running "idf.py --version" as a subprocess,
which re-enters init_cli() and recurses without bound.

During a normal CMake build the component manager runs as a subprocess
that already has IDF_VERSION in its environment (see build/config.env),
so the fallback is never reached. The recursion happens only because
idf.py runs component-manager code in-process during its own CLI
startup, outside that context.

Seed IDF_VERSION into os.environ early in init_cli(), before any
dependencies.lock parsing, using the subprocess-free
idf_version_from_cmake() helper. This gives in-process component-manager
code the same IDF_VERSION a CMake build would provide.
2026-05-15 16:30:46 +02:00
Sudeep Mohanty 9b01655989 fix(freertos): close vTaskDeleteWithCaps cross-core delete race on SMP preview kernel
Replace the eTaskGetState() polling guard in prvTaskDeleteWithCaps()
with a per-core xTaskGetCurrentTaskHandleForCore() check, so the
predicate matches vTaskDelete()'s immediate-vs-deferred decision. This
closes the taskTASK_SCHEDULED_TO_YIELD race against the IDLE-deferred
TCB cleanup on the SMP preview kernel; behaviour is unchanged on the
default IDF kernel and on single-core targets.
2026-05-15 15:29:32 +02:00
Jiang Jiang Jian dc9276941e Merge branch 'fix/ota_resumption_ci_failures_v6.0' into 'release/v6.0'
fix(examples): solve OTA resumption CI failures (backport v6.0)

See merge request espressif/esp-idf!48578
2026-05-15 20:29:10 +08:00
yinqingzhao ab2a904330 fix(wifi): fix dfs channel check and max tb ru power issues 2026-05-15 19:48:16 +08:00
Jiang Jiang Jian f2493f814e Merge branch 'bugfix/fix_hidden_ap_rssi_does_not_update_issue_v6.0' into 'release/v6.0'
fix(wifi): fix hidden ap rssi update and owe beacon timeout issue(Backport v6.0)

See merge request espressif/esp-idf!48570
2026-05-15 19:45:29 +08:00
muhaidong 33bbd87a80 feat(phy): support esp32c61 example cert test and antenna 2026-05-15 19:34:52 +08:00
Jiang Jiang Jian 0f8be64290 Merge branch 'bugfix/hfp_co_build_err_v6.0' into 'release/v6.0'
fix(bt/bluedroid): fixed building errors in HFP datapath (v6.0)

See merge request espressif/esp-idf!48567
2026-05-15 19:24:14 +08:00
Rahul Tank d4bf347f6a Merge branch 'feat/add_nimble_log_compression_script_v6.0' into 'release/v6.0'
feat(nimble): Added missing NimBLE log compression scripts (v6.0)

See merge request espressif/esp-idf!48562
2026-05-15 15:02:45 +05:30
Xiao Xufeng 475ec39cb4 fix(mspi): fixed possible boot failure in some builds when psram is enabled
A typical scenario is: when XIP on PSRAM enabled, compiler optimization level is Os. Under certain binary layout, boot hangs and backtrace points to `esp_sleep_config_gpio_isolate`.

The root cause is that, during PSRAM initialization, it calls esp_gpio_reserve, which happens to place before the reported function. However, after call, there is no barrier before the clock adjustment in `mspi_timing_enter_low_speed_mode`. The clock gets changed when the cache is still fetching data, resulting in the corrupted data in the end of the cache line.

This commits add spi_flash_disable_cache as a barrier to make sure the cache transactions is finished before the clock switch.
2026-05-15 17:31:37 +08:00
Jiang Jiang Jian 11fa0fe619 Merge branch 'feat/lcd_use_apll_clock_v6.0' into 'release/v6.0'
refactor(clk_tree): use general api to enable the clk (v6.0)

See merge request espressif/esp-idf!47814
2026-05-15 17:30:21 +08:00
sibeibei 65d9ecb75c feat(phy): update PHY libraries and improve PLL temperature tracking
1. Allow customization of temperature deltas for PHY track PLL.

2. Fix abnormal PHY state which may trigger task watchdog timeout.
2026-05-15 17:14:39 +08:00
zwx 26bf1eba50 fix(esp_phy): check hw freq hop done before disabling common clock 2026-05-15 17:14:34 +08:00
nilesh.kale 62a67bbcb8 fix(examples): solve OTA resumption CI failures (backport v6.0)
This commit started threaded server to serve multiple clients
simultaneously in individual thread, eliminating the single-threaded
server limitation that caused the device's mid-OTA reconnect to time
out while the previous connection was still being torn down.

SSL is now wrapped per-connection inside the handler thread (in
setup()) so the main accept loop never blocks on a TLS handshake.

Closes IDFCI-3505

(cherry picked from commit 7647d54271)
2026-05-15 14:08:39 +05:30
muhaidong 34b163d1d2 fix(wifi): fix hidden ap rssi update and owe beacon timeout issue 2026-05-15 16:28:52 +08:00
Jiang Jiang Jian bd324b3311 Merge branch 'fix/rtc-io-invalid-clock-access-c5_v6.0' into 'release/v6.0'
fix(rtc_io): fixed invalid clock access on C5 (v6.0)

See merge request espressif/esp-idf!48511
2026-05-15 16:24:27 +08:00
Jiang Jiang Jian 1874f8d030 Merge branch 'ci/add_static_tx_buffer_case_v6.0' into 'release/v6.0'
ci: Add wifi static buffer case v6.0

See merge request espressif/esp-idf!48550
2026-05-15 16:14:53 +08:00
Jin Cheng ad6f33e9d1 feat(ci): added example tests for HFP using external codec 2026-05-15 16:07:08 +08:00
Jin Cheng f0d54d4a8c fix(bt/bluedroid): fixed building errors in HFP datapath 2026-05-15 16:07:08 +08:00
Jiang Jiang Jian 99f67396f4 Merge branch 'contrib/github_pr_16149_v6.0' into 'release/v6.0'
fix(freertos): Avoid core switch deadlock on start (GitHub PR) (v6.0)

See merge request espressif/esp-idf!48290
2026-05-15 15:54:15 +08:00
Jiang Jiang Jian 60b925ffcf Merge branch 'fix/bootloader-hooks-log-v2_v6.0' into 'release/v6.0'
fix(bootloader_hooks): Fix log_v2 support in bootloader hooks (v6.0)

See merge request espressif/esp-idf!48252
2026-05-15 15:52:06 +08:00
Jiang Jiang Jian 83a088da13 Merge branch 'feat/support_persistent_esp_rsa_ds_keys_v6.0' into 'release/v6.0'
Support persistent ESP RSA DS keys (v6.0)

See merge request espressif/esp-idf!48523
2026-05-15 15:46:46 +08:00
sibeibei 44d2693694 feat(phy): update PHY libraries and improve PLL temperature tracking
1. Allow customization of temperature deltas for PHY track PLL.

2. Fix abnormal PHY state which may trigger task watchdog timeout.
2026-05-15 15:02:42 +08:00
zwx aeda462467 fix(esp_phy): check hw freq hop done before disabling common clock 2026-05-15 15:02:37 +08:00
Sahil Yadav 36f0fd3962 feat(nimble): Added NimBLE log compression scripts in v6.0 2026-05-15 12:16:25 +05:30
Jiang Jiang Jian 0f06a3c7e7 Merge branch 'fix_https_request_ci_failure_v6.0' into 'release/v6.0'
fix(https_request): write host time to NVS to eliminate SNTP dependency in CI (backport v6.0)

See merge request espressif/esp-idf!48415
2026-05-15 14:11:29 +08:00
Jiang Jiang Jian b3f8f074d9 Merge branch 'feat/support_bluedroid_key_log_v6.0' into 'release/v6.0'
Feat/support bluedroid key log (6.0)

See merge request espressif/esp-idf!48517
2026-05-15 14:10:01 +08:00
Jiang Jiang Jian 91b378565a Merge branch 'feat/test_lp_core_debugging_v6.0' into 'release/v6.0'
feat(ulp): add pytest for debugging example (v6.0)

See merge request espressif/esp-idf!48255
2026-05-15 14:08:07 +08:00
Jiang Jiang Jian fa801fe002 Merge branch 'contrib/github_pr_18495_v6.0' into 'release/v6.0'
fix(bootloader_support): Fix app verification when split across multiple mmaps (GitHub PR) (v6.0)

See merge request espressif/esp-idf!48271
2026-05-15 14:05:37 +08:00
Jiang Jiang Jian a7b604fd33 Merge branch 'fix/lp_uart_data_bits_v6.0' into 'release/v6.0'
fix(ulp/lp_core): fix LP UART data_bits validation and add full word-length test coverage (v6.0)

See merge request espressif/esp-idf!48031
2026-05-15 14:03:13 +08:00
Guillaume Souchere 3e293035e3 fix(esp_system): PSRAM stack crash in esp_restart_noos on RISC-V chips
On RISC-V chips with SPIRAM support (esp32c5, esp32c61, esp32h4, esp32p4,
esp32s31), esp_restart_noos() was disabling the cache while the current
stack pointer could still be in external RAM. Any stack access after cache
disable (function call, local variable spill) would then fault with
"Cache disabled but cached memory region accessed".

Xtensa chips (esp32, esp32s2, esp32s3) already had this guard via the
SET_STACK macro. Add the equivalent for RISC-V:

- Add rv_utils_set_sp() to riscv/rv_utils.h (plain "mv sp, %0" with a
  memory clobber; no window register management needed on RISC-V)
- In each affected system_internal.c, under
  CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM, check whether the current
  SP is in PSRAM and if so switch it to the top of internal BSS before
  any cache disable or writeback operation
- Fix xTaskCreateStaticPinnedToCore() stack size argument in the
  spiram_stack test (was passing bytes instead of word count)
- Mark the null-pointer write in func_do_exception() as volatile to
  prevent the compiler from optimizing it away
- Extend the [spiram_stack] tests to RISC-V by sharing fibonacci() and
  the task/finish helpers across architectures, guarding only the
  Xtensa-specific WINDOWBASE/WINDOWSTART prints
2026-05-15 14:00:36 +08:00
Jiang Jiang Jian ecfe107ae5 Merge branch 'fix/x509_bundle_replace_unreliable_url_v6.0' into 'release/v6.0'
fix(examples): replace unreliable external URL in https_x509_bundle example (backport v6.0)

See merge request espressif/esp-idf!47718
2026-05-15 13:59:15 +08:00
Chen Jichang d1a64bffc0 refactor(clk_tree): use general api to enable the clk 2026-05-15 13:55:37 +08:00
Jiang Jiang Jian 8f7209c611 Merge branch 'feature/update-gdb-to-17.1_20260402_v6.0' into 'release/v6.0'
feat(tools): update gdb version to 17.1_20260402 (v6.0)

See merge request espressif/esp-idf!47481
2026-05-15 13:54:50 +08:00
Jiang Jiang Jian e5191e1612 Merge branch 'bugfix/idf_13957_v6.0' into 'release/v6.0'
bugfix: fix wifi loss packet and missing interrupt issues when switching root clock source

See merge request espressif/esp-idf!48432
2026-05-15 12:32:25 +08:00