Enable Tag/AP reboot recovery and image restore, plus OTS DATA_WRITE.
AP start only brings up PAwR; scan is explicit via restart_scan.
Ported onto current master ESL/OTS APIs (ble_esl_state_t,
ble_esl_key_material_t, ble_esl_address_t at the public boundary).
Move the PMU internal voltage calibration related efuse read LL
functions
from efuse_ll.h into pmu_ll.h, renaming them with the pmu_ll prefix.
efuse_ll.h should only contain efuse controller or system-global
functions;
other modules' private efuse bits belong to their own LL layer.
Affected chips: esp32c5, esp32c6, esp32c61, esp32h2, esp32h4, esp32p4.
Moved functions (renamed efuse_ll_get_* -> pmu_ll_get_*):
- get_active_hp_dbias, get_active_lp_dbias
- get_dbias_vol_gap
- get_lslp_dbg, get_dslp_dbg (where present)
- get_lslp_hp_dbias, get_dslp_lp_dbias (where present)
- get_dslp_dbias (esp32h2)
Fix DTM TX buffer leak in the BLE controller that could cause memory exhaustion and Interrupt WDT timeout during or after DTM TX tests.
Closes BLERP-3072 and BLERP-3097
See merge request espressif/esp-idf!52250
Keep gated-clk refcnt under s_clk_tree_spinlock only, and call
esp_crypto_common_clk_enable outside PERIPH_RCC so crypto (RCC→clk_tree)
and modem (clk_tree→RCC) cannot deadlock on periph_spinlock
Co-authored-by: Cursor <cursoragent@cursor.com>
The adjtime() wrapper stored the microsecond offset into the 32-bit
`long` timex.offset field without checking for overflow. A large delta
(e.g. 400 days) was computed in 64-bit and silently truncated when
assigned, wrapping into a small value that passed the ~35 minute range
check. adjtime() then returned 0 instead of the expected -1.
Compute the offset in int64_t and reject values that do not fit in the
timex.offset field with EINVAL. Add a regression test for a multi-day delta.
Closes https://github.com/espressif/esp-idf/issues/19051
fix(ppa): fix for SRM operation potential block if do 90/270 degree rotation
Closes IDFGH-18204 and IDFGH-17870
See merge request espressif/esp-idf!49657
The GDMA layer used `max_data_burst_size == 0` as the only way to disable the
data burst. That conflicts with the upstream drivers' convention where a zeroed
config struct means "unset", so users had no way to ask for the driver default
burst size.
GDMA now treats both 0 and 1 as "no data burst": a single-beat burst has no
benefit over the non-burst mode. The MSPI alignment constraint under Flash
Encryption / PSRAM ECC still takes precedence and is reported with a warning.
The upstream drivers using GDMA now apply their own default burst size (16
bytes) when the user leaves `dma_burst_size` as 0, following the UHCI driver:
- esp_async_crc (AHB / AXI GDMA backend)
- esp_async_memcpy (AHB / AXI / LP-AHB / DW_GDMA backend)
Callers that really want no burst can now set `dma_burst_size` to 1.
The Kconfig options for the program running on the ULP coprocessor now live
with the components that build it, not with the ULP coprocessor driver on
the HP core. The driver sources them, so applications resolve them as
before.
On ESP32-S3, USB PHY is clocked from BBPLL,
however if the BBPLL is not used as CPU clock source,
the power management unit can turn it off.
This commit registers USB as BBPLL consumer so it is not turned off.
Closes https://github.com/espressif/esp-idf/issues/15451
