refactor(pmu): move PMU calibration efuse getters from efuse_ll.h to pmu_ll.h

Move the PMU internal voltage calibration related efuse read LL
functions
from efuse_ll.h into pmu_ll.h, renaming them with the pmu_ll prefix.
efuse_ll.h should only contain efuse controller or system-global
functions;
other modules' private efuse bits belong to their own LL layer.

Affected chips: esp32c5, esp32c6, esp32c61, esp32h2, esp32h4, esp32p4.

Moved functions (renamed efuse_ll_get_* -> pmu_ll_get_*):
- get_active_hp_dbias, get_active_lp_dbias
- get_dbias_vol_gap
- get_lslp_dbg, get_dslp_dbg (where present)
- get_lslp_hp_dbias, get_dslp_lp_dbias (where present)
- get_dslp_dbias (esp32h2)

components/esp_hal_pmu/esp32c5/include/hal/pmu_ll.h

@@ -16,11 +16,47 @@
 #include "soc/pmu_struct.h"
 #include "hal/pmu_types.h"
 #include "hal/misc.h"
+#include "soc/efuse_struct.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+__attribute__((always_inline)) static inline uint32_t pmu_ll_get_active_hp_dbias(void)
+{
+    return EFUSE.rd_mac_sys3.active_hp_dbias;
+}
+
+__attribute__((always_inline)) static inline uint32_t pmu_ll_get_active_lp_dbias(void)
+{
+    return EFUSE.rd_mac_sys3.active_lp_dbias;
+}
+
+__attribute__((always_inline)) static inline uint32_t pmu_ll_get_lslp_dbg(void)
+{
+    return EFUSE.rd_mac_sys3.lslp_hp_dbg;
+}
+
+__attribute__((always_inline)) static inline uint32_t pmu_ll_get_lslp_hp_dbias(void)
+{
+    return EFUSE.rd_mac_sys3.lslp_hp_dbias;
+}
+
+__attribute__((always_inline)) static inline uint32_t pmu_ll_get_dslp_dbg(void)
+{
+    return EFUSE.rd_mac_sys3.dslp_lp_dbg;
+}
+
+__attribute__((always_inline)) static inline uint32_t pmu_ll_get_dslp_lp_dbias(void)
+{
+    return (EFUSE.rd_mac_sys4.dslp_lp_dbias_1 << 4) | EFUSE.rd_mac_sys3.dslp_lp_dbias;
+}
+
+__attribute__((always_inline)) static inline int32_t pmu_ll_get_dbias_vol_gap(void)
+{
+    return EFUSE.rd_mac_sys4.lp_hp_dbias_vol_gap;
+}
+
 /**
  * @brief Set the power domain that needs to be powered down in the digital power
  *

components/esp_hal_pmu/esp32c6/include/hal/pmu_ll.h

@@ -16,11 +16,47 @@
 #include "soc/pmu_struct.h"
 #include "hal/pmu_types.h"
 #include "hal/misc.h"
+#include "soc/efuse_struct.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+__attribute__((always_inline)) static inline uint32_t pmu_ll_get_active_hp_dbias(void)
+{
+    return EFUSE.rd_mac_spi_sys_2.active_hp_dbias;
+}
+
+__attribute__((always_inline)) static inline uint32_t pmu_ll_get_active_lp_dbias(void)
+{
+    return EFUSE.rd_mac_spi_sys_2.active_lp_dbias;
+}
+
+__attribute__((always_inline)) static inline int32_t pmu_ll_get_dbias_vol_gap(void)
+{
+    return EFUSE.rd_mac_spi_sys_2.dbias_vol_gap;
+}
+
+__attribute__((always_inline)) static inline uint32_t pmu_ll_get_lslp_dbg(void)
+{
+    return EFUSE.rd_mac_spi_sys_2.lslp_hp_dbg;
+}
+
+__attribute__((always_inline)) static inline uint32_t pmu_ll_get_dslp_dbg(void)
+{
+    return EFUSE.rd_mac_spi_sys_2.dslp_lp_dbg;
+}
+
+__attribute__((always_inline)) static inline uint32_t pmu_ll_get_lslp_hp_dbias(void)
+{
+    return EFUSE.rd_mac_spi_sys_2.lslp_hp_dbias;
+}
+
+__attribute__((always_inline)) static inline uint32_t pmu_ll_get_dslp_lp_dbias(void)
+{
+    return EFUSE.rd_mac_spi_sys_2.dslp_lp_dbias;
+}
+
 /**
  * @brief Set the power domain that needs to be powered down in the digital power
  *

components/esp_hal_pmu/esp32c61/include/hal/pmu_ll.h

@@ -16,11 +16,47 @@
 #include "soc/pmu_struct.h"
 #include "hal/pmu_types.h"
 #include "hal/misc.h"
+#include "soc/efuse_struct.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+__attribute__((always_inline)) static inline uint32_t pmu_ll_get_active_hp_dbias(void)
+{
+    return (EFUSE0.rd_mac_sys3.active_hp_dbias_1 << 3) | EFUSE0.rd_mac_sys2.active_hp_dbias;
+}
+
+__attribute__((always_inline)) static inline uint32_t pmu_ll_get_active_lp_dbias(void)
+{
+    return EFUSE0.rd_mac_sys3.active_lp_dbias;
+}
+
+__attribute__((always_inline)) static inline int32_t pmu_ll_get_dbias_vol_gap(void)
+{
+    return EFUSE0.rd_mac_sys3.lp_hp_dbias_vol_gap;
+}
+
+__attribute__((always_inline)) static inline uint32_t pmu_ll_get_lslp_dbg(void)
+{
+    return EFUSE0.rd_mac_sys3.lslp_hp_dbg;
+}
+
+__attribute__((always_inline)) static inline uint32_t pmu_ll_get_dslp_dbg(void)
+{
+    return EFUSE0.rd_mac_sys3.dslp_lp_dbg;
+}
+
+__attribute__((always_inline)) static inline uint32_t pmu_ll_get_lslp_hp_dbias(void)
+{
+    return EFUSE0.rd_mac_sys3.lslp_hp_dbias;
+}
+
+__attribute__((always_inline)) static inline uint32_t pmu_ll_get_dslp_lp_dbias(void)
+{
+    return EFUSE0.rd_mac_sys3.dslp_lp_dbias;
+}
+
 /**
  * @brief Set the power domain that needs to be powered down in the digital power
  *

components/esp_hal_pmu/esp32h2/include/hal/pmu_ll.h

@@ -16,11 +16,32 @@
 #include "soc/pmu_struct.h"
 #include "hal/pmu_types.h"
 #include "hal/misc.h"
+#include "soc/efuse_struct.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+__attribute__((always_inline)) static inline uint32_t pmu_ll_get_active_hp_dbias(void)
+{
+    return EFUSE.rd_mac_sys_2.active_hp_dbias;
+}
+
+__attribute__((always_inline)) static inline uint32_t pmu_ll_get_active_lp_dbias(void)
+{
+    return EFUSE.rd_mac_sys_2.active_lp_dbias;
+}
+
+__attribute__((always_inline)) static inline uint32_t pmu_ll_get_dslp_dbias(void)
+{
+    return EFUSE.rd_mac_sys_2.dslp_dbias;
+}
+
+__attribute__((always_inline)) static inline int32_t pmu_ll_get_dbias_vol_gap(void)
+{
+    return (EFUSE.rd_mac_sys_3.dbias_vol_gap_sign << 4) | (EFUSE.rd_mac_sys_3.dbias_vol_gap_value2 << 1) | EFUSE.rd_mac_sys_2.dbias_vol_gap_value1;
+}
+
 /**
  * @brief Set the power domain that needs to be powered down in the digital power
  *

components/esp_hal_pmu/esp32h4/include/hal/pmu_ll.h

@@ -16,6 +16,7 @@
 #include "soc/pmu_struct.h"
 #include "hal/pmu_types.h"
 #include "hal/misc.h"
+#include "soc/efuse_struct.h"
 
 #ifdef __cplusplus
 extern "C" {

components/esp_hal_pmu/esp32p4/include/hal/pmu_ll.h

@@ -16,12 +16,28 @@
 #include "soc/pmu_struct.h"
 #include "hal/pmu_types.h"
 #include "hal/misc.h"
+#include "soc/efuse_struct.h"
 #include "hal/config.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+__attribute__((always_inline)) static inline uint32_t pmu_ll_get_active_hp_dbias(void)
+{
+    return EFUSE.rd_mac_sys_4.active_hp_dbias;
+}
+
+__attribute__((always_inline)) static inline uint32_t pmu_ll_get_active_lp_dbias(void)
+{
+    return EFUSE.rd_mac_sys_4.active_lp_dbias;
+}
+
+__attribute__((always_inline)) static inline int32_t pmu_ll_get_dbias_vol_gap(void)
+{
+    return EFUSE.rd_mac_sys_5.lp_dcdc_dbias_vol_gap;
+}
+
 FORCE_INLINE_ATTR uint32_t pmu_ll_lp_get_interrupt_raw(pmu_dev_t *hw)
 {
     return hw->lp_ext.int_raw.val;

components/esp_hw_support/port/esp32c5/pmu_param.c

@@ -13,7 +13,6 @@
 #include "soc/pmu_icg_mapping.h"
 #include "esp_private/esp_pmu.h"
 #include "soc/clk_tree_defs.h"
-#include "hal/efuse_ll.h"
 #include "hal/efuse_hal.h"
 #include "esp_hw_log.h"
 
@@ -435,7 +434,7 @@ uint32_t get_act_hp_dbias(void)
     uint32_t blk_version = efuse_hal_blk_version();
     uint32_t hp_cali_dbias_efuse = 0;
     if ((chip_version == 1 && blk_version >= 1) || (chip_version >= 100 && blk_version >= 2)) {
-        hp_cali_dbias_efuse = efuse_ll_get_active_hp_dbias();
+        hp_cali_dbias_efuse = pmu_ll_get_active_hp_dbias();
     }
 
     if (hp_cali_dbias_efuse > 0) {
@@ -459,7 +458,7 @@ uint32_t get_act_lp_dbias(void)
     uint32_t lp_cali_dbias = LP_CALI_DBIAS_DEFAULT;
     uint32_t lp_cali_dbias_efuse = 0;
     if ((chip_version == 1 && blk_version >= 1) || (chip_version >= 100 && blk_version >= 2)) {
-        lp_cali_dbias_efuse = efuse_ll_get_active_lp_dbias();
+        lp_cali_dbias_efuse = pmu_ll_get_active_lp_dbias();
     }
 
     if (lp_cali_dbias_efuse > 0) {

components/esp_hw_support/port/esp32c5/pmu_pvt.c

@@ -21,7 +21,6 @@
 #include "soc/regi2c_dig_reg.h"
 #include "regi2c_ctrl.h"
 #include "soc/rtc.h"
-#include "hal/efuse_ll.h"
 #include "hal/efuse_hal.h"
 #include "esp_hw_log.h"
 
@@ -37,7 +36,7 @@ static uint8_t get_lp_hp_gap(void)
     uint32_t blk_version = efuse_hal_blk_version();
     uint8_t lp_hp_gap_efuse = 0;
     if (blk_version >= 2) {
-        lp_hp_gap_efuse = efuse_ll_get_dbias_vol_gap();
+        lp_hp_gap_efuse = pmu_ll_get_dbias_vol_gap();
         bool gap_flag = lp_hp_gap_efuse >> 4;
         uint8_t gap_abs_value = lp_hp_gap_efuse & 0xf;
         if (gap_flag) {

components/esp_hw_support/port/esp32c5/pmu_sleep.c

@@ -40,7 +40,7 @@ static uint32_t get_lslp_dbg(void)
     uint32_t chip_version = efuse_hal_chip_revision();
     uint32_t blk_version = efuse_hal_blk_version();
     if ((chip_version == 1 && blk_version >= 1) || (chip_version >= 100 && blk_version >= 2)) {
-        pmu_dbg_atten_lightsleep = efuse_ll_get_lslp_dbg();
+        pmu_dbg_atten_lightsleep = pmu_ll_get_lslp_dbg();
     } else {
         ESP_HW_LOGD(TAG, "lslp dbg not burnt in efuse\n");
     }
@@ -54,7 +54,7 @@ static uint32_t get_lslp_hp_dbias(void)
     uint32_t chip_version = efuse_hal_chip_revision();
     uint32_t blk_version = efuse_hal_blk_version();
     if ((chip_version == 1 && blk_version >= 1) || (chip_version >= 100 && blk_version >= 2)) {
-        pmu_hp_dbias_lightsleep_0v6 = efuse_ll_get_lslp_hp_dbias();
+        pmu_hp_dbias_lightsleep_0v6 = pmu_ll_get_lslp_hp_dbias();
     } else {
         ESP_HW_LOGD(TAG, "lslp hp dbias not burnt in efuse\n");
     }
@@ -68,7 +68,7 @@ static uint32_t get_dslp_dbg(void)
     uint32_t chip_version = efuse_hal_chip_revision();
     uint32_t blk_version = efuse_hal_blk_version();
     if ((chip_version == 1 && blk_version >= 1) || (chip_version >= 100 && blk_version >= 2)) {
-        pmu_dbg_atten_deepsleep = efuse_ll_get_dslp_dbg();
+        pmu_dbg_atten_deepsleep = pmu_ll_get_dslp_dbg();
     } else {
         ESP_HW_LOGD(TAG, "dslp dbg not burnt in efuse\n");
     }
@@ -82,7 +82,7 @@ static uint32_t get_dslp_lp_dbias(void)
     uint32_t chip_version = efuse_hal_chip_revision();
     uint32_t blk_version = efuse_hal_blk_version();
     if ((chip_version == 1 && blk_version >= 1) || (chip_version >= 100 && blk_version >= 2)) {
-        pmu_lp_dbias_deepsleep_0v7 = efuse_ll_get_dslp_lp_dbias();
+        pmu_lp_dbias_deepsleep_0v7 = pmu_ll_get_dslp_lp_dbias();
     } else {
         ESP_HW_LOGD(TAG, "dslp lp dbias not burnt in efuse\n");
     }

components/esp_hw_support/port/esp32c6/pmu_param.c

@@ -12,7 +12,6 @@
 #include "pmu_param.h"
 #include "soc/pmu_icg_mapping.h"
 #include "esp_private/esp_pmu.h"
-#include "hal/efuse_ll.h"
 #include "hal/efuse_hal.h"
 #include "esp_hw_log.h"
 #include "soc/clk_tree_defs.h"
@@ -422,7 +421,7 @@ uint32_t get_act_hp_dbias(void)
     uint32_t hp_cali_dbias = HP_CALI_DBIAS_DEFAULT;
     uint32_t blk_version = efuse_hal_blk_version();
     if (blk_version >= 3) {
-        hp_cali_dbias = efuse_ll_get_active_hp_dbias();
+        hp_cali_dbias = pmu_ll_get_active_hp_dbias();
         if (hp_cali_dbias != 0) {
             //efuse dbias need to add 2 to meet the CPU frequency switching
             if (hp_cali_dbias + 2 > 31) {
@@ -446,7 +445,7 @@ uint32_t get_act_lp_dbias(void)
     uint32_t lp_cali_dbias = LP_CALI_DBIAS_DEFAULT;
     uint32_t blk_version = efuse_hal_blk_version();
     if (blk_version >= 3) {
-        lp_cali_dbias = efuse_ll_get_active_lp_dbias();
+        lp_cali_dbias = pmu_ll_get_active_lp_dbias();
         if (lp_cali_dbias != 0) {
             //efuse dbias need to add 2 to meet the CPU frequency switching
             if (lp_cali_dbias + 2 > 31) {

components/esp_hw_support/port/esp32c6/pmu_pvt.c

@@ -21,7 +21,6 @@
 #include "soc/regi2c_dig_reg.h"
 #include "regi2c_ctrl.h"
 #include "soc/rtc.h"
-#include "hal/efuse_ll.h"
 #include "hal/efuse_hal.h"
 #include "esp_hw_log.h"
 
@@ -36,7 +35,7 @@ static uint8_t get_lp_hp_gap(void)
     int8_t pvt_offset = 0;
     uint32_t blk_version = efuse_hal_blk_version();
     if (blk_version >= 3) {
-        uint8_t offset_read = efuse_ll_get_dbias_vol_gap();
+        uint8_t offset_read = pmu_ll_get_dbias_vol_gap();
         bool offset_flag = offset_read >> 4;
         uint8_t offset_value = offset_read & 0xf;
         if (offset_flag) {

components/esp_hw_support/port/esp32c6/pmu_sleep.c

@@ -33,7 +33,7 @@ uint32_t get_lslp_dbg(void)
     uint32_t pmu_dbg_atten_lightsleep = PMU_DBG_ATTEN_LIGHTSLEEP_DEFAULT;
     uint32_t blk_version = efuse_hal_blk_version();
     if (blk_version >= 3) {
-        pmu_dbg_atten_lightsleep = efuse_ll_get_lslp_dbg();
+        pmu_dbg_atten_lightsleep = pmu_ll_get_lslp_dbg();
     } else {
         ESP_HW_LOGD(TAG, "blk_version is less than 3, lslp dbg not burnt in efuse\n");
     }
@@ -46,7 +46,7 @@ uint32_t get_lslp_hp_dbias(void)
     uint32_t pmu_hp_dbias_lightsleep_0v6 = PMU_HP_DBIAS_LIGHTSLEEP_0V6_DEFAULT;
     uint32_t blk_version = efuse_hal_blk_version();
     if (blk_version >= 3) {
-        pmu_hp_dbias_lightsleep_0v6 = efuse_ll_get_lslp_hp_dbias();
+        pmu_hp_dbias_lightsleep_0v6 = pmu_ll_get_lslp_hp_dbias();
     } else {
         ESP_HW_LOGD(TAG, "blk_version is less than 3, lslp hp dbias not burnt in efuse\n");
     }
@@ -59,7 +59,7 @@ uint32_t get_dslp_dbg(void)
     uint32_t pmu_dbg_atten_deepsleep = PMU_DBG_ATTEN_DEEPSLEEP_DEFAULT;
     uint32_t blk_version = efuse_hal_blk_version();
     if (blk_version >= 3) {
-        pmu_dbg_atten_deepsleep = efuse_ll_get_dslp_dbg() + EFUSE_BURN_OFFSET_DSLP_DBG;
+        pmu_dbg_atten_deepsleep = pmu_ll_get_dslp_dbg() + EFUSE_BURN_OFFSET_DSLP_DBG;
     } else {
         ESP_HW_LOGD(TAG, "blk_version is less than 3, dslp dbg not burnt in efuse\n");
     }
@@ -72,7 +72,7 @@ uint32_t get_dslp_lp_dbias(void)
     uint32_t pmu_lp_dbias_deepsleep_0v7 = PMU_LP_DBIAS_DEEPSLEEP_0V7_DEFAULT;
     uint32_t blk_version = efuse_hal_blk_version();
     if (blk_version >= 3) {
-        pmu_lp_dbias_deepsleep_0v7 = efuse_ll_get_dslp_lp_dbias() + EFUSE_BURN_OFFSET_DSLP_LP_DBIAS;
+        pmu_lp_dbias_deepsleep_0v7 = pmu_ll_get_dslp_lp_dbias() + EFUSE_BURN_OFFSET_DSLP_LP_DBIAS;
     } else {
         ESP_HW_LOGD(TAG, "blk_version is less than 3, dslp lp dbias not burnt in efuse\n");
     }

components/esp_hw_support/port/esp32c61/pmu_param.c

@@ -13,7 +13,6 @@
 #include "soc/pmu_icg_mapping.h"
 #include "esp_private/esp_pmu.h"
 
-#include "hal/efuse_ll.h"
 #include "hal/efuse_hal.h"
 #include "esp_hw_log.h"
 #include "soc/clk_tree_defs.h"
@@ -427,7 +426,7 @@ uint32_t get_act_hp_dbias(void)
     uint32_t blk_version = efuse_hal_blk_version();
     uint32_t hp_cali_dbias_efuse = 0;
     if (blk_version >= 1) {
-        hp_cali_dbias_efuse = efuse_ll_get_active_hp_dbias();
+        hp_cali_dbias_efuse = pmu_ll_get_active_hp_dbias();
     }
 
     if (hp_cali_dbias_efuse > 0) {
@@ -450,7 +449,7 @@ uint32_t get_act_lp_dbias(void)
     uint32_t blk_version = efuse_hal_blk_version();
     uint32_t lp_cali_dbias_efuse = 0;
     if (blk_version >= 1) {
-        lp_cali_dbias_efuse = efuse_ll_get_active_lp_dbias();
+        lp_cali_dbias_efuse = pmu_ll_get_active_lp_dbias();
     }
 
     if (lp_cali_dbias_efuse > 0) {

components/esp_hw_support/port/esp32c61/pmu_pvt.c

@@ -20,7 +20,6 @@
 #include "esp_private/esp_pmu.h"
 #include "soc/regi2c_dig_reg.h"
 #include "soc/rtc.h"
-#include "hal/efuse_ll.h"
 #include "hal/efuse_hal.h"
 #include "esp_hw_log.h"
 
@@ -36,7 +35,7 @@ static uint8_t get_lp_hp_gap(void)
     uint32_t blk_version = efuse_hal_blk_version();
     uint8_t lp_hp_gap_efuse = 0;
     if (blk_version >= 2) {
-        lp_hp_gap_efuse = efuse_ll_get_dbias_vol_gap();
+        lp_hp_gap_efuse = pmu_ll_get_dbias_vol_gap();
         bool gap_flag = lp_hp_gap_efuse >> 4;
         uint8_t gap_abs_value = lp_hp_gap_efuse & 0xf;
         if (gap_flag) {

components/esp_hw_support/port/esp32c61/pmu_sleep.c

@@ -37,7 +37,7 @@ static uint32_t get_lslp_dbg(void)
     uint32_t pmu_dbg_atten_lightsleep = PMU_DBG_ATTEN_LIGHTSLEEP_DEFAULT;
     uint32_t blk_version = efuse_hal_blk_version();
     if (blk_version >= 1) {
-        pmu_dbg_atten_lightsleep = efuse_ll_get_lslp_dbg();
+        pmu_dbg_atten_lightsleep = pmu_ll_get_lslp_dbg();
     } else {
         ESP_HW_LOGD(TAG, "lslp dbg not burnt in efuse, use default\n");
     }
@@ -50,7 +50,7 @@ static uint32_t get_lslp_hp_dbias(void)
     uint32_t pmu_hp_dbias_lightsleep_0v6 = PMU_HP_DBIAS_LIGHTSLEEP_0V6_DEFAULT;
     uint32_t blk_version = efuse_hal_blk_version();
     if (blk_version >= 1) {
-        pmu_hp_dbias_lightsleep_0v6 = efuse_ll_get_lslp_hp_dbias();
+        pmu_hp_dbias_lightsleep_0v6 = pmu_ll_get_lslp_hp_dbias();
     } else {
         ESP_HW_LOGD(TAG, "lslp hp dbias not burnt in efuse, use default\n");
     }
@@ -63,7 +63,7 @@ static uint32_t get_dslp_dbg(void)
     uint32_t pmu_dbg_atten_deepsleep = PMU_DBG_ATTEN_DEEPSLEEP_DEFAULT;
     uint32_t blk_version = efuse_hal_blk_version();
     if (blk_version >= 1) {
-        pmu_dbg_atten_deepsleep = efuse_ll_get_dslp_dbg();
+        pmu_dbg_atten_deepsleep = pmu_ll_get_dslp_dbg();
     } else {
         ESP_HW_LOGD(TAG, "dslp dbg not burnt in efuse, use default\n");
     }
@@ -76,7 +76,7 @@ static uint32_t get_dslp_lp_dbias(void)
     uint32_t pmu_lp_dbias_deepsleep_0v7 = PMU_LP_DBIAS_DEEPSLEEP_0V7_DEFAULT;
     uint32_t blk_version = efuse_hal_blk_version();
     if (blk_version >= 1) {
-        pmu_lp_dbias_deepsleep_0v7 = efuse_ll_get_dslp_lp_dbias();
+        pmu_lp_dbias_deepsleep_0v7 = pmu_ll_get_dslp_lp_dbias();
     } else {
         ESP_HW_LOGD(TAG, "dslp lp dbias not burnt in efuse\n");
     }

components/esp_hw_support/port/esp32h2/pmu_param.c

@@ -12,7 +12,6 @@
 #include "pmu_param.h"
 #include "soc/pmu_icg_mapping.h"
 #include "esp_private/esp_pmu.h"
-#include "hal/efuse_ll.h"
 #include "hal/efuse_hal.h"
 #include "esp_hw_log.h"
 #include "soc/clk_tree_defs.h"
@@ -419,7 +418,7 @@ uint32_t get_act_hp_dbias(void)
     unsigned blk_version = efuse_hal_blk_version();
     uint32_t hp_cali_dbias = HP_CALI_DBIAS_DEFAULT;
     if (blk_version >= 3) {
-        hp_cali_dbias = efuse_ll_get_active_hp_dbias();
+        hp_cali_dbias = pmu_ll_get_active_hp_dbias();
         if (hp_cali_dbias != 0) {
             //efuse dbias need to add 2 to meet the CPU frequency switching
             if (hp_cali_dbias + 2 > 31) {
@@ -444,7 +443,7 @@ uint32_t get_act_lp_dbias(void)
     unsigned blk_version = efuse_hal_blk_version();
     uint32_t lp_cali_dbias = LP_CALI_DBIAS_DEFAULT;
     if (blk_version >= 3) {
-        lp_cali_dbias = efuse_ll_get_active_lp_dbias();
+        lp_cali_dbias = pmu_ll_get_active_lp_dbias();
         if (lp_cali_dbias != 0) {
             //efuse dbias need to add 2 to meet the CPU frequency switching
             if (lp_cali_dbias + 2 > 31) {

components/esp_hw_support/port/esp32h2/pmu_sleep.c

@@ -17,7 +17,6 @@
 #include "hal/lp_aon_hal.h"
 #include "esp_private/esp_pmu.h"
 #include "pmu_param.h"
-#include "hal/efuse_ll.h"
 #include "hal/efuse_hal.h"
 #include "esp_hw_log.h"
 #include "soc/regi2c_bias.h"
@@ -36,7 +35,7 @@ uint32_t get_slp_lp_dbias(void)
     uint32_t pmu_lp_dbias_sleep_0v7 = PMU_LP_DBIAS_SLEEP_0V7_DEFAULT;
     unsigned blk_version = efuse_hal_blk_version();
     if (blk_version >= 3) {
-        pmu_lp_dbias_sleep_0v7 = efuse_ll_get_dslp_dbias();
+        pmu_lp_dbias_sleep_0v7 = pmu_ll_get_dslp_dbias();
         if (pmu_lp_dbias_sleep_0v7 == 0) {
             pmu_lp_dbias_sleep_0v7 = PMU_LP_DBIAS_SLEEP_0V7_DEFAULT;
             ESP_HW_LOGD(TAG, "slp dbias not burnt in efuse or wrong value was burnt in blk version: %d\n", blk_version);

components/esp_hw_support/port/esp32p4/pmu_param.c

@@ -13,7 +13,6 @@
 #include "soc/pmu_icg_mapping.h"
 #include "esp_private/esp_pmu.h"
 #include "soc/clk_tree_defs.h"
-#include "hal/efuse_ll.h"
 #include "hal/efuse_hal.h"
 #include "esp_hw_log.h"
 
@@ -337,7 +336,7 @@ uint32_t get_act_hp_dbias(void)
     uint32_t blk_version = efuse_hal_blk_version();
     uint32_t hp_cali_dbias_efuse = 0;
     if (blk_version >= 2 && blk_version != 100) {
-        hp_cali_dbias_efuse = efuse_ll_get_active_hp_dbias();
+        hp_cali_dbias_efuse = pmu_ll_get_active_hp_dbias();
     }
     if (hp_cali_dbias_efuse > 0) {
         hp_cali_dbias = hp_cali_dbias_efuse + 16;
@@ -358,7 +357,7 @@ uint32_t get_act_lp_dbias(void)
     uint32_t blk_version = efuse_hal_blk_version();
     uint32_t lp_cali_dbias_efuse = 0;
     if (blk_version >= 2 && blk_version != 100) {
-        lp_cali_dbias_efuse = efuse_ll_get_active_lp_dbias();
+        lp_cali_dbias_efuse = pmu_ll_get_active_lp_dbias();
     }
     if (lp_cali_dbias_efuse > 0) {
         //efuse dbias need to add 4 to near to dcdc voltage

components/esp_hw_support/port/esp32p4/pmu_pvt.c

@@ -21,7 +21,6 @@
 #include "soc/regi2c_dig_reg.h"
 #include "regi2c_ctrl.h"
 #include "soc/rtc.h"
-#include "hal/efuse_ll.h"
 #include "hal/efuse_hal.h"
 #include "esp_hw_log.h"
 
@@ -35,7 +34,7 @@ static uint8_t get_lp_hp_gap(void)
     uint32_t blk_version = efuse_hal_blk_version();
     uint8_t lp_hp_gap_efuse = 0;
     if (blk_version >= 2 && blk_version != 100) {
-        lp_hp_gap_efuse = efuse_ll_get_dbias_vol_gap();
+        lp_hp_gap_efuse = pmu_ll_get_dbias_vol_gap();
         bool gap_flag = lp_hp_gap_efuse >> 4;
         uint8_t gap_abs_value = lp_hp_gap_efuse & 0xf;
         if (gap_flag) {

components/hal/esp32c5/include/hal/efuse_ll.h

@@ -99,41 +99,6 @@ __attribute__((always_inline)) static inline uint32_t efuse_ll_get_ocode(void)
     return EFUSE.rd_sys_part1_data4.ocode;
 }
 
-__attribute__((always_inline)) static inline uint32_t efuse_ll_get_active_hp_dbias(void)
-{
-    return EFUSE.rd_mac_sys3.active_hp_dbias;
-}
-
-__attribute__((always_inline)) static inline uint32_t efuse_ll_get_active_lp_dbias(void)
-{
-    return EFUSE.rd_mac_sys3.active_lp_dbias;
-}
-
-__attribute__((always_inline)) static inline uint32_t efuse_ll_get_lslp_dbg(void)
-{
-    return EFUSE.rd_mac_sys3.lslp_hp_dbg;
-}
-
-__attribute__((always_inline)) static inline uint32_t efuse_ll_get_lslp_hp_dbias(void)
-{
-    return EFUSE.rd_mac_sys3.lslp_hp_dbias;
-}
-
-__attribute__((always_inline)) static inline uint32_t efuse_ll_get_dslp_dbg(void)
-{
-    return EFUSE.rd_mac_sys3.dslp_lp_dbg;
-}
-
-__attribute__((always_inline)) static inline uint32_t efuse_ll_get_dslp_lp_dbias(void)
-{
-    return (EFUSE.rd_mac_sys4.dslp_lp_dbias_1 << 4) | EFUSE.rd_mac_sys3.dslp_lp_dbias;
-}
-
-__attribute__((always_inline)) static inline int32_t efuse_ll_get_dbias_vol_gap(void)
-{
-    return EFUSE.rd_mac_sys4.lp_hp_dbias_vol_gap;
-}
-
 __attribute__((always_inline)) static inline uint32_t efuse_ll_get_recovery_bootloader_sector(void)
 {
     return (EFUSE.rd_repeat_data2.recovery_bootloader_flash_sector_hi << 9) | EFUSE.rd_repeat_data4.recovery_bootloader_flash_sector_lo;

components/hal/esp32c6/include/hal/efuse_ll.h

@@ -72,41 +72,6 @@ __attribute__((always_inline)) static inline bool efuse_ll_get_disable_wafer_ver
     return EFUSE.rd_repeat_data4.disable_wafer_version_major;
 }
 
-__attribute__((always_inline)) static inline uint32_t efuse_ll_get_active_hp_dbias(void)
-{
-    return EFUSE.rd_mac_spi_sys_2.active_hp_dbias;
-}
-
-__attribute__((always_inline)) static inline uint32_t efuse_ll_get_active_lp_dbias(void)
-{
-    return EFUSE.rd_mac_spi_sys_2.active_lp_dbias;
-}
-
-__attribute__((always_inline)) static inline uint32_t efuse_ll_get_lslp_dbg(void)
-{
-    return EFUSE.rd_mac_spi_sys_2.lslp_hp_dbg;
-}
-
-__attribute__((always_inline)) static inline uint32_t efuse_ll_get_lslp_hp_dbias(void)
-{
-    return EFUSE.rd_mac_spi_sys_2.lslp_hp_dbias;
-}
-
-__attribute__((always_inline)) static inline uint32_t efuse_ll_get_dslp_dbg(void)
-{
-    return EFUSE.rd_mac_spi_sys_2.dslp_lp_dbg;
-}
-
-__attribute__((always_inline)) static inline uint32_t efuse_ll_get_dslp_lp_dbias(void)
-{
-    return EFUSE.rd_mac_spi_sys_2.dslp_lp_dbias;
-}
-
-__attribute__((always_inline)) static inline int32_t efuse_ll_get_dbias_vol_gap(void)
-{
-    return EFUSE.rd_mac_spi_sys_2.dbias_vol_gap;
-}
-
 __attribute__((always_inline)) static inline uint32_t efuse_ll_get_blk_version_major(void)
 {
     return EFUSE.rd_mac_spi_sys_3.blk_version_major;

components/hal/esp32c61/include/hal/efuse_ll.h

@@ -62,41 +62,6 @@ __attribute__((always_inline)) static inline uint32_t efuse_ll_get_ocode(void)
     return EFUSE0.rd_sys_part1_data4.ocode;
 }
 
-__attribute__((always_inline)) static inline uint32_t efuse_ll_get_active_hp_dbias(void)
-{
-    return (EFUSE0.rd_mac_sys3.active_hp_dbias_1 << 3) | EFUSE0.rd_mac_sys2.active_hp_dbias;
-}
-
-__attribute__((always_inline)) static inline uint32_t efuse_ll_get_active_lp_dbias(void)
-{
-    return EFUSE0.rd_mac_sys3.active_lp_dbias;
-}
-
-__attribute__((always_inline)) static inline uint32_t efuse_ll_get_lslp_dbg(void)
-{
-    return EFUSE0.rd_mac_sys3.lslp_hp_dbg;
-}
-
-__attribute__((always_inline)) static inline uint32_t efuse_ll_get_lslp_hp_dbias(void)
-{
-    return EFUSE0.rd_mac_sys3.lslp_hp_dbias;
-}
-
-__attribute__((always_inline)) static inline uint32_t efuse_ll_get_dslp_dbg(void)
-{
-    return EFUSE0.rd_mac_sys3.dslp_lp_dbg;
-}
-
-__attribute__((always_inline)) static inline uint32_t efuse_ll_get_dslp_lp_dbias(void)
-{
-    return EFUSE0.rd_mac_sys3.dslp_lp_dbias;
-}
-
-__attribute__((always_inline)) static inline int32_t efuse_ll_get_dbias_vol_gap(void)
-{
-    return EFUSE0.rd_mac_sys3.lp_hp_dbias_vol_gap;
-}
-
 // use efuse_hal_get_major_chip_version() to get major chip version
 __attribute__((always_inline)) static inline uint32_t efuse_ll_get_chip_wafer_version_major(void)
 {

components/hal/esp32h2/include/hal/efuse_ll.h

@@ -46,26 +46,6 @@ __attribute__((always_inline)) static inline uint32_t efuse_ll_get_mac1(void)
     return EFUSE.rd_mac_sys_1.mac_1;
 }
 
-__attribute__((always_inline)) static inline uint32_t efuse_ll_get_active_hp_dbias(void)
-{
-    return EFUSE.rd_mac_sys_2.active_hp_dbias;
-}
-
-__attribute__((always_inline)) static inline uint32_t efuse_ll_get_active_lp_dbias(void)
-{
-    return EFUSE.rd_mac_sys_2.active_lp_dbias;
-}
-
-__attribute__((always_inline)) static inline uint32_t efuse_ll_get_dslp_dbias(void)
-{
-    return EFUSE.rd_mac_sys_2.dslp_dbias;
-}
-
-__attribute__((always_inline)) static inline int32_t efuse_ll_get_dbias_vol_gap(void)
-{
-    return (EFUSE.rd_mac_sys_3.dbias_vol_gap_sign << 4) | (EFUSE.rd_mac_sys_3.dbias_vol_gap_value2 << 1) | EFUSE.rd_mac_sys_2.dbias_vol_gap_value1;
-}
-
 __attribute__((always_inline)) static inline bool efuse_ll_get_secure_boot_v2_en(void)
 {
     return EFUSE.rd_repeat_data2.secure_boot_en;

components/hal/esp32p4/include/hal/efuse_ll.h

@@ -202,21 +202,6 @@ __attribute__((always_inline)) static inline uint32_t efuse_ll_get_controller_st
     return EFUSE.status.state;
 }
 
-__attribute__((always_inline)) static inline uint32_t efuse_ll_get_active_hp_dbias(void)
-{
-    return EFUSE.rd_mac_sys_4.active_hp_dbias;
-}
-
-__attribute__((always_inline)) static inline uint32_t efuse_ll_get_active_lp_dbias(void)
-{
-    return EFUSE.rd_mac_sys_4.active_lp_dbias;
-}
-
-__attribute__((always_inline)) static inline int32_t efuse_ll_get_dbias_vol_gap(void)
-{
-    return EFUSE.rd_mac_sys_5.lp_dcdc_dbias_vol_gap;
-}
-
 /******************* eFuse control functions *************************/
 
 #ifdef __cplusplus