Merge branch 'doc/esp_idf_flash_pwr_description' into 'master'

docs(pm): add flash sleep strategy recommendations

See merge request espressif/esp-idf!45689

components/soc/esp32c5/include/soc/Kconfig.soc_caps.in

@@ -1463,6 +1463,10 @@ config SOC_PM_RETENTION_MODULE_NUM
     int
     default 32
 
+config SOC_PM_FLASH_KEEP_POWER_IN_LSLP
+    bool
+    default y
+
 config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION
     bool
     default y

components/soc/esp32c5/include/soc/soc_caps.h

@@ -593,6 +593,8 @@
 
 #define SOC_PM_RETENTION_MODULE_NUM         (32)
 
+#define SOC_PM_FLASH_KEEP_POWER_IN_LSLP     (1)  /*!<Keep flash on in light sleep to reduce wake latency and current leakage*/
+
 /*-------------------------- CLOCK SUBSYSTEM CAPS ----------------------------------------*/
 #define SOC_CLK_RC_FAST_SUPPORT_CALIBRATION       (1)
 #define SOC_MODEM_CLOCK_IS_INDEPENDENT            (1)

components/soc/esp32c61/include/soc/Kconfig.soc_caps.in

@@ -1103,6 +1103,10 @@ config SOC_PM_RETENTION_MODULE_NUM
     int
     default 32
 
+config SOC_PM_FLASH_KEEP_POWER_IN_LSLP
+    bool
+    default y
+
 config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION
     bool
     default y

components/soc/esp32c61/include/soc/soc_caps.h

@@ -456,6 +456,8 @@
 
 #define SOC_PM_RETENTION_MODULE_NUM         (32)
 
+#define SOC_PM_FLASH_KEEP_POWER_IN_LSLP     (1)  /*!<Keep flash on in light sleep to reduce wake latency and current leakage*/
+
 /*-------------------------- CLOCK SUBSYSTEM CAPS ----------------------------------------*/
 #define SOC_CLK_RC_FAST_SUPPORT_CALIBRATION       (1)
 #define SOC_MODEM_CLOCK_IS_INDEPENDENT            (1)

components/soc/esp32h21/include/soc/Kconfig.soc_caps.in

@@ -1023,6 +1023,10 @@ config SOC_PM_SUPPORT_PMU_CLK_ICG
     bool
     default y
 
+config SOC_PM_FLASH_KEEP_POWER_IN_LSLP
+    bool
+    default y
+
 config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION
     bool
     default y

components/soc/esp32h21/include/soc/soc_caps.h

@@ -468,6 +468,8 @@
 
 #define SOC_PM_SUPPORT_PMU_CLK_ICG          (1)
 
+#define SOC_PM_FLASH_KEEP_POWER_IN_LSLP     (1)  /*!<Keep flash on in light sleep to reduce wake latency*/
+
 /*-------------------------- CLOCK SUBSYSTEM CAPS ----------------------------------------*/
 #define SOC_CLK_RC_FAST_SUPPORT_CALIBRATION       (1)
 

components/soc/esp32h4/include/soc/Kconfig.soc_caps.in

@@ -1231,6 +1231,10 @@ config SOC_PM_MODEM_LOCK_CLK_WORKAROUND
     bool
     default y
 
+config SOC_PM_FLASH_KEEP_POWER_IN_LSLP
+    bool
+    default y
+
 config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION
     bool
     default y

components/soc/esp32h4/include/soc/soc_caps.h

@@ -518,6 +518,8 @@
 #define SOC_PM_BBPLL_PD_IN_MODEM_STATE      (1)
 #define SOC_PM_MODEM_LOCK_CLK_WORKAROUND    (1) // In ESP32H4, the modem lock will lock the xtalx2, bbpll and other xpd state during modem2active.
 
+#define SOC_PM_FLASH_KEEP_POWER_IN_LSLP     (1)  /*!<Keep flash on in light sleep to reduce wake latency*/
+
 /*-------------------------- CLOCK SUBSYSTEM CAPS ----------------------------------------*/
 #define SOC_CLK_RC_FAST_SUPPORT_CALIBRATION       (1)