change(esp_hw_support): optimize pmu_sleep RAM cost

(cherry picked from commit 3c2a0cb4f6)
This commit is contained in:
wuzhenghui
2026-08-10 22:06:00 +08:00
parent 39a7850155
commit cef1e68aa9
7 changed files with 18 additions and 7 deletions

View File

@@ -34,7 +34,13 @@ entries:
if IDF_TARGET_ESP32S3 = y || IDF_TARGET_ESP32C2 = y || IDF_TARGET_ESP32C3 = y:
rtc_sleep:rtc_sleep_pu (noflash)
if SOC_PMU_SUPPORTED = y && SOC_LIGHT_SLEEP_SUPPORTED = y:
pmu_sleep (noflash)
if SPIRAM_FLASH_LOAD_TO_PSRAM = y || PM_SLP_IRAM_OPT = y:
pmu_sleep (noflash)
else:
if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE != y:
pmu_sleep:pmu_sleep_start (noflash)
pmu_sleep:pmu_sleep_finish (noflash)
pmu_sleep:pmu_sleep_get_wakup_retention_cost (noflash)
sleep_mspi (noflash)
if SPIRAM_FLASH_LOAD_TO_PSRAM = y:
pmu_init (noflash)

View File

@@ -57,7 +57,7 @@ void pmu_sleep_enable_regdma_backup(void)
pmu_hal_hp_set_sleep_active_backup_enable(PMU_instance()->hal);
}
void pmu_sleep_disable_regdma_backup(void)
IRAM_ATTR void pmu_sleep_disable_regdma_backup(void)
{
assert(PMU_instance()->hal);
pmu_hal_hp_set_sleep_active_backup_disable(PMU_instance()->hal);

View File

@@ -12,6 +12,7 @@
#include "soc/soc.h"
#include "soc/lp_aon_struct.h"
#include "hal/misc.h"
#include "esp_attr.h"
#include "esp32c5/rom/rtc.h"
@@ -75,7 +76,7 @@ static inline uint32_t lp_aon_ll_ext1_get_wakeup_pins(void)
* Set the flag to inform
* @param true: deepsleep false: lightsleep
*/
static inline void lp_aon_ll_inform_wakeup_type(bool dslp)
FORCE_INLINE_ATTR void lp_aon_ll_inform_wakeup_type(bool dslp)
{
if (dslp) {
REG_SET_BIT(RTC_SLEEP_MODE_REG, BIT(0)); /* Tell rom to run deep sleep wake stub */

View File

@@ -12,6 +12,7 @@
#include "soc/soc.h"
#include "soc/lp_aon_struct.h"
#include "hal/misc.h"
#include "esp_attr.h"
#include "esp32c6/rom/rtc.h"
@@ -75,7 +76,7 @@ static inline uint32_t lp_aon_ll_ext1_get_wakeup_pins(void)
* Set the flag to inform
* @param true: deepsleep false: lightsleep
*/
static inline void lp_aon_ll_inform_wakeup_type(bool dslp)
FORCE_INLINE_ATTR void lp_aon_ll_inform_wakeup_type(bool dslp)
{
if (dslp) {
REG_SET_BIT(RTC_SLEEP_MODE_REG, BIT(0)); /* Tell rom to run deep sleep wake stub */

View File

@@ -12,6 +12,7 @@
#include "soc/soc.h"
#include "soc/lp_aon_struct.h"
#include "hal/misc.h"
#include "esp_attr.h"
#include "esp32c61/rom/rtc.h"
@@ -75,7 +76,7 @@ static inline uint32_t lp_aon_ll_ext1_get_wakeup_pins(void)
* Set the flag to inform
* @param true: deepsleep false: lightsleep
*/
static inline void lp_aon_ll_inform_wakeup_type(bool dslp)
FORCE_INLINE_ATTR void lp_aon_ll_inform_wakeup_type(bool dslp)
{
if (dslp) {
REG_SET_BIT(RTC_SLEEP_MODE_REG, BIT(0)); /* Tell rom to run deep sleep wake stub */

View File

@@ -12,6 +12,7 @@
#include "soc/soc.h"
#include "soc/lp_aon_struct.h"
#include "hal/misc.h"
#include "esp_attr.h"
#include "esp32h2/rom/rtc.h"
@@ -75,7 +76,7 @@ static inline uint32_t lp_aon_ll_ext1_get_wakeup_pins(void)
* Set the flag to inform
* @param true: deepsleep false: lightsleep
*/
static inline void lp_aon_ll_inform_wakeup_type(bool dslp)
FORCE_INLINE_ATTR void lp_aon_ll_inform_wakeup_type(bool dslp)
{
if (dslp) {
REG_SET_BIT(RTC_SLEEP_MODE_REG, BIT(0)); /* Tell rom to run deep sleep wake stub */

View File

@@ -12,6 +12,7 @@
#include "soc/soc.h"
#include "soc/lp_aon_struct.h"
#include "hal/misc.h"
#include "esp_attr.h"
#include "esp32h21/rom/rtc.h"
@@ -75,7 +76,7 @@ static inline uint32_t lp_aon_ll_ext1_get_wakeup_pins(void)
* Set the flag to inform
* @param true: deepsleep false: lightsleep
*/
static inline void lp_aon_ll_inform_wakeup_type(bool dslp)
FORCE_INLINE_ATTR void lp_aon_ll_inform_wakeup_type(bool dslp)
{
if (dslp) {
REG_SET_BIT(RTC_SLEEP_MODE_REG, BIT(0)); /* Tell rom to run deep sleep wake stub */