From cef1e68aa9e0eec2c2cee5415e3e29510ccc7ef2 Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Mon, 10 Aug 2026 22:06:00 +0800 Subject: [PATCH] change(esp_hw_support): optimize pmu_sleep RAM cost (cherry picked from commit 3c2a0cb4f64b34bc153d4ddf29ead6aabb2d39ef) --- components/esp_hw_support/linker.lf | 8 +++++++- components/esp_hw_support/port/esp32h2/pmu_sleep.c | 2 +- components/hal/esp32c5/include/hal/lp_aon_ll.h | 3 ++- components/hal/esp32c6/include/hal/lp_aon_ll.h | 3 ++- components/hal/esp32c61/include/hal/lp_aon_ll.h | 3 ++- components/hal/esp32h2/include/hal/lp_aon_ll.h | 3 ++- components/hal/esp32h21/include/hal/lp_aon_ll.h | 3 ++- 7 files changed, 18 insertions(+), 7 deletions(-) diff --git a/components/esp_hw_support/linker.lf b/components/esp_hw_support/linker.lf index 910bc975ecd..eff1a224ba5 100644 --- a/components/esp_hw_support/linker.lf +++ b/components/esp_hw_support/linker.lf @@ -34,7 +34,13 @@ entries: if IDF_TARGET_ESP32S3 = y || IDF_TARGET_ESP32C2 = y || IDF_TARGET_ESP32C3 = y: rtc_sleep:rtc_sleep_pu (noflash) if SOC_PMU_SUPPORTED = y && SOC_LIGHT_SLEEP_SUPPORTED = y: - pmu_sleep (noflash) + if SPIRAM_FLASH_LOAD_TO_PSRAM = y || PM_SLP_IRAM_OPT = y: + pmu_sleep (noflash) + else: + if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE != y: + pmu_sleep:pmu_sleep_start (noflash) + pmu_sleep:pmu_sleep_finish (noflash) + pmu_sleep:pmu_sleep_get_wakup_retention_cost (noflash) sleep_mspi (noflash) if SPIRAM_FLASH_LOAD_TO_PSRAM = y: pmu_init (noflash) diff --git a/components/esp_hw_support/port/esp32h2/pmu_sleep.c b/components/esp_hw_support/port/esp32h2/pmu_sleep.c index bea1ec2eb8e..bd058487538 100644 --- a/components/esp_hw_support/port/esp32h2/pmu_sleep.c +++ b/components/esp_hw_support/port/esp32h2/pmu_sleep.c @@ -57,7 +57,7 @@ void pmu_sleep_enable_regdma_backup(void) pmu_hal_hp_set_sleep_active_backup_enable(PMU_instance()->hal); } -void pmu_sleep_disable_regdma_backup(void) +IRAM_ATTR void pmu_sleep_disable_regdma_backup(void) { assert(PMU_instance()->hal); pmu_hal_hp_set_sleep_active_backup_disable(PMU_instance()->hal); diff --git a/components/hal/esp32c5/include/hal/lp_aon_ll.h b/components/hal/esp32c5/include/hal/lp_aon_ll.h index bcf3207f95b..8f0bfc6e9d9 100644 --- a/components/hal/esp32c5/include/hal/lp_aon_ll.h +++ b/components/hal/esp32c5/include/hal/lp_aon_ll.h @@ -12,6 +12,7 @@ #include "soc/soc.h" #include "soc/lp_aon_struct.h" #include "hal/misc.h" +#include "esp_attr.h" #include "esp32c5/rom/rtc.h" @@ -75,7 +76,7 @@ static inline uint32_t lp_aon_ll_ext1_get_wakeup_pins(void) * Set the flag to inform * @param true: deepsleep false: lightsleep */ -static inline void lp_aon_ll_inform_wakeup_type(bool dslp) +FORCE_INLINE_ATTR void lp_aon_ll_inform_wakeup_type(bool dslp) { if (dslp) { REG_SET_BIT(RTC_SLEEP_MODE_REG, BIT(0)); /* Tell rom to run deep sleep wake stub */ diff --git a/components/hal/esp32c6/include/hal/lp_aon_ll.h b/components/hal/esp32c6/include/hal/lp_aon_ll.h index c7a77ec9184..2332a07f85e 100644 --- a/components/hal/esp32c6/include/hal/lp_aon_ll.h +++ b/components/hal/esp32c6/include/hal/lp_aon_ll.h @@ -12,6 +12,7 @@ #include "soc/soc.h" #include "soc/lp_aon_struct.h" #include "hal/misc.h" +#include "esp_attr.h" #include "esp32c6/rom/rtc.h" @@ -75,7 +76,7 @@ static inline uint32_t lp_aon_ll_ext1_get_wakeup_pins(void) * Set the flag to inform * @param true: deepsleep false: lightsleep */ -static inline void lp_aon_ll_inform_wakeup_type(bool dslp) +FORCE_INLINE_ATTR void lp_aon_ll_inform_wakeup_type(bool dslp) { if (dslp) { REG_SET_BIT(RTC_SLEEP_MODE_REG, BIT(0)); /* Tell rom to run deep sleep wake stub */ diff --git a/components/hal/esp32c61/include/hal/lp_aon_ll.h b/components/hal/esp32c61/include/hal/lp_aon_ll.h index 1cb447faade..864d6427831 100644 --- a/components/hal/esp32c61/include/hal/lp_aon_ll.h +++ b/components/hal/esp32c61/include/hal/lp_aon_ll.h @@ -12,6 +12,7 @@ #include "soc/soc.h" #include "soc/lp_aon_struct.h" #include "hal/misc.h" +#include "esp_attr.h" #include "esp32c61/rom/rtc.h" @@ -75,7 +76,7 @@ static inline uint32_t lp_aon_ll_ext1_get_wakeup_pins(void) * Set the flag to inform * @param true: deepsleep false: lightsleep */ -static inline void lp_aon_ll_inform_wakeup_type(bool dslp) +FORCE_INLINE_ATTR void lp_aon_ll_inform_wakeup_type(bool dslp) { if (dslp) { REG_SET_BIT(RTC_SLEEP_MODE_REG, BIT(0)); /* Tell rom to run deep sleep wake stub */ diff --git a/components/hal/esp32h2/include/hal/lp_aon_ll.h b/components/hal/esp32h2/include/hal/lp_aon_ll.h index 1b4fa75a3c2..92faa21c642 100644 --- a/components/hal/esp32h2/include/hal/lp_aon_ll.h +++ b/components/hal/esp32h2/include/hal/lp_aon_ll.h @@ -12,6 +12,7 @@ #include "soc/soc.h" #include "soc/lp_aon_struct.h" #include "hal/misc.h" +#include "esp_attr.h" #include "esp32h2/rom/rtc.h" @@ -75,7 +76,7 @@ static inline uint32_t lp_aon_ll_ext1_get_wakeup_pins(void) * Set the flag to inform * @param true: deepsleep false: lightsleep */ -static inline void lp_aon_ll_inform_wakeup_type(bool dslp) +FORCE_INLINE_ATTR void lp_aon_ll_inform_wakeup_type(bool dslp) { if (dslp) { REG_SET_BIT(RTC_SLEEP_MODE_REG, BIT(0)); /* Tell rom to run deep sleep wake stub */ diff --git a/components/hal/esp32h21/include/hal/lp_aon_ll.h b/components/hal/esp32h21/include/hal/lp_aon_ll.h index 64e8164180d..245e2d5758e 100644 --- a/components/hal/esp32h21/include/hal/lp_aon_ll.h +++ b/components/hal/esp32h21/include/hal/lp_aon_ll.h @@ -12,6 +12,7 @@ #include "soc/soc.h" #include "soc/lp_aon_struct.h" #include "hal/misc.h" +#include "esp_attr.h" #include "esp32h21/rom/rtc.h" @@ -75,7 +76,7 @@ static inline uint32_t lp_aon_ll_ext1_get_wakeup_pins(void) * Set the flag to inform * @param true: deepsleep false: lightsleep */ -static inline void lp_aon_ll_inform_wakeup_type(bool dslp) +FORCE_INLINE_ATTR void lp_aon_ll_inform_wakeup_type(bool dslp) { if (dslp) { REG_SET_BIT(RTC_SLEEP_MODE_REG, BIT(0)); /* Tell rom to run deep sleep wake stub */