fix(mspi): Fix a mistake reg action to set timing tuning on p4

This commit is contained in:
C.S.M
2026-08-28 11:26:12 +08:00
parent 3c2884103f
commit ac710f6315

View File

@@ -403,7 +403,7 @@ static inline void mspi_timinng_ll_enable_flash_timing_adjust_clk(uint8_t spi_nu
HAL_ASSERT(spi_num == MSPI_TIMING_LL_MSPI_ID_0);
// Should set ie always on to ensure it can read flash sr2
REG_SET_BIT(SPI_MEM_C_CTRL_REG, SPI_MEM_C_DATA_IE_ALWAYS_ON);
REG_GET_BIT(SPI_MEM_C_TIMING_CALI_REG, SPI_MEM_C_TIMING_CLK_ENA);
REG_SET_BIT(SPI_MEM_C_TIMING_CALI_REG, SPI_MEM_C_TIMING_CLK_ENA);
}
/**