From ac710f631576360bcbaec0212ea4b5b13ff0bd3f Mon Sep 17 00:00:00 2001 From: "C.S.M" Date: Fri, 28 Aug 2026 11:26:12 +0800 Subject: [PATCH] fix(mspi): Fix a mistake reg action to set timing tuning on p4 --- components/esp_hal_mspi/esp32p4/include/hal/mspi_ll.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/esp_hal_mspi/esp32p4/include/hal/mspi_ll.h b/components/esp_hal_mspi/esp32p4/include/hal/mspi_ll.h index 03e37cfe96d..f58f86945d3 100644 --- a/components/esp_hal_mspi/esp32p4/include/hal/mspi_ll.h +++ b/components/esp_hal_mspi/esp32p4/include/hal/mspi_ll.h @@ -403,7 +403,7 @@ static inline void mspi_timinng_ll_enable_flash_timing_adjust_clk(uint8_t spi_nu HAL_ASSERT(spi_num == MSPI_TIMING_LL_MSPI_ID_0); // Should set ie always on to ensure it can read flash sr2 REG_SET_BIT(SPI_MEM_C_CTRL_REG, SPI_MEM_C_DATA_IE_ALWAYS_ON); - REG_GET_BIT(SPI_MEM_C_TIMING_CALI_REG, SPI_MEM_C_TIMING_CLK_ENA); + REG_SET_BIT(SPI_MEM_C_TIMING_CALI_REG, SPI_MEM_C_TIMING_CLK_ENA); } /**