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Merge branch 'fix/use_conflict_cb_for_regi2c_when_regdma_rf_is_used_v6.1' into 'release/v6.1'

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feat(sleep): applied regi2c conflict process at regdma rf (6.1)

See merge request espressif/esp-idf!52411
This commit is contained in:
Jiang Jiang Jian
2026-09-04 17:17:09 +08:00
parent 7fa9d43d31 df470e9dee
commit 59512efe9c
49 changed files with 1363 additions and 575 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
+13 -5
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@@ -1407,10 +1407,18 @@ config SOC_PM_SUPPORT_RTC_PERIPH_PD
bool
default y
config SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY
bool
default y
config SOC_PM_SUPPORT_PMU_MODEM_STATE
bool
default y
config SOC_PM_REGDMA_MODEM_LINK_PROTECT
bool
default y
config SOC_PM_SUPPORT_PMU_CLK_ICG
bool
default y
@@ -1443,10 +1451,6 @@ config SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE
bool
default y
config SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC
int
default 4
config SOC_PM_PAU_REGDMA_COMMON_PHY_LINK_ENTRY
bool
default y
@@ -1455,13 +1459,17 @@ config SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND
bool
default y
config SOC_PM_PAU_REGDMA_LINK_IDX_PHY
int
default 4
config SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED
bool
default y
config SOC_PM_RETENTION_MODULE_NUM
int
default 32
default 40
config SOC_PM_FLASH_KEEP_POWER_IN_LSLP
bool
components/soc/esp32c5/include/soc/retention_periph_defs.h
+1
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@@ -55,6 +55,7 @@ typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_BT_BB = 29,
SLEEP_RETENTION_MODULE_802154_MAC = 30,
SLEEP_RETENTION_MODULE_MODEM_PHY = 31,
SLEEP_RETENTION_MODULE_PHY_FE = 32,
SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1
} periph_retention_module_t;
components/soc/esp32c5/include/soc/soc_caps.h
+4 -2
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@@ -570,9 +570,11 @@
#define SOC_PM_SUPPORT_MAC_BB_PD (1)
#define SOC_PM_SUPPORT_RTC_PERIPH_PD (1)
#define SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY (1)
#define SOC_PM_SUPPORT_PMU_MODEM_STATE (1)
/* macro redefine for pass esp_wifi headers md5sum check */
#define MAC_SUPPORT_PMU_MODEM_STATE SOC_PM_SUPPORT_PMU_MODEM_STATE
#define SOC_PM_REGDMA_MODEM_LINK_PROTECT (1)
#define SOC_PM_SUPPORT_PMU_CLK_ICG (1)
#define SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG (1)
@@ -585,14 +587,14 @@
#define SOC_PM_PAU_LINK_NUM (5)
#define SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE (1)
#define SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC (4) // The range of values for the link index is [0, SOC_PM_PAU_LINK_NUM)
#define SOC_PM_PAU_REGDMA_COMMON_PHY_LINK_ENTRY (1)
/** Workaround: software-triggered modem PHY retention uses dedicated WiFi MAC REGDMA, not entry link_sel */
#define SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND (1)
#define SOC_PM_PAU_REGDMA_LINK_IDX_PHY (4) // The range of values for the link index is [0, SOC_PM_PAU_LINK_NUM)
#define SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED (1)
#define SOC_PM_RETENTION_MODULE_NUM (32)
#define SOC_PM_RETENTION_MODULE_NUM (40)
#define SOC_PM_FLASH_KEEP_POWER_IN_LSLP (1) /*!<Keep flash on in light sleep to reduce wake latency and current leakage*/
components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
+9 -1
View File
@@ -1143,10 +1143,18 @@ config SOC_PM_SUPPORT_RTC_PERIPH_PD
bool
default y
config SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY
bool
default y
config SOC_PM_SUPPORT_PMU_MODEM_STATE
bool
default y
config SOC_PM_REGDMA_MODEM_LINK_PROTECT
bool
default y
config SOC_PM_SUPPORT_PMU_CLK_ICG
bool
default y
@@ -1183,7 +1191,7 @@ config SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR
bool
default y
config SOC_PM_PAU_REGDMA_LINK_WIFIMAC
config SOC_PM_PAU_REGDMA_LINK_MODEM
bool
default y
components/soc/esp32c6/include/soc/retention_periph_defs.h
+1
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@@ -54,6 +54,7 @@ typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_BLE_MAC = 28,
SLEEP_RETENTION_MODULE_BT_BB = 29,
SLEEP_RETENTION_MODULE_802154_MAC = 30,
SLEEP_RETENTION_MODULE_PHY_FE = 31,
SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1
} periph_retention_module_t;
components/soc/esp32c6/include/soc/soc_caps.h
+4 -2
View File
@@ -469,9 +469,11 @@
#define SOC_PM_SUPPORT_MAC_BB_PD (1)
#define SOC_PM_SUPPORT_RTC_PERIPH_PD (1)
#define SOC_PM_SUPPORT_PMU_MODEM_STATE (1)
#define SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY (1)
#define SOC_PM_SUPPORT_PMU_MODEM_STATE (1)
/* macro redefine for pass esp_wifi headers md5sum check */
#define MAC_SUPPORT_PMU_MODEM_STATE SOC_PM_SUPPORT_PMU_MODEM_STATE
#define SOC_PM_REGDMA_MODEM_LINK_PROTECT (1)
#define SOC_PM_SUPPORT_PMU_CLK_ICG (1)
#define SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG (1)
@@ -486,7 +488,7 @@
#define SOC_PM_PAU_LINK_NUM (4)
#define SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR (1)
#define SOC_PM_PAU_REGDMA_LINK_WIFIMAC (1)
#define SOC_PM_PAU_REGDMA_LINK_MODEM (1)
#define SOC_PM_PAU_REGDMA_UPDATE_CACHE_BEFORE_WAIT_COMPARE (1)
#define SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED (1)
components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
+9 -1
View File
@@ -1059,10 +1059,18 @@ config SOC_PM_SUPPORT_RTC_PERIPH_PD
bool
default y
config SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY
bool
default y
config SOC_PM_SUPPORT_PMU_MODEM_STATE
bool
default y
config SOC_PM_REGDMA_MODEM_LINK_PROTECT
bool
default y
config SOC_PM_SUPPORT_PMU_CLK_ICG
bool
default y
@@ -1091,7 +1099,7 @@ config SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR
bool
default y
config SOC_PM_PAU_REGDMA_LINK_WIFIMAC
config SOC_PM_PAU_REGDMA_LINK_MODEM
bool
default y
components/soc/esp32c61/include/soc/retention_periph_defs.h
+1
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@@ -47,6 +47,7 @@ typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_BLE_MAC = 28,
SLEEP_RETENTION_MODULE_BT_BB = 29,
SLEEP_RETENTION_MODULE_802154_MAC = 30,
SLEEP_RETENTION_MODULE_PHY_FE = 31,
SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1
} periph_retention_module_t;
components/soc/esp32c61/include/soc/soc_caps.h
+3 -1
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@@ -437,9 +437,11 @@
#define SOC_PM_SUPPORT_MAC_BB_PD (1)
#define SOC_PM_SUPPORT_RTC_PERIPH_PD (1)
#define SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY (1)
#define SOC_PM_SUPPORT_PMU_MODEM_STATE (1)
/* macro redefine for pass esp_wifi headers md5sum check */
#define MAC_SUPPORT_PMU_MODEM_STATE SOC_PM_SUPPORT_PMU_MODEM_STATE
#define SOC_PM_REGDMA_MODEM_LINK_PROTECT (1)
#define SOC_PM_SUPPORT_PMU_CLK_ICG (1)
#define SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG (1)
@@ -450,7 +452,7 @@
#define SOC_PM_PAU_LINK_NUM (4)
#define SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR (1)
#define SOC_PM_PAU_REGDMA_LINK_WIFIMAC (1)
#define SOC_PM_PAU_REGDMA_LINK_MODEM (1)
#define SOC_PM_PAU_REGDMA_UPDATE_CACHE_BEFORE_WAIT_COMPARE (1)
#define SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED (1)
components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
+1 -1
View File
@@ -1131,7 +1131,7 @@ config SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR
bool
default y
config SOC_PM_PAU_REGDMA_LINK_WIFIMAC
config SOC_PM_PAU_REGDMA_LINK_MODEM
bool
default y
components/soc/esp32h2/include/soc/soc_caps.h
+1 -1
View File
@@ -487,7 +487,7 @@
#define SOC_PM_PAU_LINK_NUM (4)
#define SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR (1)
#define SOC_PM_PAU_REGDMA_LINK_WIFIMAC (1)
#define SOC_PM_PAU_REGDMA_LINK_MODEM (1)
#define SOC_PM_PAU_REGDMA_UPDATE_CACHE_BEFORE_WAIT_COMPARE (1)
components/soc/esp32s31/include/soc/Kconfig.soc_caps.in
+13 -1
View File
@@ -1575,7 +1575,11 @@ config SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE
bool
default y
config SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC
config SOC_PM_PAU_REGDMA_COMMON_PHY_LINK_ENTRY
bool
default y
config SOC_PM_PAU_REGDMA_LINK_IDX_PHY
int
default 4
@@ -1587,10 +1591,18 @@ config SOC_PM_MODEM_RETENTION_BY_REGDMA
bool
default y
config SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY
bool
default y
config SOC_PM_SUPPORT_PMU_MODEM_STATE
bool
default y
config SOC_PM_REGDMA_MODEM_LINK_PROTECT
bool
default y
config SOC_PM_MODEM_STATE_USE_XTAL
bool
default y
components/soc/esp32s31/include/soc/retention_periph_defs.h
+1
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@@ -78,6 +78,7 @@ typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_802154_MAC = 50,
SLEEP_RETENTION_MODULE_CLOCK_MODEM = 51,
SLEEP_RETENTION_MODULE_MODEM_PHY = 52,
SLEEP_RETENTION_MODULE_PHY_FE = 53,
SLEEP_RETENTION_MODULE_ASRC = 53,
components/soc/esp32s31/include/soc/soc_caps.h
+4 -1
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@@ -582,13 +582,16 @@
#define SOC_PM_PAU_LINK_NUM (5)
#define SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE (1)
#define SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC (4) // The range of values for the link index is [0, SOC_PM_PAU_LINK_NUM)
#define SOC_PM_PAU_REGDMA_COMMON_PHY_LINK_ENTRY (1)
#define SOC_PM_PAU_REGDMA_LINK_IDX_PHY (4) // The range of values for the link index is [0, SOC_PM_PAU_LINK_NUM)
/** Workaround: software-triggered modem PHY retention uses dedicated WiFi MAC REGDMA, not entry link_sel */
#define SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND (1)
#define SOC_PM_MODEM_RETENTION_BY_REGDMA (1)
#define SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY (1)
#define SOC_PM_SUPPORT_PMU_MODEM_STATE (1)
#define MAC_SUPPORT_PMU_MODEM_STATE SOC_PM_SUPPORT_PMU_MODEM_STATE
#define SOC_PM_REGDMA_MODEM_LINK_PROTECT (1)
/* Since SOC APB and MODEM APB on ESP32-S31 are decoupled, XTAL can be used as SOC clock in modem state */
#define SOC_PM_MODEM_STATE_USE_XTAL (1)