From 639ae612ed64b5243d8630fc1e422b9ce08ed461 Mon Sep 17 00:00:00 2001 From: cjin Date: Fri, 4 Jul 2025 17:38:31 +0800 Subject: [PATCH 01/13] feat(phy): rename sleep modem state to sleep phy --- components/esp_hal_pmu/esp32c5/pau_hal.c | 2 +- components/esp_hal_pmu/esp32s31/pau_hal.c | 2 +- components/esp_hal_pmu/include/hal/pau_hal.h | 2 +- .../include/esp_private/esp_pau.h | 2 + .../include/esp_private/sleep_modem.h | 10 +-- .../esp_hw_support/lowpower/CMakeLists.txt | 2 +- .../{sleep_modem_state.c => sleep_phy.c} | 88 +++++++++--------- .../{sleep_modem_state.c => sleep_phy.c} | 26 +++--- .../{sleep_modem_state.c => sleep_phy.c} | 28 +++--- .../{sleep_modem_state.c => sleep_phy.c} | 90 +++++++++---------- components/esp_hw_support/port/pau_regdma.c | 2 +- components/esp_hw_support/sleep_modem.c | 8 +- components/esp_phy/src/phy_init.c | 6 +- .../esp32c5/include/soc/Kconfig.soc_caps.in | 8 +- components/soc/esp32c5/include/soc/soc_caps.h | 2 +- .../esp32c6/include/soc/Kconfig.soc_caps.in | 2 +- components/soc/esp32c6/include/soc/soc_caps.h | 2 +- .../esp32c61/include/soc/Kconfig.soc_caps.in | 2 +- .../soc/esp32c61/include/soc/soc_caps.h | 2 +- .../esp32h2/include/soc/Kconfig.soc_caps.in | 2 +- components/soc/esp32h2/include/soc/soc_caps.h | 2 +- .../esp32s31/include/soc/Kconfig.soc_caps.in | 2 +- .../soc/esp32s31/include/soc/soc_caps.h | 2 +- 23 files changed, 148 insertions(+), 146 deletions(-) rename components/esp_hw_support/lowpower/port/esp32c5/{sleep_modem_state.c => sleep_phy.c} (70%) rename components/esp_hw_support/lowpower/port/esp32c6/{sleep_modem_state.c => sleep_phy.c} (90%) rename components/esp_hw_support/lowpower/port/esp32c61/{sleep_modem_state.c => sleep_phy.c} (89%) rename components/esp_hw_support/lowpower/port/esp32s31/{sleep_modem_state.c => sleep_phy.c} (69%) diff --git a/components/esp_hal_pmu/esp32c5/pau_hal.c b/components/esp_hal_pmu/esp32c5/pau_hal.c index f627c746c34..0348105188b 100644 --- a/components/esp_hal_pmu/esp32c5/pau_hal.c +++ b/components/esp_hal_pmu/esp32c5/pau_hal.c @@ -18,7 +18,7 @@ void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_ void IRAM_ATTR pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore) { pau_ll_clear_regdma_backup_done_intr_state(hal->dev); - pau_ll_select_regdma_entry_link(hal->dev, SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC); + pau_ll_select_regdma_entry_link(hal->dev, SOC_PM_PAU_REGDMA_LINK_IDX_PHY); pau_ll_set_regdma_entry_link_backup_direction(hal->dev, backup_or_restore); pau_ll_set_regdma_entry_link_backup_start_enable(hal->dev, true); diff --git a/components/esp_hal_pmu/esp32s31/pau_hal.c b/components/esp_hal_pmu/esp32s31/pau_hal.c index 2cc34821e10..35b4107bfb6 100644 --- a/components/esp_hal_pmu/esp32s31/pau_hal.c +++ b/components/esp_hal_pmu/esp32s31/pau_hal.c @@ -18,7 +18,7 @@ void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_ void IRAM_ATTR pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore) { pau_ll_clear_regdma_backup_done_intr_state(hal->dev); - pau_ll_select_regdma_entry_link(hal->dev, SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC); + pau_ll_select_regdma_entry_link(hal->dev, SOC_PM_PAU_REGDMA_LINK_IDX_PHY); pau_ll_set_regdma_entry_link_backup_direction(hal->dev, backup_or_restore); pau_ll_set_regdma_entry_link_backup_start_enable(hal->dev, true); diff --git a/components/esp_hal_pmu/include/hal/pau_hal.h b/components/esp_hal_pmu/include/hal/pau_hal.h index 60b5c129599..0558d5e80b3 100644 --- a/components/esp_hal_pmu/include/hal/pau_hal.h +++ b/components/esp_hal_pmu/include/hal/pau_hal.h @@ -37,7 +37,7 @@ typedef struct { void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_addr_t *link_addr); #if SOC_PM_SUPPORT_PMU_MODEM_STATE -#if SOC_PM_PAU_REGDMA_LINK_WIFIMAC +#if SOC_PM_PAU_REGDMA_LINK_MODEM /** * @brief Set regdma modem link address * diff --git a/components/esp_hw_support/include/esp_private/esp_pau.h b/components/esp_hw_support/include/esp_private/esp_pau.h index 89b628affa9..a56f034fd58 100644 --- a/components/esp_hw_support/include/esp_private/esp_pau.h +++ b/components/esp_hw_support/include/esp_private/esp_pau.h @@ -26,11 +26,13 @@ extern "C" { void pau_regdma_set_entry_link_addr(pau_regdma_link_addr_t *link_entries); #if SOC_PM_SUPPORT_PMU_MODEM_STATE +#if SOC_PM_PAU_REGDMA_LINK_MODEM /** * @brief Set the address of WiFi MAC REGDMA Link in modem state * @param link_addr linked lists address */ void pau_regdma_set_modem_link_addr(void *link_addr); +#endif // SOC_PM_PAU_REGDMA_LINK_MODEM /** * @brief Software trigger regdma to perform modem link backup diff --git a/components/esp_hw_support/include/esp_private/sleep_modem.h b/components/esp_hw_support/include/esp_private/sleep_modem.h index 47ad7548e6e..635593c657f 100644 --- a/components/esp_hw_support/include/esp_private/sleep_modem.h +++ b/components/esp_hw_support/include/esp_private/sleep_modem.h @@ -228,7 +228,7 @@ void sleep_modem_wifi_modem_state_deinit(void); bool sleep_modem_wifi_modem_state_skip_light_sleep(void); /** - * @brief Function to initialize and create the modem state phy link + * @brief Function to initialize and create the phy link * @param link_head the pointer that point to the head of the created phy link * @return * - ESP_OK on success @@ -236,24 +236,24 @@ bool sleep_modem_wifi_modem_state_skip_light_sleep(void); * - ESP_ERR_INVALID_ARG if value is out of range * - ESP_ERR_INVALID_STATE if the phy module retention state is invalid */ -esp_err_t sleep_modem_state_phy_link_init(void **link_head); +esp_err_t sleep_phy_link_init(void **link_head); /** - * @brief Function to destroy and de-initialize modem state phy link + * @brief Function to destroy and de-initialize phy link * @param link_head the phy link head will be destroyed * @return * - ESP_OK on success * - ESP_ERR_INVALID_ARG if value is out of range * - ESP_ERR_INVALID_STATE if the phy module retention state is invalid */ -esp_err_t sleep_modem_state_phy_link_deinit(void *link_head); +esp_err_t sleep_phy_link_deinit(void *link_head); /** * @brief Function to configure PHY link regdma description at runtime * @param link_context PHY link regdma description conteoxt pointer * @param flags A bitmap to indicate the PHY link regdma description configuration flag */ -void sleep_modem_state_phy_link_config(void *link_context, uint32_t flags); +void sleep_phy_link_config(void *link_context, uint32_t flags); #endif #ifdef __cplusplus diff --git a/components/esp_hw_support/lowpower/CMakeLists.txt b/components/esp_hw_support/lowpower/CMakeLists.txt index 46acd179560..61d7125df1b 100644 --- a/components/esp_hw_support/lowpower/CMakeLists.txt +++ b/components/esp_hw_support/lowpower/CMakeLists.txt @@ -47,7 +47,7 @@ if(CONFIG_BT_CTRL_SLEEP_ENABLE AND CONFIG_SOC_PM_MODEM_LOCK_CLK_WORKAROUND) endif() if(CONFIG_SOC_PM_SUPPORT_PMU_MODEM_STATE) - list(APPEND srcs "port/${target}/sleep_modem_state.c") + list(APPEND srcs "port/${target}/sleep_phy.c") endif() add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" "${srcs}") diff --git a/components/esp_hw_support/lowpower/port/esp32c5/sleep_modem_state.c b/components/esp_hw_support/lowpower/port/esp32c5/sleep_phy.c similarity index 70% rename from components/esp_hw_support/lowpower/port/esp32c5/sleep_modem_state.c rename to components/esp_hw_support/lowpower/port/esp32c5/sleep_phy.c index 81d607ab9ac..d51a91dba5a 100644 --- a/components/esp_hw_support/lowpower/port/esp32c5/sleep_modem_state.c +++ b/components/esp_hw_support/lowpower/port/esp32c5/sleep_phy.c @@ -37,77 +37,77 @@ ESP_LOG_ATTR_TAG(TAG, "sleep"); -#if SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC +#if SOC_PM_PAU_REGDMA_LINK_IDX_PHY typedef struct { #define DESC_IDX_I2C_MST_ENA (0) #define DESC_IDX_I2C_MST_DIS (1) void *regdma_desc[DESC_IDX_I2C_MST_DIS + 1]; -} sleep_modem_state_phy_link_context_t; +} sleep_phy_link_context_t; -static esp_err_t sleep_modem_state_phy_wifi_init(void *arg) +static esp_err_t sleep_phy_retention_init(void *arg) { - #define WIFIMAC_ENTRY() (BIT(SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC)) + #define PHY_ENTRY() (BIT(SOC_PM_PAU_REGDMA_LINK_IDX_PHY)) - static sleep_retention_entries_config_t wifi_modem_config[] = { - [0] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x00), MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN, MODEM_LPCON_CLK_I2C_MST_EN_M, 1, 0), .owner = WIFIMAC_ENTRY() }, /* I2C MST enable */ + static sleep_retention_entries_config_t phy_modem_config[] = { + [0] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x00), MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN, MODEM_LPCON_CLK_I2C_MST_EN_M, 1, 0), .owner = PHY_ENTRY() }, /* I2C MST enable */ /* PMU or software to trigger enable RF PHY */ - [1] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x01), I2C_ANA_MST_ANA_CONF0_REG, 0x8, 0xc, 1, 0), .owner = WIFIMAC_ENTRY() }, /* BBPLL calibration enable */ - [2] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x02), PMU_RF_PWR_REG, 0xf3800000, 0xf3800000, 1, 0), .owner = WIFIMAC_ENTRY() }, - [3] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x03), SARADC_TSENS_REG, SARADC_TSENS_PU, 0x400000, 1, 0), .owner = WIFIMAC_ENTRY() }, - [4] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x04), I2C_ANA_MST_I2C_BURST_CONF_REG, 0, 0xffffffff, 1, 0), .owner = WIFIMAC_ENTRY() }, - [5] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x05), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_BURST_DONE, 0x1, 1, 0), .owner = WIFIMAC_ENTRY() }, - [6] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x06), FECOEX_SET_FREQ_SET_CHAN_REG, FECOEX_SET_CHAN_EN, 0x20000, 1, 0), .owner = WIFIMAC_ENTRY() }, - [7] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x07), FECOEX_SET_FREQ_SET_CHAN_REG, 0, 0x20000, 1, 0), .owner = WIFIMAC_ENTRY() }, - [8] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x08), FECOEX_SET_FREQ_SET_CHAN_ST_REG, FECOEX_SET_CHAN_DONE, 0x100, 1, 0), .owner = WIFIMAC_ENTRY() }, - [9] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x09), MODEM_SYSCON_WIFI_BB_CFG_REG, BIT(1), 0x2, 1, 0), .owner = WIFIMAC_ENTRY() }, - [10] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0a), FECOEX_AGC_CONF_REG, 0, 0x20000000, 1, 0), .owner = WIFIMAC_ENTRY() }, + [1] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x01), I2C_ANA_MST_ANA_CONF0_REG, 0x8, 0xc, 1, 0), .owner = PHY_ENTRY() }, /* BBPLL calibration enable */ + [2] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x02), PMU_RF_PWR_REG, 0xf3800000, 0xf3800000, 1, 0), .owner = PHY_ENTRY() }, + [3] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x03), SARADC_TSENS_REG, SARADC_TSENS_PU, 0x400000, 1, 0), .owner = PHY_ENTRY() }, + [4] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x04), I2C_ANA_MST_I2C_BURST_CONF_REG, 0, 0xffffffff, 1, 0), .owner = PHY_ENTRY() }, + [5] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x05), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_BURST_DONE, 0x1, 1, 0), .owner = PHY_ENTRY() }, + [6] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x06), FECOEX_SET_FREQ_SET_CHAN_REG, FECOEX_SET_CHAN_EN, 0x20000, 1, 0), .owner = PHY_ENTRY() }, + [7] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x07), FECOEX_SET_FREQ_SET_CHAN_REG, 0, 0x20000, 1, 0), .owner = PHY_ENTRY() }, + [8] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x08), FECOEX_SET_FREQ_SET_CHAN_ST_REG, FECOEX_SET_CHAN_DONE, 0x100, 1, 0), .owner = PHY_ENTRY() }, + [9] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x09), MODEM_SYSCON_WIFI_BB_CFG_REG, BIT(1), 0x2, 1, 0), .owner = PHY_ENTRY() }, + [10] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0a), FECOEX_AGC_CONF_REG, 0, 0x20000000, 1, 0), .owner = PHY_ENTRY() }, /* PMU to trigger enable RXBLOCK */ - [11] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0b), WDEVTXQ_BLOCK, 0, 0x1000, 1, 0), .owner = WIFIMAC_ENTRY() }, + [11] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0b), WDEVTXQ_BLOCK, 0, 0x1000, 1, 0), .owner = PHY_ENTRY() }, /* PMU or software to trigger disable RF PHY */ - [12] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0c), FECOEX_AGC_CONF_REG, FECOEX_AGC_DIS, 0x20000000, 0, 1), .owner = WIFIMAC_ENTRY() }, - [13] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0d), MODEM_SYSCON_WIFI_BB_CFG_REG, 0, 0x2, 0, 1), .owner = WIFIMAC_ENTRY() }, - [14] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0e), FECOEX_SET_FREQ_SET_CHAN_REG, 0, 0x20000, 0, 1), .owner = WIFIMAC_ENTRY() }, - [15] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0f), I2C_ANA_MST_I2C_BURST_CONF_REG, 0, 0xffffffff, 1, 1), .owner = WIFIMAC_ENTRY() }, - [16] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x10), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_BURST_DONE, 0x1, 1, 1), .owner = WIFIMAC_ENTRY() }, - [17] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x11), SARADC_TSENS_REG, 0, 0x400000, 0, 1), .owner = WIFIMAC_ENTRY() }, - [18] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x12), PMU_RF_PWR_REG, 0, 0xf3800000, 0, 1), .owner = WIFIMAC_ENTRY() }, - [19] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x13), I2C_ANA_MST_ANA_CONF0_REG, 0x4, 0xc, 0, 1), .owner = WIFIMAC_ENTRY() }, /* BBPLL calibration disable */ + [12] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0c), FECOEX_AGC_CONF_REG, FECOEX_AGC_DIS, 0x20000000, 0, 1), .owner = PHY_ENTRY() }, + [13] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0d), MODEM_SYSCON_WIFI_BB_CFG_REG, 0, 0x2, 0, 1), .owner = PHY_ENTRY() }, + [14] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0e), FECOEX_SET_FREQ_SET_CHAN_REG, 0, 0x20000, 0, 1), .owner = PHY_ENTRY() }, + [15] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0f), I2C_ANA_MST_I2C_BURST_CONF_REG, 0, 0xffffffff, 0, 1), .owner = PHY_ENTRY() }, + [16] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x10), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_BURST_DONE, 0x1, 0, 1), .owner = PHY_ENTRY() }, + [17] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x11), SARADC_TSENS_REG, 0, 0x400000, 0, 1), .owner = PHY_ENTRY() }, + [18] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x12), PMU_RF_PWR_REG, 0, 0xf3800000, 0, 1), .owner = PHY_ENTRY() }, + [19] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x13), I2C_ANA_MST_ANA_CONF0_REG, 0x4, 0xc, 0, 1), .owner = PHY_ENTRY() }, /* BBPLL calibration disable */ - [20] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x14), MODEM_LPCON_CLK_CONF_REG, 0, MODEM_LPCON_CLK_I2C_MST_EN_M, 0, 1), .owner = WIFIMAC_ENTRY() }, /* I2C MST disable */ + [20] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x14), MODEM_LPCON_CLK_CONF_REG, 0, MODEM_LPCON_CLK_I2C_MST_EN_M, 0, 1), .owner = PHY_ENTRY() }, /* I2C MST disable */ /* PMU to trigger disable RXBLOCK */ - [21] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x15), WDEVTXQ_BLOCK, 0, 0x6000, 0, 1), .owner = WIFIMAC_ENTRY() }, - [22] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x16), WDEVTXQ_BLOCK, WDEV_RXBLOCK, 0x1000, 0, 1), .owner = WIFIMAC_ENTRY() }, - [23] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x17), WDEVTXQ_BLOCK, 0, 0x6000, 0, 1), .owner = WIFIMAC_ENTRY() }, + [21] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x15), WDEVTXQ_BLOCK, 0, 0x6000, 0, 1), .owner = PHY_ENTRY() }, + [22] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x16), WDEVTXQ_BLOCK, WDEV_RXBLOCK, 0x1000, 0, 1), .owner = PHY_ENTRY() }, + [23] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x17), WDEVTXQ_BLOCK, 0, 0x6000, 0, 1), .owner = PHY_ENTRY() }, - [24] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x18), PMU_SLP_WAKEUP_CNTL7_REG, 0x200000, 0xffff0000, 1, 0), .owner = WIFIMAC_ENTRY() }, - [25] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x19), PMU_SLP_WAKEUP_CNTL7_REG, 0x9730000, 0xffff0000, 0, 1), .owner = WIFIMAC_ENTRY() } + [24] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x18), PMU_SLP_WAKEUP_CNTL7_REG, 0x200000, 0xffff0000, 1, 0), .owner = PHY_ENTRY() }, + [25] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x19), PMU_SLP_WAKEUP_CNTL7_REG, 0x9730000, 0xffff0000, 0, 1), .owner = PHY_ENTRY() } }; extern uint32_t phy_ana_i2c_master_burst_rf_onoff(bool on); - wifi_modem_config[4].config.write_wait.value = phy_ana_i2c_master_burst_rf_onoff(true); - wifi_modem_config[15].config.write_wait.value = phy_ana_i2c_master_burst_rf_onoff(false); - esp_err_t err = sleep_retention_entries_create(wifi_modem_config, ARRAY_SIZE(wifi_modem_config), 7, SLEEP_RETENTION_MODULE_MODEM_PHY); - ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate modem phy link for wifi modem state"); + phy_modem_config[4].config.write_wait.value = phy_ana_i2c_master_burst_rf_onoff(true); + phy_modem_config[15].config.write_wait.value = phy_ana_i2c_master_burst_rf_onoff(false); + esp_err_t err = sleep_retention_entries_create(phy_modem_config, ARRAY_SIZE(phy_modem_config), 7, SLEEP_RETENTION_MODULE_MODEM_PHY); + ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate modem phy link"); return ESP_OK; } #endif -esp_err_t sleep_modem_state_phy_link_init(void **link_head) +esp_err_t sleep_phy_link_init(void **link_head) { esp_err_t err = ESP_OK; -#if SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC - sleep_retention_module_init_param_t init_param = { .cbs = { .create = { .handle = sleep_modem_state_phy_wifi_init, .arg = NULL } } }; +#if SOC_PM_PAU_REGDMA_LINK_IDX_PHY + sleep_retention_module_init_param_t init_param = { .cbs = { .create = { .handle = sleep_phy_retention_init, .arg = NULL } } }; err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_MODEM_PHY, &init_param); if (err == ESP_OK) { err = sleep_retention_module_allocate(SLEEP_RETENTION_MODULE_MODEM_PHY); if (err == ESP_OK) { const int id_array[] = { REGDMA_PHY_LINK(0x00), REGDMA_PHY_LINK(0x14) }; - static DRAM_ATTR sleep_modem_state_phy_link_context_t phy_link_context; + static DRAM_ATTR sleep_phy_link_context_t phy_link_context; for (int i = 0; (err == ESP_OK) && (i < ARRAY_SIZE(phy_link_context.regdma_desc)); i++) { void *desc = sleep_retention_find_link_by_id(id_array[i]); @@ -126,10 +126,10 @@ esp_err_t sleep_modem_state_phy_link_init(void **link_head) return err; } -void IRAM_ATTR sleep_modem_state_phy_link_config(void *link_context, uint32_t flags) +void IRAM_ATTR sleep_phy_link_config(void *link_context, uint32_t flags) { -#if SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC - sleep_modem_state_phy_link_context_t *phy_link_context = (sleep_modem_state_phy_link_context_t *)link_context; +#if SOC_PM_PAU_REGDMA_LINK_IDX_PHY + sleep_phy_link_context_t *phy_link_context = (sleep_phy_link_context_t *)link_context; if (flags & BIT(0)) { regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_ENA], true, true); @@ -141,10 +141,10 @@ void IRAM_ATTR sleep_modem_state_phy_link_config(void *link_context, uint32_t fl #endif } -esp_err_t sleep_modem_state_phy_link_deinit(void *link_head) +esp_err_t sleep_phy_link_deinit(void *link_head) { esp_err_t err = ESP_OK; -#if SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC +#if SOC_PM_PAU_REGDMA_LINK_IDX_PHY err = sleep_retention_module_free(SLEEP_RETENTION_MODULE_MODEM_PHY); if (err == ESP_OK) { sleep_retention_module_deinit(SLEEP_RETENTION_MODULE_MODEM_PHY); diff --git a/components/esp_hw_support/lowpower/port/esp32c6/sleep_modem_state.c b/components/esp_hw_support/lowpower/port/esp32c6/sleep_phy.c similarity index 90% rename from components/esp_hw_support/lowpower/port/esp32c6/sleep_modem_state.c rename to components/esp_hw_support/lowpower/port/esp32c6/sleep_phy.c index 410855a9d80..e2ab5a21453 100644 --- a/components/esp_hw_support/lowpower/port/esp32c6/sleep_modem_state.c +++ b/components/esp_hw_support/lowpower/port/esp32c6/sleep_phy.c @@ -40,14 +40,14 @@ typedef struct { #define DESC_IDX_I2C_MST_SEL (1) #define DESC_IDX_I2C_MST_DIS (2) void *regdma_desc[DESC_IDX_I2C_MST_DIS + 1]; -} sleep_modem_state_phy_link_context_t; +} sleep_phy_link_context_t; -esp_err_t sleep_modem_state_phy_link_init(void **link_head) +esp_err_t sleep_phy_link_init(void **link_head) { esp_err_t err = ESP_OK; -#if SOC_PM_PAU_REGDMA_LINK_WIFIMAC - static regdma_link_config_t wifi_modem_config[] = { +#if SOC_PM_PAU_REGDMA_LINK_MODEM + static regdma_link_config_t phy_modem_config[] = { [0] = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_FE_LINK(0), MODEM_FE_DATA_BASE, MODEM_FE_DATA_BASE, 41, 0, 0), [1] = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_FE_LINK(1), MODEM_FE_CTRL_BASE, MODEM_FE_CTRL_BASE, 87, 0, 0), @@ -100,12 +100,12 @@ esp_err_t sleep_modem_state_phy_link_init(void **link_head) [38] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x24), PMU_SLP_WAKEUP_CNTL7_REG, 0x9730000, 0xffff0000, 0, 1) }; extern uint32_t phy_ana_i2c_master_burst_rf_onoff(bool on); - wifi_modem_config[7].write_wait.value = phy_ana_i2c_master_burst_rf_onoff(true); - wifi_modem_config[22].write_wait.value = phy_ana_i2c_master_burst_rf_onoff(false); + phy_modem_config[7].write_wait.value = phy_ana_i2c_master_burst_rf_onoff(true); + phy_modem_config[22].write_wait.value = phy_ana_i2c_master_burst_rf_onoff(false); void *link = NULL; - for (int i = ARRAY_SIZE(wifi_modem_config) - 1; (err == ESP_OK) && (i >= 0); i--) { - void *next = regdma_link_init_safe(&wifi_modem_config[i], false, 0, link); + for (int i = ARRAY_SIZE(phy_modem_config) - 1; (err == ESP_OK) && (i >= 0); i--) { + void *next = regdma_link_init_safe(&phy_modem_config[i], false, 0, link); if (next) { link = next; } else { @@ -117,7 +117,7 @@ esp_err_t sleep_modem_state_phy_link_init(void **link_head) pau_regdma_set_modem_link_addr(link); const int id_array[] = { REGDMA_PHY_LINK(0x00), REGDMA_PHY_LINK(0x01), REGDMA_PHY_LINK(0x1b) }; - static DRAM_ATTR sleep_modem_state_phy_link_context_t phy_link_context; + static DRAM_ATTR sleep_phy_link_context_t phy_link_context; for (int i = 0; (err == ESP_OK) && (i < ARRAY_SIZE(phy_link_context.regdma_desc)); i++) { void *desc = regdma_find_link_by_id(link, 0, id_array[i]); @@ -136,9 +136,9 @@ esp_err_t sleep_modem_state_phy_link_init(void **link_head) return err; } -void IRAM_ATTR sleep_modem_state_phy_link_config(void *link_context, uint32_t flags) +void IRAM_ATTR sleep_phy_link_config(void *link_context, uint32_t flags) { - sleep_modem_state_phy_link_context_t *phy_link_context = (sleep_modem_state_phy_link_context_t *)link_context; + sleep_phy_link_context_t *phy_link_context = (sleep_phy_link_context_t *)link_context; if (flags & BIT(0)) { regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_ENA], true, true); @@ -151,9 +151,9 @@ void IRAM_ATTR sleep_modem_state_phy_link_config(void *link_context, uint32_t fl } } -esp_err_t sleep_modem_state_phy_link_deinit(void *link_head) +esp_err_t sleep_phy_link_deinit(void *link_head) { -#if SOC_PM_PAU_REGDMA_LINK_WIFIMAC +#if SOC_PM_PAU_REGDMA_LINK_MODEM regdma_link_destroy(((sleep_modem_state_phy_link_context_t *)link_head)->link_head, 0); #endif return ESP_OK; diff --git a/components/esp_hw_support/lowpower/port/esp32c61/sleep_modem_state.c b/components/esp_hw_support/lowpower/port/esp32c61/sleep_phy.c similarity index 89% rename from components/esp_hw_support/lowpower/port/esp32c61/sleep_modem_state.c rename to components/esp_hw_support/lowpower/port/esp32c61/sleep_phy.c index 49a619a3fd6..c8c9ba9aa7a 100644 --- a/components/esp_hw_support/lowpower/port/esp32c61/sleep_modem_state.c +++ b/components/esp_hw_support/lowpower/port/esp32c61/sleep_phy.c @@ -37,14 +37,14 @@ typedef struct { #define DESC_IDX_I2C_MST_ENA (0) #define DESC_IDX_I2C_MST_DIS (1) void *regdma_desc[DESC_IDX_I2C_MST_DIS + 1]; -} sleep_modem_state_phy_link_context_t; +} sleep_phy_link_context_t; -esp_err_t sleep_modem_state_phy_link_init(void **link_head) +esp_err_t sleep_phy_link_init(void **link_head) { esp_err_t err = ESP_OK; -#if SOC_PM_PAU_REGDMA_LINK_WIFIMAC - static regdma_link_config_t wifi_modem_config[] = { +#if SOC_PM_PAU_REGDMA_LINK_MODEM + static regdma_link_config_t phy_modem_config[] = { [0] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x00), MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN, MODEM_LPCON_CLK_I2C_MST_EN_M, 1, 0), /* I2C MST enable */ /* PMU or software to trigger enable RF PHY */ @@ -71,7 +71,7 @@ esp_err_t sleep_modem_state_phy_link_init(void **link_head) /* PMU or software to trigger disable RF PHY */ [16] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x10), FECOEX_AGC_CONF_REG, FECOEX_AGC_DIS, 0x20000000, 0, 1), [17] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x11), MODEM_SYSCON_WIFI_BB_CFG_REG, 0, 0x2, 0, 1), - [18] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x12), FECOEX_SET_FREQ_SET_CHAN_REG, 0, 0x4000, 0, 1), + [18] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x12), FECOEX_SET_FREQ_SET_CHAN_REG, 0, 0x20000, 0, 1), [19] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x13), I2C_ANA_MST_I2C_BURST_CONF_REG, 0, 0xffffffff, 0, 1), [20] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x14), PMU_DATE_REG, ~I2C_ANA_MST_BURST_DONE, 0x1, 0, 1), [21] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x15), PMU_DATE_REG, ~I2C_ANA_MST_BURST_DONE, 0x1, 0, 1), @@ -95,12 +95,12 @@ esp_err_t sleep_modem_state_phy_link_init(void **link_head) [35] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x23), PMU_SLP_WAKEUP_CNTL7_REG, 0x9730000, 0xffff0000, 0, 1) }; extern uint32_t phy_ana_i2c_master_burst_rf_onoff(bool on); - wifi_modem_config[4].write_wait.value = phy_ana_i2c_master_burst_rf_onoff(true); - wifi_modem_config[19].write_wait.value = phy_ana_i2c_master_burst_rf_onoff(false); + phy_modem_config[4].write_wait.value = phy_ana_i2c_master_burst_rf_onoff(true); + phy_modem_config[19].write_wait.value = phy_ana_i2c_master_burst_rf_onoff(false); void *link = NULL; - for (int i = ARRAY_SIZE(wifi_modem_config) - 1; (err == ESP_OK) && (i >= 0); i--) { - void *next = regdma_link_init_safe(&wifi_modem_config[i], false, 0, link); + for (int i = ARRAY_SIZE(phy_modem_config) - 1; (err == ESP_OK) && (i >= 0); i--) { + void *next = regdma_link_init_safe(&phy_modem_config[i], false, 0, link); if (next) { link = next; } else { @@ -112,7 +112,7 @@ esp_err_t sleep_modem_state_phy_link_init(void **link_head) pau_regdma_set_modem_link_addr(link); const int id_array[] = { REGDMA_PHY_LINK(0x00), REGDMA_PHY_LINK(0x1a) }; - static DRAM_ATTR sleep_modem_state_phy_link_context_t phy_link_context; + static DRAM_ATTR sleep_phy_link_context_t phy_link_context; for (int i = 0; (err == ESP_OK) && (i < ARRAY_SIZE(phy_link_context.regdma_desc)); i++) { void *desc = regdma_find_link_by_id(link, 0, id_array[i]); @@ -131,9 +131,9 @@ esp_err_t sleep_modem_state_phy_link_init(void **link_head) return err; } -void IRAM_ATTR sleep_modem_state_phy_link_config(void *link_context, uint32_t flags) +void IRAM_ATTR sleep_phy_link_config(void *link_context, uint32_t flags) { - sleep_modem_state_phy_link_context_t *phy_link_context = (sleep_modem_state_phy_link_context_t *)link_context; + sleep_phy_link_context_t *phy_link_context = (sleep_phy_link_context_t *)link_context; if (flags & BIT(0)) { regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_ENA], true, true); @@ -144,9 +144,9 @@ void IRAM_ATTR sleep_modem_state_phy_link_config(void *link_context, uint32_t fl } } -esp_err_t sleep_modem_state_phy_link_deinit(void *link_head) +esp_err_t sleep_phy_link_deinit(void *link_head) { -#if SOC_PM_PAU_REGDMA_LINK_WIFIMAC +#if SOC_PM_PAU_REGDMA_LINK_MODEM regdma_link_destroy(((sleep_modem_state_phy_link_context_t *)link_head)->link_head, 0); #endif return ESP_OK; diff --git a/components/esp_hw_support/lowpower/port/esp32s31/sleep_modem_state.c b/components/esp_hw_support/lowpower/port/esp32s31/sleep_phy.c similarity index 69% rename from components/esp_hw_support/lowpower/port/esp32s31/sleep_modem_state.c rename to components/esp_hw_support/lowpower/port/esp32s31/sleep_phy.c index b7414494ab6..f3fc2cc58aa 100644 --- a/components/esp_hw_support/lowpower/port/esp32s31/sleep_modem_state.c +++ b/components/esp_hw_support/lowpower/port/esp32s31/sleep_phy.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -35,77 +35,77 @@ static __attribute__((unused)) const char *TAG = "sleep"; -#if SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC +#if SOC_PM_PAU_REGDMA_LINK_IDX_PHY typedef struct { #define DESC_IDX_I2C_MST_ENA (0) #define DESC_IDX_I2C_MST_DIS (1) void *regdma_desc[DESC_IDX_I2C_MST_DIS + 1]; -} sleep_modem_state_phy_link_context_t; +} sleep_phy_link_context_t; -static esp_err_t sleep_modem_state_phy_wifi_init(void *arg) +static esp_err_t sleep_phy_retention_init(void *arg) { - #define WIFIMAC_ENTRY() (BIT(SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC)) + #define PHY_ENTRY() (BIT(SOC_PM_PAU_REGDMA_LINK_IDX_PHY)) - static sleep_retention_entries_config_t wifi_modem_config[] = { - [0] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x00), MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN, MODEM_LPCON_CLK_I2C_MST_EN_M, 1, 0), .owner = WIFIMAC_ENTRY() }, /* I2C MST enable */ + static sleep_retention_entries_config_t phy_modem_config[] = { + [0] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x00), MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN, MODEM_LPCON_CLK_I2C_MST_EN_M, 1, 0), .owner = PHY_ENTRY() }, /* I2C MST enable */ /* PMU or software to trigger enable RF PHY */ - [1] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x01), I2C_ANA_MST_ANA_CONF0_REG, 0x8, 0xc, 1, 0), .owner = WIFIMAC_ENTRY() }, /* BBPLL calibration enable */ - [2] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x02), PMU_RF_PWR_REG, 0xffff0000, 0xffff0000, 1, 0), .owner = WIFIMAC_ENTRY() }, - [3] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x03), SARADC_TSENS_REG, SARADC_TSENS_PU, 0x400000, 1, 0), .owner = WIFIMAC_ENTRY() }, - [4] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x04), I2C_ANA_MST_I2C_BURST_CONF_REG, 0, 0xffffffff, 1, 0), .owner = WIFIMAC_ENTRY() }, - [5] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x05), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_I2C_MST_BURST_DONE, 0x1, 1, 0), .owner = WIFIMAC_ENTRY() }, - [6] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x06), FECOEX_SET_FREQ_SET_CHAN_REG, FECOEX_SET_CHAN_EN, 0x80000, 1, 0), .owner = WIFIMAC_ENTRY() }, - [7] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x07), FECOEX_SET_FREQ_SET_CHAN_REG, 0, 0x80000, 1, 0), .owner = WIFIMAC_ENTRY() }, - [8] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x08), FECOEX_SET_FREQ_SET_CHAN_ST_REG, FECOEX_SET_CHAN_DONE, 0x100, 1, 0), .owner = WIFIMAC_ENTRY() }, - [9] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x09), MODEM_SYSCON_WIFI_BB_CFG_REG, BIT(1), 0x2, 1, 0), .owner = WIFIMAC_ENTRY() }, - [10] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0a), FECOEX_AGC_CONF_REG, 0, 0x20000000, 1, 0), .owner = WIFIMAC_ENTRY() }, + [1] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x01), I2C_ANA_MST_ANA_CONF0_REG, 0x8, 0xc, 1, 0), .owner = PHY_ENTRY() }, /* BBPLL calibration enable */ + [2] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x02), PMU_RF_PWR_REG, 0xffff0000, 0xffff0000, 1, 0), .owner = PHY_ENTRY() }, + [3] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x03), SARADC_TSENS_REG, SARADC_TSENS_PU, 0x400000, 1, 0), .owner = PHY_ENTRY() }, + [4] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x04), I2C_ANA_MST_I2C_BURST_CONF_REG, 0, 0xffffffff, 1, 0), .owner = PHY_ENTRY() }, + [5] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x05), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_I2C_MST_BURST_DONE, 0x1, 1, 0), .owner = PHY_ENTRY() }, + [6] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x06), FECOEX_SET_FREQ_SET_CHAN_REG, FECOEX_SET_CHAN_EN, 0x80000, 1, 0), .owner = PHY_ENTRY() }, + [7] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x07), FECOEX_SET_FREQ_SET_CHAN_REG, 0, 0x80000, 1, 0), .owner = PHY_ENTRY() }, + [8] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x08), FECOEX_SET_FREQ_SET_CHAN_ST_REG, FECOEX_SET_CHAN_DONE, 0x100, 1, 0), .owner = PHY_ENTRY() }, + [9] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x09), MODEM_SYSCON_WIFI_BB_CFG_REG, BIT(1), 0x2, 1, 0), .owner = PHY_ENTRY() }, + [10] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0a), FECOEX_AGC_CONF_REG, 0, 0x20000000, 1, 0), .owner = PHY_ENTRY() }, /* PMU to trigger enable RXBLOCK */ - [11] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0b), WDEVTXQ_BLOCK, 0, 0x1000, 1, 0), .owner = WIFIMAC_ENTRY() }, + [11] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0b), WDEVTXQ_BLOCK, 0, 0x1000, 1, 0), .owner = PHY_ENTRY() }, /* PMU or software to trigger disable RF PHY */ - [12] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0c), FECOEX_AGC_CONF_REG, FECOEX_AGC_DIS, 0x20000000, 0, 1), .owner = WIFIMAC_ENTRY() }, - [13] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0d), MODEM_SYSCON_WIFI_BB_CFG_REG, 0, 0x2, 0, 1), .owner = WIFIMAC_ENTRY() }, - [14] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0e), FECOEX_SET_FREQ_SET_CHAN_REG, 0, 0x80000, 0, 1), .owner = WIFIMAC_ENTRY() }, - [15] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0f), I2C_ANA_MST_I2C_BURST_CONF_REG, 0, 0xffffffff, 1, 1), .owner = WIFIMAC_ENTRY() }, - [16] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x10), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_I2C_MST_BURST_DONE, 0x1, 1, 1), .owner = WIFIMAC_ENTRY() }, - [17] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x11), SARADC_TSENS_REG, 0, 0x400000, 0, 1), .owner = WIFIMAC_ENTRY() }, - [18] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x12), PMU_RF_PWR_REG, 0, 0xffff0000, 0, 1), .owner = WIFIMAC_ENTRY() }, - [19] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x13), I2C_ANA_MST_ANA_CONF0_REG, 0x4, 0xc, 0, 1), .owner = WIFIMAC_ENTRY() }, /* BBPLL calibration disable */ + [12] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0c), FECOEX_AGC_CONF_REG, FECOEX_AGC_DIS, 0x20000000, 0, 1), .owner = PHY_ENTRY() }, + [13] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0d), MODEM_SYSCON_WIFI_BB_CFG_REG, 0, 0x2, 0, 1), .owner = PHY_ENTRY() }, + [14] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0e), FECOEX_SET_FREQ_SET_CHAN_REG, 0, 0x80000, 0, 1), .owner = PHY_ENTRY() }, + [15] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0f), I2C_ANA_MST_I2C_BURST_CONF_REG, 0, 0xffffffff, 0, 1), .owner = PHY_ENTRY() }, + [16] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x10), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_I2C_MST_BURST_DONE, 0x1, 0, 1), .owner = PHY_ENTRY() }, + [17] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x11), SARADC_TSENS_REG, 0, 0x400000, 0, 1), .owner = PHY_ENTRY() }, + [18] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x12), PMU_RF_PWR_REG, 0, 0xffff0000, 0, 1), .owner = PHY_ENTRY() }, + [19] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x13), I2C_ANA_MST_ANA_CONF0_REG, 0x4, 0xc, 0, 1), .owner = PHY_ENTRY() }, /* BBPLL calibration disable */ - [20] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x14), MODEM_LPCON_CLK_CONF_REG, 0, MODEM_LPCON_CLK_I2C_MST_EN_M, 0, 1), .owner = WIFIMAC_ENTRY() }, /* I2C MST disable */ + [20] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x14), MODEM_LPCON_CLK_CONF_REG, 0, MODEM_LPCON_CLK_I2C_MST_EN_M, 0, 1), .owner = PHY_ENTRY() }, /* I2C MST disable */ /* PMU to trigger disable RXBLOCK */ - [21] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x15), WDEVTXQ_BLOCK, 0, 0x6000, 0, 1), .owner = WIFIMAC_ENTRY() }, - [22] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x16), WDEVTXQ_BLOCK, WDEV_RXBLOCK, 0x1000, 0, 1), .owner = WIFIMAC_ENTRY() }, - [23] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x17), WDEVTXQ_BLOCK, 0, 0x6000, 0, 1), .owner = WIFIMAC_ENTRY() }, + [21] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x15), WDEVTXQ_BLOCK, 0, 0x6000, 0, 1), .owner = PHY_ENTRY() }, + [22] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x16), WDEVTXQ_BLOCK, WDEV_RXBLOCK, 0x1000, 0, 1), .owner = PHY_ENTRY() }, + [23] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x17), WDEVTXQ_BLOCK, 0, 0x6000, 0, 1), .owner = PHY_ENTRY() }, - [24] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x18), PMU_SLP_WAKEUP_CNTL7_REG, 0x200000, 0xffff0000, 1, 0), .owner = WIFIMAC_ENTRY() }, - [25] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x19), PMU_SLP_WAKEUP_CNTL7_REG, 0x9730000, 0xffff0000, 0, 1), .owner = WIFIMAC_ENTRY() } + [24] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x18), PMU_SLP_WAKEUP_CNTL7_REG, 0x200000, 0xffff0000, 1, 0), .owner = PHY_ENTRY() }, + [25] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x19), PMU_SLP_WAKEUP_CNTL7_REG, 0x9730000, 0xffff0000, 0, 1), .owner = PHY_ENTRY() } }; extern uint32_t phy_ana_i2c_master_burst_rf_onoff(bool on); - wifi_modem_config[4].config.write_wait.value = phy_ana_i2c_master_burst_rf_onoff(true); - wifi_modem_config[15].config.write_wait.value = phy_ana_i2c_master_burst_rf_onoff(false); - esp_err_t err = sleep_retention_entries_create(wifi_modem_config, ARRAY_SIZE(wifi_modem_config), 7, SLEEP_RETENTION_MODULE_MODEM_PHY); - ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate modem phy link for wifi modem state"); + phy_modem_config[4].config.write_wait.value = phy_ana_i2c_master_burst_rf_onoff(true); + phy_modem_config[15].config.write_wait.value = phy_ana_i2c_master_burst_rf_onoff(false); + esp_err_t err = sleep_retention_entries_create(phy_modem_config, ARRAY_SIZE(phy_modem_config), 7, SLEEP_RETENTION_MODULE_MODEM_PHY); + ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate modem phy link"); return ESP_OK; } #endif -esp_err_t sleep_modem_state_phy_link_init(void **link_head) +esp_err_t sleep_phy_link_init(void **link_head) { esp_err_t err = ESP_OK; -#if SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC - sleep_retention_module_init_param_t init_param = { .cbs = { .create = { .handle = sleep_modem_state_phy_wifi_init, .arg = NULL } } }; +#if SOC_PM_PAU_REGDMA_LINK_IDX_PHY + sleep_retention_module_init_param_t init_param = { .cbs = { .create = { .handle = sleep_phy_retention_init, .arg = NULL } } }; err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_MODEM_PHY, &init_param); if (err == ESP_OK) { err = sleep_retention_module_allocate(SLEEP_RETENTION_MODULE_MODEM_PHY); if (err == ESP_OK) { const int id_array[] = { REGDMA_PHY_LINK(0x00), REGDMA_PHY_LINK(0x14) }; - static DRAM_ATTR sleep_modem_state_phy_link_context_t phy_link_context; + static DRAM_ATTR sleep_phy_link_context_t phy_link_context; for (int i = 0; (err == ESP_OK) && (i < ARRAY_SIZE(phy_link_context.regdma_desc)); i++) { void *desc = sleep_retention_find_link_by_id(id_array[i]); @@ -124,10 +124,10 @@ esp_err_t sleep_modem_state_phy_link_init(void **link_head) return err; } -void IRAM_ATTR sleep_modem_state_phy_link_config(void *link_context, uint32_t flags) +void IRAM_ATTR sleep_phy_link_config(void *link_context, uint32_t flags) { -#if SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC - sleep_modem_state_phy_link_context_t *phy_link_context = (sleep_modem_state_phy_link_context_t *)link_context; +#if SOC_PM_PAU_REGDMA_LINK_IDX_PHY + sleep_phy_link_context_t *phy_link_context = (sleep_phy_link_context_t *)link_context; if (flags & BIT(0)) { regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_ENA], true, true); @@ -139,10 +139,10 @@ void IRAM_ATTR sleep_modem_state_phy_link_config(void *link_context, uint32_t fl #endif } -esp_err_t sleep_modem_state_phy_link_deinit(void *link_head) +esp_err_t sleep_phy_link_deinit(void *link_head) { esp_err_t err = ESP_OK; -#if SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC +#if SOC_PM_PAU_REGDMA_LINK_IDX_PHY err = sleep_retention_module_free(SLEEP_RETENTION_MODULE_MODEM_PHY); if (err == ESP_OK) { sleep_retention_module_deinit(SLEEP_RETENTION_MODULE_MODEM_PHY); diff --git a/components/esp_hw_support/port/pau_regdma.c b/components/esp_hw_support/port/pau_regdma.c index 8ec4cb64055..da1dd929542 100644 --- a/components/esp_hw_support/port/pau_regdma.c +++ b/components/esp_hw_support/port/pau_regdma.c @@ -62,7 +62,7 @@ void pau_regdma_set_entry_link_addr(pau_regdma_link_addr_t *link_entries) } #if SOC_PM_SUPPORT_PMU_MODEM_STATE -#if SOC_PM_PAU_REGDMA_LINK_WIFIMAC +#if SOC_PM_PAU_REGDMA_LINK_MODEM void pau_regdma_set_modem_link_addr(void *link_addr) { pau_hal_set_regdma_modem_link_addr(PAU_instance()->hal, link_addr); diff --git a/components/esp_hw_support/sleep_modem.c b/components/esp_hw_support/sleep_modem.c index 72d9cc20ef0..d7abf845e12 100644 --- a/components/esp_hw_support/sleep_modem.c +++ b/components/esp_hw_support/sleep_modem.c @@ -153,7 +153,7 @@ esp_err_t sleep_modem_wifi_modem_state_init(void) void *link = NULL; if (s_sleep_modem.wifi.phy_link == NULL) { - err = sleep_modem_state_phy_link_init(&link); + err = sleep_phy_link_init(&link); if (err == ESP_OK) { s_sleep_modem.wifi.phy_link = link; s_sleep_modem.wifi.flags = 0; @@ -165,7 +165,7 @@ esp_err_t sleep_modem_wifi_modem_state_init(void) __attribute__((unused)) void sleep_modem_wifi_modem_state_deinit(void) { if (s_sleep_modem.wifi.phy_link) { - sleep_modem_state_phy_link_deinit(s_sleep_modem.wifi.phy_link); + sleep_phy_link_deinit(s_sleep_modem.wifi.phy_link); s_sleep_modem.wifi.phy_link = NULL; s_sleep_modem.wifi.flags = 0; } @@ -173,9 +173,9 @@ __attribute__((unused)) void sleep_modem_wifi_modem_state_deinit(void) void IRAM_ATTR sleep_modem_wifi_do_phy_retention(bool restore, bool wifimac_link_is_sel) { - sleep_modem_state_phy_link_config(s_sleep_modem.wifi.phy_link, 1); + sleep_phy_link_config(s_sleep_modem.wifi.phy_link, 1); sleep_retention_do_phy_retention(!restore, wifimac_link_is_sel); - sleep_modem_state_phy_link_config(s_sleep_modem.wifi.phy_link, 0); + sleep_phy_link_config(s_sleep_modem.wifi.phy_link, 0); if (!restore) { s_sleep_modem.wifi.modem_state_phy_done = 1; } diff --git a/components/esp_phy/src/phy_init.c b/components/esp_phy/src/phy_init.c index dc2dbf0dccf..29be5ee9b78 100644 --- a/components/esp_phy/src/phy_init.c +++ b/components/esp_phy/src/phy_init.c @@ -68,7 +68,7 @@ extern wifi_mac_time_update_cb_t s_wifi_mac_time_update_cb; #if SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP extern void pm_mac_modem_clear_rf_power_state(void); extern bool pm_mac_modem_rf_already_enabled(void); -#if SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC +#if SOC_PM_PAU_REGDMA_LINK_IDX_PHY extern bool pm_get_wifimac_regdma_link_selection(void); #endif #endif @@ -345,7 +345,7 @@ void esp_phy_enable(esp_phy_modem_t modem) bool wifimac_link_is_sel = false; if (!pm_mac_modem_rf_already_enabled()) { if (sleep_modem_wifi_modem_state_enabled() && sleep_modem_wifi_modem_link_done()) { -#if SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC && SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND +#if SOC_PM_PAU_REGDMA_LINK_IDX_PHY && SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND /* * A race exists between SoC wakeup and modem state sleep. After modem initiates sleep, * SoC may wake up before REGDMA completes RF close, leaving mac_modem_sleep_flag uncleared @@ -425,7 +425,7 @@ void esp_phy_disable(esp_phy_modem_t modem) pm_mac_modem_clear_rf_power_state(); if (sleep_modem_wifi_modem_state_enabled()) { bool wifimac_link_is_sel = false; -#if SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC && SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND +#if SOC_PM_PAU_REGDMA_LINK_IDX_PHY && SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND wifimac_link_is_sel = pm_get_wifimac_regdma_link_selection(); #endif sleep_modem_wifi_do_phy_retention(false, wifimac_link_is_sel); diff --git a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in index 2f353c9889a..5850df11b55 100644 --- a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in @@ -1443,10 +1443,6 @@ config SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE bool default y -config SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC - int - default 4 - config SOC_PM_PAU_REGDMA_COMMON_PHY_LINK_ENTRY bool default y @@ -1455,6 +1451,10 @@ config SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND bool default y +config SOC_PM_PAU_REGDMA_LINK_IDX_PHY + int + default 4 + config SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED bool default y diff --git a/components/soc/esp32c5/include/soc/soc_caps.h b/components/soc/esp32c5/include/soc/soc_caps.h index 7c1d6d88279..8d4af8c9707 100644 --- a/components/soc/esp32c5/include/soc/soc_caps.h +++ b/components/soc/esp32c5/include/soc/soc_caps.h @@ -585,10 +585,10 @@ #define SOC_PM_PAU_LINK_NUM (5) #define SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE (1) -#define SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC (4) // The range of values for the link index is [0, SOC_PM_PAU_LINK_NUM) #define SOC_PM_PAU_REGDMA_COMMON_PHY_LINK_ENTRY (1) /** Workaround: software-triggered modem PHY retention uses dedicated WiFi MAC REGDMA, not entry link_sel */ #define SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND (1) +#define SOC_PM_PAU_REGDMA_LINK_IDX_PHY (4) // The range of values for the link index is [0, SOC_PM_PAU_LINK_NUM) #define SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED (1) diff --git a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in index e031cfeb211..180d2f866c4 100644 --- a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in @@ -1183,7 +1183,7 @@ config SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR bool default y -config SOC_PM_PAU_REGDMA_LINK_WIFIMAC +config SOC_PM_PAU_REGDMA_LINK_MODEM bool default y diff --git a/components/soc/esp32c6/include/soc/soc_caps.h b/components/soc/esp32c6/include/soc/soc_caps.h index 4736fd8ff30..fcf9a2ba714 100644 --- a/components/soc/esp32c6/include/soc/soc_caps.h +++ b/components/soc/esp32c6/include/soc/soc_caps.h @@ -486,7 +486,7 @@ #define SOC_PM_PAU_LINK_NUM (4) #define SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR (1) -#define SOC_PM_PAU_REGDMA_LINK_WIFIMAC (1) +#define SOC_PM_PAU_REGDMA_LINK_MODEM (1) #define SOC_PM_PAU_REGDMA_UPDATE_CACHE_BEFORE_WAIT_COMPARE (1) #define SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED (1) diff --git a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in index 17b228461af..746b6bb8f14 100644 --- a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in @@ -1091,7 +1091,7 @@ config SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR bool default y -config SOC_PM_PAU_REGDMA_LINK_WIFIMAC +config SOC_PM_PAU_REGDMA_LINK_MODEM bool default y diff --git a/components/soc/esp32c61/include/soc/soc_caps.h b/components/soc/esp32c61/include/soc/soc_caps.h index 4887308a787..66e13a4b7a7 100644 --- a/components/soc/esp32c61/include/soc/soc_caps.h +++ b/components/soc/esp32c61/include/soc/soc_caps.h @@ -450,7 +450,7 @@ #define SOC_PM_PAU_LINK_NUM (4) #define SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR (1) -#define SOC_PM_PAU_REGDMA_LINK_WIFIMAC (1) +#define SOC_PM_PAU_REGDMA_LINK_MODEM (1) #define SOC_PM_PAU_REGDMA_UPDATE_CACHE_BEFORE_WAIT_COMPARE (1) #define SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED (1) diff --git a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in index 36e7b09e47f..57d1f665730 100644 --- a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in @@ -1131,7 +1131,7 @@ config SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR bool default y -config SOC_PM_PAU_REGDMA_LINK_WIFIMAC +config SOC_PM_PAU_REGDMA_LINK_MODEM bool default y diff --git a/components/soc/esp32h2/include/soc/soc_caps.h b/components/soc/esp32h2/include/soc/soc_caps.h index ba4f0d68352..56ca4055c91 100644 --- a/components/soc/esp32h2/include/soc/soc_caps.h +++ b/components/soc/esp32h2/include/soc/soc_caps.h @@ -487,7 +487,7 @@ #define SOC_PM_PAU_LINK_NUM (4) #define SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR (1) -#define SOC_PM_PAU_REGDMA_LINK_WIFIMAC (1) +#define SOC_PM_PAU_REGDMA_LINK_MODEM (1) #define SOC_PM_PAU_REGDMA_UPDATE_CACHE_BEFORE_WAIT_COMPARE (1) diff --git a/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in index 30f72a7611e..2a65ef97f9b 100644 --- a/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in @@ -1571,7 +1571,7 @@ config SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE bool default y -config SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC +config SOC_PM_PAU_REGDMA_LINK_IDX_PHY int default 4 diff --git a/components/soc/esp32s31/include/soc/soc_caps.h b/components/soc/esp32s31/include/soc/soc_caps.h index cd54063c888..3a35b0dafad 100644 --- a/components/soc/esp32s31/include/soc/soc_caps.h +++ b/components/soc/esp32s31/include/soc/soc_caps.h @@ -581,7 +581,7 @@ #define SOC_PM_PAU_LINK_NUM (5) #define SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE (1) -#define SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC (4) // The range of values for the link index is [0, SOC_PM_PAU_LINK_NUM) +#define SOC_PM_PAU_REGDMA_LINK_IDX_PHY (4) // The range of values for the link index is [0, SOC_PM_PAU_LINK_NUM) /** Workaround: software-triggered modem PHY retention uses dedicated WiFi MAC REGDMA, not entry link_sel */ #define SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND (1) From ee6cda2551c7098dbee1eff9fe86bf105a4c83e6 Mon Sep 17 00:00:00 2001 From: cjin Date: Fri, 4 Jul 2025 17:45:01 +0800 Subject: [PATCH 02/13] feat(phy): added skip method for phy retention list --- .../include/esp_private/sleep_modem.h | 9 ++++++- .../lowpower/port/esp32c5/sleep_phy.c | 20 +++++++++++++++- .../lowpower/port/esp32c6/sleep_phy.c | 23 +++++++++++++++++- .../lowpower/port/esp32c61/sleep_phy.c | 24 ++++++++++++++++++- 4 files changed, 72 insertions(+), 4 deletions(-) diff --git a/components/esp_hw_support/include/esp_private/sleep_modem.h b/components/esp_hw_support/include/esp_private/sleep_modem.h index 635593c657f..9d151cd22df 100644 --- a/components/esp_hw_support/include/esp_private/sleep_modem.h +++ b/components/esp_hw_support/include/esp_private/sleep_modem.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -254,6 +254,13 @@ esp_err_t sleep_phy_link_deinit(void *link_head); * @param flags A bitmap to indicate the PHY link regdma description configuration flag */ void sleep_phy_link_config(void *link_context, uint32_t flags); + +/** + * @brief Function to skip the retention entries involving Wi-Fi registers + * + * @param skip + */ +void sleep_phy_skip_wifi_reg(bool skip); #endif #ifdef __cplusplus diff --git a/components/esp_hw_support/lowpower/port/esp32c5/sleep_phy.c b/components/esp_hw_support/lowpower/port/esp32c5/sleep_phy.c index d51a91dba5a..6f49683f533 100644 --- a/components/esp_hw_support/lowpower/port/esp32c5/sleep_phy.c +++ b/components/esp_hw_support/lowpower/port/esp32c5/sleep_phy.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -37,6 +37,10 @@ ESP_LOG_ATTR_TAG(TAG, "sleep"); +static DRAM_ATTR struct{ + void *skip_link[4]; +} s_phy_skip_links; + #if SOC_PM_PAU_REGDMA_LINK_IDX_PHY typedef struct { @@ -48,6 +52,9 @@ typedef struct { static esp_err_t sleep_phy_retention_init(void *arg) { #define PHY_ENTRY() (BIT(SOC_PM_PAU_REGDMA_LINK_IDX_PHY)) + const int skip_idx_list[] = { + REGDMA_PHY_LINK(0x0b), REGDMA_PHY_LINK(0x15), REGDMA_PHY_LINK(0x16), REGDMA_PHY_LINK(0x17) + }; static sleep_retention_entries_config_t phy_modem_config[] = { [0] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x00), MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN, MODEM_LPCON_CLK_I2C_MST_EN_M, 1, 0), .owner = PHY_ENTRY() }, /* I2C MST enable */ @@ -92,6 +99,10 @@ static esp_err_t sleep_phy_retention_init(void *arg) phy_modem_config[15].config.write_wait.value = phy_ana_i2c_master_burst_rf_onoff(false); esp_err_t err = sleep_retention_entries_create(phy_modem_config, ARRAY_SIZE(phy_modem_config), 7, SLEEP_RETENTION_MODULE_MODEM_PHY); ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate modem phy link"); + for (int i = 0; i < ARRAY_SIZE(skip_idx_list); i++) { + s_phy_skip_links.skip_link[i] = sleep_retention_find_link_by_id(skip_idx_list[i]); + assert(s_phy_skip_links.skip_link[i] != NULL); + } return ESP_OK; } #endif @@ -153,4 +164,11 @@ esp_err_t sleep_phy_link_deinit(void *link_head) return err; } +void sleep_phy_skip_wifi_reg(bool skip) +{ + for (int i = 0; i < ARRAY_SIZE(s_phy_skip_links.skip_link); i++) { + regdma_link_set_skip_flag(s_phy_skip_links.skip_link[i], skip, skip); + } +} + #endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE */ diff --git a/components/esp_hw_support/lowpower/port/esp32c6/sleep_phy.c b/components/esp_hw_support/lowpower/port/esp32c6/sleep_phy.c index e2ab5a21453..c9a97cc4c10 100644 --- a/components/esp_hw_support/lowpower/port/esp32c6/sleep_phy.c +++ b/components/esp_hw_support/lowpower/port/esp32c6/sleep_phy.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -41,10 +41,17 @@ typedef struct { #define DESC_IDX_I2C_MST_DIS (2) void *regdma_desc[DESC_IDX_I2C_MST_DIS + 1]; } sleep_phy_link_context_t; +static DRAM_ATTR struct{ + void *skip_link[8]; +} s_phy_skip_links; esp_err_t sleep_phy_link_init(void **link_head) { esp_err_t err = ESP_OK; + const int skip_idx_list[] = { + REGDMA_PHY_LINK(0x10), REGDMA_PHY_LINK(0x1c), REGDMA_PHY_LINK(0x1d), REGDMA_PHY_LINK(0x1e), REGDMA_PHY_LINK(0x1f), + REGDMA_PHY_LINK(0x20), REGDMA_PHY_LINK(0x21), REGDMA_PHY_LINK(0x22) + }; #if SOC_PM_PAU_REGDMA_LINK_MODEM static regdma_link_config_t phy_modem_config[] = { @@ -104,10 +111,18 @@ esp_err_t sleep_phy_link_init(void **link_head) phy_modem_config[22].write_wait.value = phy_ana_i2c_master_burst_rf_onoff(false); void *link = NULL; + uint8_t skip_idx = 0; for (int i = ARRAY_SIZE(phy_modem_config) - 1; (err == ESP_OK) && (i >= 0); i--) { void *next = regdma_link_init_safe(&phy_modem_config[i], false, 0, link); if (next) { link = next; + for (int idx = 0; idx < ARRAY_SIZE(skip_idx_list); idx ++) { + if (skip_idx_list[idx] == phy_modem_config[i].id) { + s_phy_skip_links.skip_link[skip_idx] = next; + skip_idx ++; + break; + } + } } else { regdma_link_destroy(link, 0); err = ESP_ERR_NO_MEM; @@ -159,4 +174,10 @@ esp_err_t sleep_phy_link_deinit(void *link_head) return ESP_OK; } +void sleep_phy_skip_wifi_reg(bool skip) +{ + for (int i = 0; i < ARRAY_SIZE(s_phy_skip_links.skip_link); i++) { + regdma_link_set_skip_flag(s_phy_skip_links.skip_link[i], skip, skip); + } +} #endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE */ diff --git a/components/esp_hw_support/lowpower/port/esp32c61/sleep_phy.c b/components/esp_hw_support/lowpower/port/esp32c61/sleep_phy.c index c8c9ba9aa7a..e937fe41fa9 100644 --- a/components/esp_hw_support/lowpower/port/esp32c61/sleep_phy.c +++ b/components/esp_hw_support/lowpower/port/esp32c61/sleep_phy.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -38,10 +38,17 @@ typedef struct { #define DESC_IDX_I2C_MST_DIS (1) void *regdma_desc[DESC_IDX_I2C_MST_DIS + 1]; } sleep_phy_link_context_t; +static DRAM_ATTR struct{ + void *skip_link[8]; +} s_phy_skip_links; esp_err_t sleep_phy_link_init(void **link_head) { esp_err_t err = ESP_OK; + const int skip_idx_list[] = { + REGDMA_PHY_LINK(0x0f), REGDMA_PHY_LINK(0x1b), REGDMA_PHY_LINK(0x1c), REGDMA_PHY_LINK(0x1d), REGDMA_PHY_LINK(0x1e), + REGDMA_PHY_LINK(0x1f), REGDMA_PHY_LINK(0x20), REGDMA_PHY_LINK(0x21), + }; #if SOC_PM_PAU_REGDMA_LINK_MODEM static regdma_link_config_t phy_modem_config[] = { @@ -99,9 +106,17 @@ esp_err_t sleep_phy_link_init(void **link_head) phy_modem_config[19].write_wait.value = phy_ana_i2c_master_burst_rf_onoff(false); void *link = NULL; + uint8_t skip_idx = 0; for (int i = ARRAY_SIZE(phy_modem_config) - 1; (err == ESP_OK) && (i >= 0); i--) { void *next = regdma_link_init_safe(&phy_modem_config[i], false, 0, link); if (next) { + for (int idx = 0; idx < ARRAY_SIZE(skip_idx_list); idx ++) { + if (skip_idx_list[idx] == phy_modem_config[i].id) { + s_phy_skip_links.skip_link[skip_idx] = next; + skip_idx ++; + break; + } + } link = next; } else { regdma_link_destroy(link, 0); @@ -152,4 +167,11 @@ esp_err_t sleep_phy_link_deinit(void *link_head) return ESP_OK; } +void sleep_phy_skip_wifi_reg(bool skip) +{ + for (int i = 0; i < ARRAY_SIZE(s_phy_skip_links.skip_link); i++) { + regdma_link_set_skip_flag(s_phy_skip_links.skip_link[i], skip, skip); + } +} + #endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE */ From 0780acf55ec5eecda5a8583b78f66999b5e680de Mon Sep 17 00:00:00 2001 From: cjin Date: Fri, 4 Jul 2025 17:52:47 +0800 Subject: [PATCH 03/13] feat(modem): rename the sleep modem functions --- .../include/esp_private/sleep_modem.h | 22 ++++----- components/esp_hw_support/sleep_modem.c | 46 +++++++++---------- components/esp_phy/src/phy_init.c | 16 +++---- components/esp_wifi/src/wifi_init.c | 2 +- 4 files changed, 43 insertions(+), 43 deletions(-) diff --git a/components/esp_hw_support/include/esp_private/sleep_modem.h b/components/esp_hw_support/include/esp_private/sleep_modem.h index 9d151cd22df..61dc58e0897 100644 --- a/components/esp_hw_support/include/esp_private/sleep_modem.h +++ b/components/esp_hw_support/include/esp_private/sleep_modem.h @@ -80,26 +80,26 @@ void sleep_modem_mac_bb_power_up_prepare(void); #if SOC_PM_SUPPORT_PMU_MODEM_STATE /** - * @brief The retention action in the modem state of WiFi PHY module + * @brief The retention action in the modem state of PHY module * * @param restore true for restore the PHY context, false for backup the PHY context - * @param wifimac_link_is_sel true to trigger REGDMA via WiFi MAC link + * @param wifimac_link_is_sel true to trigger REGDMA via PHY link */ -void sleep_modem_wifi_do_phy_retention(bool restore, bool wifimac_link_is_sel); +void sleep_modem_do_phy_retention(bool restore, bool wifimac_link_is_sel); /** * @brief Get WiFi modem state * * @return true or false for WiFi modem state is enabled or disabled */ -bool sleep_modem_wifi_modem_state_enabled(void); +bool sleep_modem_modem_state_enabled(void); /** * @brief Get WiFi modem link done state * * @return true or false for WiFi modem link can be used to enable RF by REGDMA or can not be used */ -bool sleep_modem_wifi_modem_link_done(void); +bool sleep_modem_modem_link_done(void); #endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE */ @@ -201,21 +201,21 @@ void esp_pm_unregister_light_sleep_default_params_config_callback(void); #if SOC_PM_SUPPORT_PMU_MODEM_STATE /** - * @brief Init Wi-Fi modem state. + * @brief Init phy link. * - * This function init wifi modem state. + * This function init phy link. * @return * - ESP_OK on success * - ESP_ERR_NO_MEM if no memory for link */ -esp_err_t sleep_modem_wifi_modem_state_init(void); +esp_err_t sleep_modem_phy_init(void); /** - * @brief Deinit Wi-Fi modem state. + * @brief Deinit phy link. * - * This function deinit wifi modem state. + * This function deinit phy link. */ -void sleep_modem_wifi_modem_state_deinit(void); +void sleep_modem_phy_deinit(void); /** * @brief Function to check Wi-Fi modem state to skip light sleep. diff --git a/components/esp_hw_support/sleep_modem.c b/components/esp_hw_support/sleep_modem.c index d7abf845e12..cbb3ca75b8b 100644 --- a/components/esp_hw_support/sleep_modem.c +++ b/components/esp_hw_support/sleep_modem.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -136,59 +136,59 @@ typedef struct sleep_modem_config { void *phy_link; union { struct { - uint32_t modem_state_phy_done: 1; + uint32_t phy_link_done: 1; uint32_t reserved: 31; }; uint32_t flags; }; - } wifi; + }; } sleep_modem_config_t; -static sleep_modem_config_t s_sleep_modem = { .wifi.phy_link = NULL, .wifi.flags = 0 }; +static sleep_modem_config_t s_sleep_modem = { .phy_link = NULL, .flags = 0 }; -esp_err_t sleep_modem_wifi_modem_state_init(void) +esp_err_t sleep_modem_phy_init(void) { esp_err_t err = ESP_OK; void *link = NULL; - if (s_sleep_modem.wifi.phy_link == NULL) { + if (s_sleep_modem.phy_link == NULL) { err = sleep_phy_link_init(&link); if (err == ESP_OK) { - s_sleep_modem.wifi.phy_link = link; - s_sleep_modem.wifi.flags = 0; + s_sleep_modem.phy_link = link; + s_sleep_modem.flags = 0; } } return err; } -__attribute__((unused)) void sleep_modem_wifi_modem_state_deinit(void) +__attribute__((unused)) void sleep_modem_phy_deinit(void) { - if (s_sleep_modem.wifi.phy_link) { - sleep_phy_link_deinit(s_sleep_modem.wifi.phy_link); - s_sleep_modem.wifi.phy_link = NULL; - s_sleep_modem.wifi.flags = 0; + if (s_sleep_modem.phy_link) { + sleep_phy_link_deinit(s_sleep_modem.phy_link); + s_sleep_modem.phy_link = NULL; + s_sleep_modem.flags = 0; } } -void IRAM_ATTR sleep_modem_wifi_do_phy_retention(bool restore, bool wifimac_link_is_sel) +void IRAM_ATTR sleep_modem_do_phy_retention(bool restore, bool wifimac_link_is_sel) { - sleep_phy_link_config(s_sleep_modem.wifi.phy_link, 1); + sleep_phy_link_config(s_sleep_modem.phy_link, 1); sleep_retention_do_phy_retention(!restore, wifimac_link_is_sel); - sleep_phy_link_config(s_sleep_modem.wifi.phy_link, 0); + sleep_phy_link_config(s_sleep_modem.phy_link, 0); if (!restore) { - s_sleep_modem.wifi.modem_state_phy_done = 1; + s_sleep_modem.phy_link_done = 1; } } -inline __attribute__((always_inline)) bool sleep_modem_wifi_modem_state_enabled(void) +inline __attribute__((always_inline)) bool sleep_modem_phy_link_enabled(void) { - return (s_sleep_modem.wifi.phy_link != NULL); + return (s_sleep_modem.phy_link != NULL); } -inline __attribute__((always_inline)) bool sleep_modem_wifi_modem_link_done(void) +inline __attribute__((always_inline)) bool sleep_modem_phy_link_done(void) { - return (s_sleep_modem.wifi.modem_state_phy_done == 1); + return (s_sleep_modem.phy_link_done == 1); } #endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE */ @@ -229,7 +229,7 @@ uint32_t sleep_modem_reject_triggers(void) { uint32_t reject_triggers = 0; #if SOC_PM_SUPPORT_PMU_MODEM_STATE - reject_triggers = (s_sleep_modem.wifi.phy_link != NULL) ? PMU_MODEM_WAKEUP_PROTECT : 0; + reject_triggers = (s_sleep_modem.phy_link != NULL) ? PMU_MODEM_WAKEUP_PROTECT : 0; #endif return reject_triggers; } @@ -241,7 +241,7 @@ bool IRAM_ATTR sleep_modem_wifi_modem_state_skip_light_sleep(void) /* To block the system from entering sleep before modem link done. In light * sleep mode, the system may switch to modem state, which will cause * hardware to fail to enable RF */ - skip = sleep_modem_wifi_modem_state_enabled() && !sleep_modem_wifi_modem_link_done(); + skip = sleep_modem_phy_link_enabled() && !sleep_modem_phy_link_done(); #endif return skip; } diff --git a/components/esp_phy/src/phy_init.c b/components/esp_phy/src/phy_init.c index 29be5ee9b78..6e84d5e8c5f 100644 --- a/components/esp_phy/src/phy_init.c +++ b/components/esp_phy/src/phy_init.c @@ -344,7 +344,7 @@ void esp_phy_enable(esp_phy_modem_t modem) #if SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP bool wifimac_link_is_sel = false; if (!pm_mac_modem_rf_already_enabled()) { - if (sleep_modem_wifi_modem_state_enabled() && sleep_modem_wifi_modem_link_done()) { + if (sleep_modem_phy_link_enabled() && sleep_modem_phy_link_done()) { #if SOC_PM_PAU_REGDMA_LINK_IDX_PHY && SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND /* * A race exists between SoC wakeup and modem state sleep. After modem initiates sleep, @@ -356,9 +356,9 @@ void esp_phy_enable(esp_phy_modem_t modem) * cleared by regdma closing RF with wifimac link. * See WIFI-7246 for details. */ - wifimac_link_is_sel = pm_get_wifimac_regdma_link_selection(); + wifimac_link_is_sel = pm_get_wifimac_regdma_link_selection(); #endif - sleep_modem_wifi_do_phy_retention(true, wifimac_link_is_sel); + sleep_modem_do_phy_retention(true, wifimac_link_is_sel); } else { phy_wakeup_init(); } @@ -423,12 +423,12 @@ void esp_phy_disable(esp_phy_modem_t modem) #endif #if SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP pm_mac_modem_clear_rf_power_state(); - if (sleep_modem_wifi_modem_state_enabled()) { - bool wifimac_link_is_sel = false; + if (sleep_modem_phy_link_enabled()) { + bool wifimac_link_is_sel = false; #if SOC_PM_PAU_REGDMA_LINK_IDX_PHY && SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND wifimac_link_is_sel = pm_get_wifimac_regdma_link_selection(); #endif - sleep_modem_wifi_do_phy_retention(false, wifimac_link_is_sel); + sleep_modem_do_phy_retention(false, wifimac_link_is_sel); } else #endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP */ { @@ -506,7 +506,7 @@ void esp_phy_modem_init(void) } #endif // SOC_PM_MODEM_RETENTION_BY_BACKUPDMA #if SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP - sleep_modem_wifi_modem_state_init(); + sleep_modem_phy_init(); #endif // CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP _lock_release(&s_phy_access_lock); #endif // SOC_PM_MODEM_RETENTION_BY_BACKUPDMA || CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP @@ -531,7 +531,7 @@ void esp_phy_modem_deinit(void) #endif // CONFIG_IDF_TARGET_ESP32C3 #endif // SOC_PM_MODEM_RETENTION_BY_BACKUPDMA #if SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP - sleep_modem_wifi_modem_state_deinit(); + sleep_modem_phy_deinit(); #endif // CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP } _lock_release(&s_phy_access_lock); diff --git a/components/esp_wifi/src/wifi_init.c b/components/esp_wifi/src/wifi_init.c index e50a7f4a19c..69fe3997dba 100644 --- a/components/esp_wifi/src/wifi_init.c +++ b/components/esp_wifi/src/wifi_init.c @@ -478,7 +478,7 @@ esp_err_t esp_wifi_init(const wifi_init_config_t *config) esp_phy_modem_init(); #endif #if CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP - if (sleep_modem_wifi_modem_state_enabled()) { + if (sleep_modem_phy_link_enabled()) { esp_pm_register_skip_light_sleep_callback(sleep_modem_wifi_modem_state_skip_light_sleep); esp_wifi_internal_modem_state_configure(true); /* require WiFi to enable automatically receives the beacon */ #if ESP_MODEM_RF_FLAG_UPDATE_CB_REQUIRED From 77003bcf0c355486bb5f1d5a8b85d95f5d02680b Mon Sep 17 00:00:00 2001 From: cjin Date: Tue, 8 Jul 2025 11:58:11 +0800 Subject: [PATCH 04/13] feat(sleep_modem): allow multi modem to enable rf with regdma --- components/bt/controller/esp32/bt.c | 5 +- components/bt/controller/esp32c2/bt.c | 8 +-- components/bt/controller/esp32c3/bt.c | 6 +- components/bt/controller/esp32c5/bt.c | 8 +-- components/bt/controller/esp32c6/bt.c | 8 +-- .../controller/btdm_common/src/btdm_lp.c | 9 ++- .../include/esp_private/sleep_modem.h | 60 +++++++++++------ components/esp_hw_support/sleep_modem.c | 67 +++++++++++++------ components/esp_phy/include/esp_phy_init.h | 9 ++- components/esp_phy/src/phy_init.c | 16 +++-- components/esp_wifi/src/wifi_init.c | 6 +- 11 files changed, 129 insertions(+), 73 deletions(-) diff --git a/components/bt/controller/esp32/bt.c b/components/bt/controller/esp32/bt.c index 1e06d46246f..ad2e88d6b07 100644 --- a/components/bt/controller/esp32/bt.c +++ b/components/bt/controller/esp32/bt.c @@ -47,6 +47,7 @@ #include "esp_rom_sys.h" #include "hli_api.h" +#include "esp_private/sleep_modem.h" #if CONFIG_BLE_LOG_ENABLED #include "ble_log.h" @@ -1692,7 +1693,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg) ESP_LOGI(BTDM_LOG_TAG, "BT controller compile version [%s]", btdm_controller_get_compile_version()); - esp_phy_modem_init(); + esp_phy_modem_init(SLEEP_MODEM_BT); esp_bt_power_domain_on(); @@ -1867,7 +1868,7 @@ static void bt_controller_deinit_internal(void) esp_bt_power_domain_off(); - esp_phy_modem_deinit(); + esp_phy_modem_deinit(SLEEP_MODEM_BT); } static void bt_controller_shutdown(void* arg) diff --git a/components/bt/controller/esp32c2/bt.c b/components/bt/controller/esp32c2/bt.c index d7fb87eb60b..185a04a3c8b 100644 --- a/components/bt/controller/esp32c2/bt.c +++ b/components/bt/controller/esp32c2/bt.c @@ -48,9 +48,7 @@ #include "esp_private/esp_clk_tree_common.h" #include "bt_osi_mem.h" -#if CONFIG_FREERTOS_USE_TICKLESS_IDLE #include "esp_private/sleep_modem.h" -#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE #include "esp_private/esp_modem_clock.h" #include "freertos/FreeRTOS.h" @@ -957,7 +955,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg) os_msys_init(); - esp_phy_modem_init(); + esp_phy_modem_init(SLEEP_MODEM_BT); periph_module_enable(PERIPH_BT_MODULE); periph_module_reset(PERIPH_BT_MODULE); @@ -1037,7 +1035,7 @@ controller_init_err: #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED ble_controller_deinit(); modem_deint: - esp_phy_modem_deinit(); + esp_phy_modem_deinit(SLEEP_MODEM_BT); periph_module_disable(PERIPH_BT_MODULE); free_mem: @@ -1077,7 +1075,7 @@ esp_err_t esp_bt_controller_deinit(void) npl_freertos_mempool_deinit(); - esp_phy_modem_deinit(); + esp_phy_modem_deinit(SLEEP_MODEM_BT); ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE; diff --git a/components/bt/controller/esp32c3/bt.c b/components/bt/controller/esp32c3/bt.c index 72c02864934..b3aa280660b 100644 --- a/components/bt/controller/esp32c3/bt.c +++ b/components/bt/controller/esp32c3/bt.c @@ -62,6 +62,8 @@ #endif // CONFIG_BT_CTRL_LE_LOG_STORAGE_EN #include "esp_rom_gpio.h" #if CONFIG_BT_ENABLED +#include "esp_private/sleep_modem.h" + /* Macro definition ************************************************************************ @@ -1850,7 +1852,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg) #if CONFIG_MAC_BB_PD esp_mac_bb_pd_mem_init(); #endif - esp_phy_modem_init(); + esp_phy_modem_init(SLEEP_MODEM_BT); esp_bt_power_domain_on(); btdm_controller_mem_init(); @@ -2049,7 +2051,7 @@ static void bt_controller_deinit_internal(void) #if CONFIG_MAC_BB_PD esp_mac_bb_pd_mem_deinit(); #endif - esp_phy_modem_deinit(); + esp_phy_modem_deinit(SLEEP_MODEM_BT); #if CONFIG_BT_CTRL_LE_LOG_EN esp_bt_controller_log_deinit(); diff --git a/components/bt/controller/esp32c5/bt.c b/components/bt/controller/esp32c5/bt.c index 9cbc5830b79..40a1980de4a 100644 --- a/components/bt/controller/esp32c5/bt.c +++ b/components/bt/controller/esp32c5/bt.c @@ -44,8 +44,8 @@ #include "soc/regdma.h" #include "bt_osi_mem.h" -#if CONFIG_FREERTOS_USE_TICKLESS_IDLE #include "esp_private/sleep_modem.h" +#if CONFIG_FREERTOS_USE_TICKLESS_IDLE #include "esp_private/sleep_retention.h" #include "esp_private/pm_impl.h" #endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE @@ -1041,7 +1041,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg) modem_clock_module_mac_reset(PERIPH_BT_MODULE); /* Select slow clock source for BT momdule */ ble_rtc_clk_init(cfg); - esp_phy_modem_init(); + esp_phy_modem_init(SLEEP_MODEM_BT); if (ble_osi_coex_funcs_register((struct osi_coex_funcs_t *)&s_osi_coex_funcs_ro) != 0) { ESP_LOGW(NIMBLE_PORT_LOG_TAG, "osi coex funcs reg failed"); @@ -1136,7 +1136,7 @@ modem_deint: #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED esp_bt_controller_log_deinit(); #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED - esp_phy_modem_deinit(); + esp_phy_modem_deinit(SLEEP_MODEM_BT); modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE); modem_clock_module_disable(PERIPH_BT_MODULE); @@ -1161,7 +1161,7 @@ esp_err_t esp_bt_controller_deinit(void) os_msys_deinit(); - esp_phy_modem_deinit(); + esp_phy_modem_deinit(SLEEP_MODEM_BT); modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE); modem_clock_module_disable(PERIPH_BT_MODULE); diff --git a/components/bt/controller/esp32c6/bt.c b/components/bt/controller/esp32c6/bt.c index 56f38faf548..b7a1ff7f9b4 100644 --- a/components/bt/controller/esp32c6/bt.c +++ b/components/bt/controller/esp32c6/bt.c @@ -45,8 +45,8 @@ #include "esp_private/esp_clk_tree_common.h" #include "bt_osi_mem.h" -#if CONFIG_FREERTOS_USE_TICKLESS_IDLE #include "esp_private/sleep_modem.h" +#if CONFIG_FREERTOS_USE_TICKLESS_IDLE #include "esp_private/sleep_retention.h" #include "esp_private/pm_impl.h" #endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE @@ -1121,7 +1121,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg) modem_clock_module_mac_reset(PERIPH_BT_MODULE); /* Select slow clock source for BT momdule */ ble_rtc_clk_init(cfg); - esp_phy_modem_init(); + esp_phy_modem_init(SLEEP_MODEM_BT); if (ble_osi_coex_funcs_register((struct osi_coex_funcs_t *)&s_osi_coex_funcs_ro) != 0) { ESP_LOGW(NIMBLE_PORT_LOG_TAG, "osi coex funcs reg failed"); @@ -1219,7 +1219,7 @@ modem_deint: #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED esp_bt_controller_log_deinit(); #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED - esp_phy_modem_deinit(); + esp_phy_modem_deinit(SLEEP_MODEM_BT); modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE); modem_clock_module_disable(PERIPH_BT_MODULE); @@ -1244,7 +1244,7 @@ esp_err_t esp_bt_controller_deinit(void) os_msys_deinit(); - esp_phy_modem_deinit(); + esp_phy_modem_deinit(SLEEP_MODEM_BT); modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE); modem_clock_module_disable(PERIPH_BT_MODULE); diff --git a/components/bt/porting_btdm/controller/btdm_common/src/btdm_lp.c b/components/bt/porting_btdm/controller/btdm_common/src/btdm_lp.c index b526ff00d21..46cf5dded9b 100644 --- a/components/bt/porting_btdm/controller/btdm_common/src/btdm_lp.c +++ b/components/bt/porting_btdm/controller/btdm_common/src/btdm_lp.c @@ -19,9 +19,9 @@ #include "esp_pm.h" #endif +#include "esp_private/sleep_modem.h" #if CONFIG_FREERTOS_USE_TICKLESS_IDLE #include "esp_private/pm_impl.h" -#include "esp_private/sleep_modem.h" #include "esp_private/sleep_retention.h" #endif #include "soc/rtc.h" @@ -455,7 +455,9 @@ btdm_lp_reset(bool enable_stage) #if CONFIG_PM_ENABLE esp_pm_lock_acquire(s_pm_lock); #endif // CONFIG_PM_ENABLE - +#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY + esp_phy_modem_init(SLEEP_MODEM_BT); +#endif // SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY esp_phy_enable(PHY_MODEM_BT); #if CONFIG_IDF_TARGET_ESP32H4 // TODO: Need to be deleted. @@ -468,6 +470,9 @@ btdm_lp_reset(bool enable_stage) esp_btbb_disable(); if (s_bt_active) { esp_phy_disable(PHY_MODEM_BT); +#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY + esp_phy_modem_deinit(SLEEP_MODEM_BT); +#endif // SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY #if CONFIG_PM_ENABLE esp_pm_lock_release(s_pm_lock); #endif // CONFIG_PM_ENABLE diff --git a/components/esp_hw_support/include/esp_private/sleep_modem.h b/components/esp_hw_support/include/esp_private/sleep_modem.h index 61dc58e0897..ae6e5213dd4 100644 --- a/components/esp_hw_support/include/esp_private/sleep_modem.h +++ b/components/esp_hw_support/include/esp_private/sleep_modem.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -15,6 +15,18 @@ extern "C" { #endif +#if SOC_PM_SUPPORT_PMU_MODEM_STATE +#define SLEEP_MODEM_SKIP_I2C_MST_CLK_RETENTION (BIT(0)) +#define SLEEP_MODEM_SKIP_WIFI_RETENTION (BIT(1)) +#define SLEEP_MODEM_RESET_RETENTION (0) +#endif // SOC_PM_SUPPORT_PMU_MODEM_STATE +typedef enum { + SLEEP_MODEM_WIFI = 1, + SLEEP_MODEM_BT = 2, + SLEEP_MODEM_IEEE802154 = 4, +} sleep_modem_type_t; +#define SLEEP_MODEM_MAX_CNT 3 + /** * @file sleep_modem.h * @@ -88,18 +100,18 @@ void sleep_modem_mac_bb_power_up_prepare(void); void sleep_modem_do_phy_retention(bool restore, bool wifimac_link_is_sel); /** - * @brief Get WiFi modem state + * @brief Get phy link state * - * @return true or false for WiFi modem state is enabled or disabled + * @return true or false for phy link is enabled or disabled */ -bool sleep_modem_modem_state_enabled(void); +bool sleep_modem_phy_link_enabled(void); /** - * @brief Get WiFi modem link done state + * @brief Get phy link done state * - * @return true or false for WiFi modem link can be used to enable RF by REGDMA or can not be used + * @return true or false for phy link can be used to enable RF by REGDMA or can not be used */ -bool sleep_modem_modem_link_done(void); +bool sleep_modem_phy_link_done(void); #endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE */ @@ -204,18 +216,31 @@ void esp_pm_unregister_light_sleep_default_params_config_callback(void); * @brief Init phy link. * * This function init phy link. - * @return - * - ESP_OK on success - * - ESP_ERR_NO_MEM if no memory for link + * + * @param modem_mask bit mask of modems + * @return + * - ESP_OK on success + * - ESP_ERR_NO_MEM if no memory for link */ -esp_err_t sleep_modem_phy_init(void); +esp_err_t sleep_modem_phy_init(sleep_modem_type_t modem_mask); /** - * @brief Deinit phy link. + * @brief Deinit phy link. * * This function deinit phy link. + * + * @param modem_mask bit mask of modems */ -void sleep_modem_phy_deinit(void); +void sleep_modem_phy_deinit(sleep_modem_type_t modem_mask); + +/** + * @brief Check if Wi-Fi modem state is enabled + * + * @return + * - true Wi-Fi modem state is enabled + * - false Wi-Fi modem state is disabled + */ +bool sleep_modem_wifi_modem_state_is_enabled(void); /** * @brief Function to check Wi-Fi modem state to skip light sleep. @@ -254,14 +279,7 @@ esp_err_t sleep_phy_link_deinit(void *link_head); * @param flags A bitmap to indicate the PHY link regdma description configuration flag */ void sleep_phy_link_config(void *link_context, uint32_t flags); - -/** - * @brief Function to skip the retention entries involving Wi-Fi registers - * - * @param skip - */ -void sleep_phy_skip_wifi_reg(bool skip); -#endif +#endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE */ #ifdef __cplusplus } diff --git a/components/esp_hw_support/sleep_modem.c b/components/esp_hw_support/sleep_modem.c index cbb3ca75b8b..5a31d69a557 100644 --- a/components/esp_hw_support/sleep_modem.c +++ b/components/esp_hw_support/sleep_modem.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -132,43 +132,68 @@ void mac_bb_power_up_cb_execute(void) #if SOC_PM_SUPPORT_PMU_MODEM_STATE typedef struct sleep_modem_config { - struct { - void *phy_link; - union { - struct { - uint32_t phy_link_done: 1; - uint32_t reserved: 31; - }; - uint32_t flags; + _lock_t phy_link_lock; + void *phy_link; + union { + struct { + uint32_t phy_link_done: 1; + uint32_t modem_mask: SLEEP_MODEM_MAX_CNT; + uint32_t reserved: 27 - SLEEP_MODEM_MAX_CNT; }; + uint32_t flags; }; } sleep_modem_config_t; static sleep_modem_config_t s_sleep_modem = { .phy_link = NULL, .flags = 0 }; +bool IRAM_ATTR sleep_modem_wifi_modem_state_is_enabled(void) +{ + return !!(s_sleep_modem.modem_mask & SLEEP_MODEM_WIFI); +} -esp_err_t sleep_modem_phy_init(void) +esp_err_t sleep_modem_phy_init(sleep_modem_type_t modem_mask) { esp_err_t err = ESP_OK; - void *link = NULL; - if (s_sleep_modem.phy_link == NULL) { - err = sleep_phy_link_init(&link); - if (err == ESP_OK) { - s_sleep_modem.phy_link = link; - s_sleep_modem.flags = 0; + + _lock_acquire(&s_sleep_modem.phy_link_lock); + if (s_sleep_modem.modem_mask & modem_mask) { + _lock_release(&s_sleep_modem.phy_link_lock); + return ESP_ERR_INVALID_ARG; + } + + if (!s_sleep_modem.modem_mask) { + s_sleep_modem.flags = 0; + if (!s_sleep_modem.phy_link) { + err = sleep_phy_link_init(&link); + if (err == ESP_OK) { + s_sleep_modem.phy_link = link; + } else { + _lock_release(&s_sleep_modem.phy_link_lock); + return err; + } } } + s_sleep_modem.modem_mask |= modem_mask; + _lock_release(&s_sleep_modem.phy_link_lock); return err; } -__attribute__((unused)) void sleep_modem_phy_deinit(void) +__attribute__((unused)) void sleep_modem_phy_deinit(sleep_modem_type_t modem_mask) { - if (s_sleep_modem.phy_link) { + _lock_acquire(&s_sleep_modem.phy_link_lock); + if (!(s_sleep_modem.modem_mask & modem_mask)) { + _lock_release(&s_sleep_modem.phy_link_lock); + return; + } + + s_sleep_modem.modem_mask &= ~modem_mask; + if (s_sleep_modem.phy_link && !s_sleep_modem.modem_mask) { sleep_phy_link_deinit(s_sleep_modem.phy_link); s_sleep_modem.phy_link = NULL; s_sleep_modem.flags = 0; } + _lock_release(&s_sleep_modem.phy_link_lock); } void IRAM_ATTR sleep_modem_do_phy_retention(bool restore, bool wifimac_link_is_sel) @@ -230,7 +255,7 @@ uint32_t sleep_modem_reject_triggers(void) uint32_t reject_triggers = 0; #if SOC_PM_SUPPORT_PMU_MODEM_STATE reject_triggers = (s_sleep_modem.phy_link != NULL) ? PMU_MODEM_WAKEUP_PROTECT : 0; -#endif +#endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE */ return reject_triggers; } @@ -241,8 +266,8 @@ bool IRAM_ATTR sleep_modem_wifi_modem_state_skip_light_sleep(void) /* To block the system from entering sleep before modem link done. In light * sleep mode, the system may switch to modem state, which will cause * hardware to fail to enable RF */ - skip = sleep_modem_phy_link_enabled() && !sleep_modem_phy_link_done(); -#endif + skip = sleep_modem_wifi_modem_state_is_enabled() && !sleep_modem_phy_link_done(); +#endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE */ return skip; } diff --git a/components/esp_phy/include/esp_phy_init.h b/components/esp_phy/include/esp_phy_init.h index c41e970c5a6..b05c9fe82c8 100644 --- a/components/esp_phy/include/esp_phy_init.h +++ b/components/esp_phy/include/esp_phy_init.h @@ -200,15 +200,18 @@ void esp_phy_load_cal_and_init(void); /** * @brief Initialize backup memory for Phy power up/down + * + * @param modem Modem calling phy retention */ -void esp_phy_modem_init(void); +void esp_phy_modem_init(uint8_t modem); /** * @brief Deinitialize backup memory for Phy power up/down * Set phy_init_flag if all modems deinit on ESP32C3 + * + * @param modem Modem calling phy retention */ -void esp_phy_modem_deinit(void); - +void esp_phy_modem_deinit(uint8_t modem); #if CONFIG_MAC_BB_PD /** * @brief Initialize backup memory for MAC and Baseband power up/down diff --git a/components/esp_phy/src/phy_init.c b/components/esp_phy/src/phy_init.c index 6e84d5e8c5f..e3521d75452 100644 --- a/components/esp_phy/src/phy_init.c +++ b/components/esp_phy/src/phy_init.c @@ -495,7 +495,7 @@ void esp_wifi_bt_power_domain_off(void) #endif // SOC_PM_SUPPORT_MODEM_PD || SOC_PM_SUPPORT_WIFI_PD } -void esp_phy_modem_init(void) +void esp_phy_modem_init(uint8_t modem) { #if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA || CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP _lock_acquire(&s_phy_access_lock); @@ -506,17 +506,21 @@ void esp_phy_modem_init(void) } #endif // SOC_PM_MODEM_RETENTION_BY_BACKUPDMA #if SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP - sleep_modem_phy_init(); + sleep_modem_phy_init(modem); #endif // CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP _lock_release(&s_phy_access_lock); #endif // SOC_PM_MODEM_RETENTION_BY_BACKUPDMA || CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP } -void esp_phy_modem_deinit(void) +void esp_phy_modem_deinit(uint8_t modem) { #if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA || CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP _lock_acquire(&s_phy_access_lock); + if (s_phy_modem_init_ref == 0) { + _lock_release(&s_phy_access_lock); + return; + } s_phy_modem_init_ref--; if (s_phy_modem_init_ref == 0) { #if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA @@ -530,10 +534,10 @@ void esp_phy_modem_deinit(void) phy_init_flag(); #endif // CONFIG_IDF_TARGET_ESP32C3 #endif // SOC_PM_MODEM_RETENTION_BY_BACKUPDMA -#if SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP - sleep_modem_phy_deinit(); -#endif // CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP } +#if SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP + sleep_modem_phy_deinit(modem); +#endif // SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP _lock_release(&s_phy_access_lock); #endif // SOC_PM_MODEM_RETENTION_BY_BACKUPDMA || CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP } diff --git a/components/esp_wifi/src/wifi_init.c b/components/esp_wifi/src/wifi_init.c index 69fe3997dba..7209805dbe5 100644 --- a/components/esp_wifi/src/wifi_init.c +++ b/components/esp_wifi/src/wifi_init.c @@ -282,7 +282,7 @@ static esp_err_t wifi_deinit_internal(void) #endif #endif /* CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP */ #ifdef CONFIG_ESP_PHY_ENABLED - esp_phy_modem_deinit(); + esp_phy_modem_deinit(SLEEP_MODEM_WIFI); #endif s_wifi_inited = false; @@ -475,10 +475,10 @@ esp_err_t esp_wifi_init(const wifi_init_config_t *config) esp_wifi_mac_pd_mem_init(); #endif #ifdef CONFIG_ESP_PHY_ENABLED - esp_phy_modem_init(); + esp_phy_modem_init(SLEEP_MODEM_WIFI); #endif #if CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP - if (sleep_modem_phy_link_enabled()) { + if (sleep_modem_wifi_modem_state_is_enabled()) { esp_pm_register_skip_light_sleep_callback(sleep_modem_wifi_modem_state_skip_light_sleep); esp_wifi_internal_modem_state_configure(true); /* require WiFi to enable automatically receives the beacon */ #if ESP_MODEM_RF_FLAG_UPDATE_CB_REQUIRED From 506e3b30edbdaa49c7564e5c0be6cf31c2d5593c Mon Sep 17 00:00:00 2001 From: cjin Date: Tue, 8 Jul 2025 12:24:33 +0800 Subject: [PATCH 05/13] feat(sleep): add config SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY --- components/esp_hal_pmu/include/hal/pau_hal.h | 2 +- .../esp_hw_support/include/esp_private/esp_pau.h | 4 ++-- .../esp_hw_support/include/esp_private/sleep_modem.h | 12 ++++++------ components/esp_hw_support/lowpower/CMakeLists.txt | 2 +- .../esp_hw_support/lowpower/port/esp32c5/sleep_phy.c | 4 ++-- .../esp_hw_support/lowpower/port/esp32c6/sleep_phy.c | 4 ++-- .../lowpower/port/esp32c61/sleep_phy.c | 4 ++-- .../lowpower/port/esp32s31/sleep_phy.c | 4 ++-- components/esp_hw_support/port/pau_regdma.c | 4 ++-- components/esp_hw_support/sleep_modem.c | 4 ++-- components/esp_phy/src/phy_init.c | 10 ++++++++-- .../soc/esp32c5/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32c5/include/soc/soc_caps.h | 1 + .../soc/esp32c6/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32c6/include/soc/soc_caps.h | 3 ++- .../soc/esp32c61/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32c61/include/soc/soc_caps.h | 1 + .../soc/esp32s31/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32s31/include/soc/soc_caps.h | 1 + 19 files changed, 51 insertions(+), 25 deletions(-) diff --git a/components/esp_hal_pmu/include/hal/pau_hal.h b/components/esp_hal_pmu/include/hal/pau_hal.h index 0558d5e80b3..662713e773d 100644 --- a/components/esp_hal_pmu/include/hal/pau_hal.h +++ b/components/esp_hal_pmu/include/hal/pau_hal.h @@ -36,7 +36,7 @@ typedef struct { */ void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_addr_t *link_addr); -#if SOC_PM_SUPPORT_PMU_MODEM_STATE +#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY #if SOC_PM_PAU_REGDMA_LINK_MODEM /** * @brief Set regdma modem link address diff --git a/components/esp_hw_support/include/esp_private/esp_pau.h b/components/esp_hw_support/include/esp_private/esp_pau.h index a56f034fd58..0b17f68c5a2 100644 --- a/components/esp_hw_support/include/esp_private/esp_pau.h +++ b/components/esp_hw_support/include/esp_private/esp_pau.h @@ -25,7 +25,7 @@ extern "C" { */ void pau_regdma_set_entry_link_addr(pau_regdma_link_addr_t *link_entries); -#if SOC_PM_SUPPORT_PMU_MODEM_STATE +#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY #if SOC_PM_PAU_REGDMA_LINK_MODEM /** * @brief Set the address of WiFi MAC REGDMA Link in modem state @@ -55,7 +55,6 @@ void pau_regdma_trigger_wifimac_link_backup(void); */ void pau_regdma_trigger_wifimac_link_restore(void); #endif -#endif #if SOC_PM_RETENTION_SW_TRIGGER_REGDMA /** @@ -102,6 +101,7 @@ void pau_regdma_trigger_extra_link_restore(void); */ bool pau_regdma_enable_aon_link_entry(bool enable); #endif +#endif #ifdef __cplusplus } diff --git a/components/esp_hw_support/include/esp_private/sleep_modem.h b/components/esp_hw_support/include/esp_private/sleep_modem.h index ae6e5213dd4..873295f7ae8 100644 --- a/components/esp_hw_support/include/esp_private/sleep_modem.h +++ b/components/esp_hw_support/include/esp_private/sleep_modem.h @@ -15,11 +15,11 @@ extern "C" { #endif -#if SOC_PM_SUPPORT_PMU_MODEM_STATE +#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY #define SLEEP_MODEM_SKIP_I2C_MST_CLK_RETENTION (BIT(0)) #define SLEEP_MODEM_SKIP_WIFI_RETENTION (BIT(1)) #define SLEEP_MODEM_RESET_RETENTION (0) -#endif // SOC_PM_SUPPORT_PMU_MODEM_STATE +#endif // SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY typedef enum { SLEEP_MODEM_WIFI = 1, SLEEP_MODEM_BT = 2, @@ -89,7 +89,7 @@ void sleep_modem_mac_bb_power_down_prepare(void); void sleep_modem_mac_bb_power_up_prepare(void); #endif // SOC_PM_RETENTION_HAS_CLOCK_BUG && CONFIG_MAC_BB_PD -#if SOC_PM_SUPPORT_PMU_MODEM_STATE +#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY /** * @brief The retention action in the modem state of PHY module @@ -113,7 +113,7 @@ bool sleep_modem_phy_link_enabled(void); */ bool sleep_modem_phy_link_done(void); -#endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE */ +#endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY */ /** * @brief Whether the current target allows Modem or the TOP power domain to be powered off during light sleep @@ -211,7 +211,7 @@ void esp_pm_register_light_sleep_default_params_config_callback(update_light_sle */ void esp_pm_unregister_light_sleep_default_params_config_callback(void); -#if SOC_PM_SUPPORT_PMU_MODEM_STATE +#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY /** * @brief Init phy link. * @@ -279,7 +279,7 @@ esp_err_t sleep_phy_link_deinit(void *link_head); * @param flags A bitmap to indicate the PHY link regdma description configuration flag */ void sleep_phy_link_config(void *link_context, uint32_t flags); -#endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE */ +#endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY */ #ifdef __cplusplus } diff --git a/components/esp_hw_support/lowpower/CMakeLists.txt b/components/esp_hw_support/lowpower/CMakeLists.txt index 61d7125df1b..f997c8b2666 100644 --- a/components/esp_hw_support/lowpower/CMakeLists.txt +++ b/components/esp_hw_support/lowpower/CMakeLists.txt @@ -46,7 +46,7 @@ if(CONFIG_BT_CTRL_SLEEP_ENABLE AND CONFIG_SOC_PM_MODEM_LOCK_CLK_WORKAROUND) APPEND PROPERTY INTERFACE_LINK_LIBRARIES "-u sleep_power_system_retention_init") endif() -if(CONFIG_SOC_PM_SUPPORT_PMU_MODEM_STATE) +if(CONFIG_SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY) list(APPEND srcs "port/${target}/sleep_phy.c") endif() diff --git a/components/esp_hw_support/lowpower/port/esp32c5/sleep_phy.c b/components/esp_hw_support/lowpower/port/esp32c5/sleep_phy.c index 6f49683f533..829ff294d8d 100644 --- a/components/esp_hw_support/lowpower/port/esp32c5/sleep_phy.c +++ b/components/esp_hw_support/lowpower/port/esp32c5/sleep_phy.c @@ -17,7 +17,7 @@ #include "esp_private/sleep_modem.h" #include "esp_private/sleep_retention.h" -#if SOC_PM_SUPPORT_PMU_MODEM_STATE +#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY #define SARADC_TSENS_REG (0x6000e058) #define SARADC_TSENS_PU (BIT(22)) @@ -171,4 +171,4 @@ void sleep_phy_skip_wifi_reg(bool skip) } } -#endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE */ +#endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY */ diff --git a/components/esp_hw_support/lowpower/port/esp32c6/sleep_phy.c b/components/esp_hw_support/lowpower/port/esp32c6/sleep_phy.c index c9a97cc4c10..c229945c745 100644 --- a/components/esp_hw_support/lowpower/port/esp32c6/sleep_phy.c +++ b/components/esp_hw_support/lowpower/port/esp32c6/sleep_phy.c @@ -16,7 +16,7 @@ #include "esp_private/sleep_modem.h" #include "esp_private/sleep_retention.h" -#if SOC_PM_SUPPORT_PMU_MODEM_STATE +#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY #define SARADC_TSENS_REG (0x6000e058) #define SARADC_TSENS_PU (BIT(22)) @@ -180,4 +180,4 @@ void sleep_phy_skip_wifi_reg(bool skip) regdma_link_set_skip_flag(s_phy_skip_links.skip_link[i], skip, skip); } } -#endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE */ +#endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY */ diff --git a/components/esp_hw_support/lowpower/port/esp32c61/sleep_phy.c b/components/esp_hw_support/lowpower/port/esp32c61/sleep_phy.c index e937fe41fa9..b63768f41dd 100644 --- a/components/esp_hw_support/lowpower/port/esp32c61/sleep_phy.c +++ b/components/esp_hw_support/lowpower/port/esp32c61/sleep_phy.c @@ -16,7 +16,7 @@ #include "esp_private/sleep_modem.h" #include "esp_private/sleep_retention.h" -#if SOC_PM_SUPPORT_PMU_MODEM_STATE +#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY #define SARADC_TSENS_REG (0x6000e058) #define SARADC_TSENS_PU (BIT(22)) @@ -174,4 +174,4 @@ void sleep_phy_skip_wifi_reg(bool skip) } } -#endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE */ +#endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY */ diff --git a/components/esp_hw_support/lowpower/port/esp32s31/sleep_phy.c b/components/esp_hw_support/lowpower/port/esp32s31/sleep_phy.c index f3fc2cc58aa..afe078ed07f 100644 --- a/components/esp_hw_support/lowpower/port/esp32s31/sleep_phy.c +++ b/components/esp_hw_support/lowpower/port/esp32s31/sleep_phy.c @@ -17,7 +17,7 @@ #include "esp_private/sleep_modem.h" #include "esp_private/sleep_retention.h" -#if SOC_PM_SUPPORT_PMU_MODEM_STATE +#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY #define SARADC_TSENS_REG (0x20818000) #define SARADC_TSENS_PU (BIT(22)) @@ -151,4 +151,4 @@ esp_err_t sleep_phy_link_deinit(void *link_head) return err; } -#endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE */ +#endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY */ diff --git a/components/esp_hw_support/port/pau_regdma.c b/components/esp_hw_support/port/pau_regdma.c index da1dd929542..17069be9c32 100644 --- a/components/esp_hw_support/port/pau_regdma.c +++ b/components/esp_hw_support/port/pau_regdma.c @@ -61,7 +61,7 @@ void pau_regdma_set_entry_link_addr(pau_regdma_link_addr_t *link_entries) pau_hal_set_regdma_entry_link_addr(PAU_instance()->hal, link_entries); } -#if SOC_PM_SUPPORT_PMU_MODEM_STATE +#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY #if SOC_PM_PAU_REGDMA_LINK_MODEM void pau_regdma_set_modem_link_addr(void *link_addr) { @@ -80,6 +80,7 @@ void IRAM_ATTR pau_regdma_trigger_modem_link_restore(void) pau_hal_start_regdma_modem_link(PAU_instance()->hal, false); pau_hal_stop_regdma_modem_link(PAU_instance()->hal); } +#endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY */ #if SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND void IRAM_ATTR pau_regdma_trigger_wifimac_link_backup(void) @@ -94,7 +95,6 @@ void IRAM_ATTR pau_regdma_trigger_wifimac_link_restore(void) pau_hal_stop_regdma_wifimac_link(PAU_instance()->hal); } #endif -#endif #if SOC_PM_RETENTION_SW_TRIGGER_REGDMA void IRAM_ATTR pau_regdma_set_system_link_addr(void *link_addr) diff --git a/components/esp_hw_support/sleep_modem.c b/components/esp_hw_support/sleep_modem.c index 5a31d69a557..397b3fbe358 100644 --- a/components/esp_hw_support/sleep_modem.c +++ b/components/esp_hw_support/sleep_modem.c @@ -129,7 +129,7 @@ void mac_bb_power_up_cb_execute(void) #endif ///CONFIG_MAC_BB_PD -#if SOC_PM_SUPPORT_PMU_MODEM_STATE +#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY typedef struct sleep_modem_config { _lock_t phy_link_lock; @@ -216,7 +216,7 @@ inline __attribute__((always_inline)) bool sleep_modem_phy_link_done(void) return (s_sleep_modem.phy_link_done == 1); } -#endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE */ +#endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY */ bool modem_domain_pd_allowed(void) { diff --git a/components/esp_phy/src/phy_init.c b/components/esp_phy/src/phy_init.c index e3521d75452..99c239ee521 100644 --- a/components/esp_phy/src/phy_init.c +++ b/components/esp_phy/src/phy_init.c @@ -341,9 +341,11 @@ void esp_phy_enable(esp_phy_modem_t modem) #endif s_is_phy_calibrated = true; } else { +#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY #if SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP bool wifimac_link_is_sel = false; if (!pm_mac_modem_rf_already_enabled()) { +#endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP */ if (sleep_modem_phy_link_enabled() && sleep_modem_phy_link_done()) { #if SOC_PM_PAU_REGDMA_LINK_IDX_PHY && SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND /* @@ -362,12 +364,14 @@ void esp_phy_enable(esp_phy_modem_t modem) } else { phy_wakeup_init(); } +#if SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP } else { phy_wakeup_from_modem_state_extra_init(); } +#endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP */ #else phy_wakeup_init(); -#endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP */ +#endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY */ #if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA phy_digital_regs_load(); @@ -421,8 +425,10 @@ void esp_phy_disable(esp_phy_modem_t modem) #if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA phy_digital_regs_store(); #endif +#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY #if SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP pm_mac_modem_clear_rf_power_state(); +#endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP */ if (sleep_modem_phy_link_enabled()) { bool wifimac_link_is_sel = false; #if SOC_PM_PAU_REGDMA_LINK_IDX_PHY && SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND @@ -430,7 +436,7 @@ void esp_phy_disable(esp_phy_modem_t modem) #endif sleep_modem_do_phy_retention(false, wifimac_link_is_sel); } else -#endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP */ +#endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY */ { // Disable PHY and RF. phy_close_rf(); diff --git a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in index 5850df11b55..1090af40bdc 100644 --- a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in @@ -1407,6 +1407,10 @@ config SOC_PM_SUPPORT_RTC_PERIPH_PD bool default y +config SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY + bool + default y + config SOC_PM_SUPPORT_PMU_MODEM_STATE bool default y diff --git a/components/soc/esp32c5/include/soc/soc_caps.h b/components/soc/esp32c5/include/soc/soc_caps.h index 8d4af8c9707..5345cf8308c 100644 --- a/components/soc/esp32c5/include/soc/soc_caps.h +++ b/components/soc/esp32c5/include/soc/soc_caps.h @@ -570,6 +570,7 @@ #define SOC_PM_SUPPORT_MAC_BB_PD (1) #define SOC_PM_SUPPORT_RTC_PERIPH_PD (1) +#define SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY (1) #define SOC_PM_SUPPORT_PMU_MODEM_STATE (1) /* macro redefine for pass esp_wifi headers md5sum check */ #define MAC_SUPPORT_PMU_MODEM_STATE SOC_PM_SUPPORT_PMU_MODEM_STATE diff --git a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in index 180d2f866c4..95bee1b8424 100644 --- a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in @@ -1143,6 +1143,10 @@ config SOC_PM_SUPPORT_RTC_PERIPH_PD bool default y +config SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY + bool + default y + config SOC_PM_SUPPORT_PMU_MODEM_STATE bool default y diff --git a/components/soc/esp32c6/include/soc/soc_caps.h b/components/soc/esp32c6/include/soc/soc_caps.h index fcf9a2ba714..19ff88bbc20 100644 --- a/components/soc/esp32c6/include/soc/soc_caps.h +++ b/components/soc/esp32c6/include/soc/soc_caps.h @@ -469,7 +469,8 @@ #define SOC_PM_SUPPORT_MAC_BB_PD (1) #define SOC_PM_SUPPORT_RTC_PERIPH_PD (1) -#define SOC_PM_SUPPORT_PMU_MODEM_STATE (1) +#define SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY (1) +#define SOC_PM_SUPPORT_PMU_MODEM_STATE (1) /* macro redefine for pass esp_wifi headers md5sum check */ #define MAC_SUPPORT_PMU_MODEM_STATE SOC_PM_SUPPORT_PMU_MODEM_STATE diff --git a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in index 746b6bb8f14..ffb508da939 100644 --- a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in @@ -1059,6 +1059,10 @@ config SOC_PM_SUPPORT_RTC_PERIPH_PD bool default y +config SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY + bool + default y + config SOC_PM_SUPPORT_PMU_MODEM_STATE bool default y diff --git a/components/soc/esp32c61/include/soc/soc_caps.h b/components/soc/esp32c61/include/soc/soc_caps.h index 66e13a4b7a7..c63c5f90f8f 100644 --- a/components/soc/esp32c61/include/soc/soc_caps.h +++ b/components/soc/esp32c61/include/soc/soc_caps.h @@ -437,6 +437,7 @@ #define SOC_PM_SUPPORT_MAC_BB_PD (1) #define SOC_PM_SUPPORT_RTC_PERIPH_PD (1) +#define SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY (1) #define SOC_PM_SUPPORT_PMU_MODEM_STATE (1) /* macro redefine for pass esp_wifi headers md5sum check */ #define MAC_SUPPORT_PMU_MODEM_STATE SOC_PM_SUPPORT_PMU_MODEM_STATE diff --git a/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in index 2a65ef97f9b..fde94ba06be 100644 --- a/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in @@ -1583,6 +1583,10 @@ config SOC_PM_MODEM_RETENTION_BY_REGDMA bool default y +config SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY + bool + default y + config SOC_PM_SUPPORT_PMU_MODEM_STATE bool default y diff --git a/components/soc/esp32s31/include/soc/soc_caps.h b/components/soc/esp32s31/include/soc/soc_caps.h index 3a35b0dafad..f02c6551b43 100644 --- a/components/soc/esp32s31/include/soc/soc_caps.h +++ b/components/soc/esp32s31/include/soc/soc_caps.h @@ -586,6 +586,7 @@ #define SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND (1) #define SOC_PM_MODEM_RETENTION_BY_REGDMA (1) +#define SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY (1) #define SOC_PM_SUPPORT_PMU_MODEM_STATE (1) #define MAC_SUPPORT_PMU_MODEM_STATE SOC_PM_SUPPORT_PMU_MODEM_STATE /* Since SOC APB and MODEM APB on ESP32-S31 are decoupled, XTAL can be used as SOC clock in modem state */ From a79519d8440849de74f578a78e02b73b70dc7a74 Mon Sep 17 00:00:00 2001 From: cjin Date: Thu, 6 Nov 2025 15:56:32 +0800 Subject: [PATCH 06/13] feat(phy): add skip list to sleep phy link context and fix deinit crash --- .../include/esp_private/sleep_modem.h | 12 ++-- .../lowpower/port/esp32c5/sleep_phy.c | 64 +++++++++--------- .../lowpower/port/esp32c6/sleep_phy.c | 58 ++++++++--------- .../lowpower/port/esp32c61/sleep_phy.c | 65 +++++++++---------- .../lowpower/port/esp32s31/sleep_phy.c | 38 ++++++++--- components/esp_phy/Kconfig | 6 ++ components/esp_phy/include/esp_phy_init.h | 1 + components/esp_phy/src/phy_init.c | 34 ++++++---- 8 files changed, 157 insertions(+), 121 deletions(-) diff --git a/components/esp_hw_support/include/esp_private/sleep_modem.h b/components/esp_hw_support/include/esp_private/sleep_modem.h index 873295f7ae8..0f3a564b13b 100644 --- a/components/esp_hw_support/include/esp_private/sleep_modem.h +++ b/components/esp_hw_support/include/esp_private/sleep_modem.h @@ -95,9 +95,9 @@ void sleep_modem_mac_bb_power_up_prepare(void); * @brief The retention action in the modem state of PHY module * * @param restore true for restore the PHY context, false for backup the PHY context - * @param wifimac_link_is_sel true to trigger REGDMA via PHY link + * @param flags Configure flags for phy link */ -void sleep_modem_do_phy_retention(bool restore, bool wifimac_link_is_sel); +void sleep_modem_do_phy_retention(bool restore, bool wifimac_link_is_sel, uint8_t flags); /** * @brief Get phy link state @@ -254,24 +254,24 @@ bool sleep_modem_wifi_modem_state_skip_light_sleep(void); /** * @brief Function to initialize and create the phy link - * @param link_head the pointer that point to the head of the created phy link + * @param link_context PHY link regdma description conteoxt pointer * @return * - ESP_OK on success * - ESP_ERR_NO_MEM if no memory for link * - ESP_ERR_INVALID_ARG if value is out of range * - ESP_ERR_INVALID_STATE if the phy module retention state is invalid */ -esp_err_t sleep_phy_link_init(void **link_head); +esp_err_t sleep_phy_link_init(void **link_context); /** * @brief Function to destroy and de-initialize phy link - * @param link_head the phy link head will be destroyed + * @param link_context PHY link regdma description conteoxt pointer * @return * - ESP_OK on success * - ESP_ERR_INVALID_ARG if value is out of range * - ESP_ERR_INVALID_STATE if the phy module retention state is invalid */ -esp_err_t sleep_phy_link_deinit(void *link_head); +esp_err_t sleep_phy_link_deinit(void *link_context); /** * @brief Function to configure PHY link regdma description at runtime diff --git a/components/esp_hw_support/lowpower/port/esp32c5/sleep_phy.c b/components/esp_hw_support/lowpower/port/esp32c5/sleep_phy.c index 829ff294d8d..a3bd8d480f4 100644 --- a/components/esp_hw_support/lowpower/port/esp32c5/sleep_phy.c +++ b/components/esp_hw_support/lowpower/port/esp32c5/sleep_phy.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -37,24 +37,20 @@ ESP_LOG_ATTR_TAG(TAG, "sleep"); -static DRAM_ATTR struct{ - void *skip_link[4]; -} s_phy_skip_links; - #if SOC_PM_PAU_REGDMA_LINK_IDX_PHY typedef struct { #define DESC_IDX_I2C_MST_ENA (0) #define DESC_IDX_I2C_MST_DIS (1) - void *regdma_desc[DESC_IDX_I2C_MST_DIS + 1]; +#define DESC_IDX_SKIP_WIFI (2) +#define DESC_SKIP_WIFI_ENTRY_CNT (4) +#define DESC_SKIP_WIFI_RESTORE_ENTRY_CNT (1) + void *regdma_desc[DESC_IDX_I2C_MST_DIS + 1 + DESC_SKIP_WIFI_ENTRY_CNT]; } sleep_phy_link_context_t; static esp_err_t sleep_phy_retention_init(void *arg) { #define PHY_ENTRY() (BIT(SOC_PM_PAU_REGDMA_LINK_IDX_PHY)) - const int skip_idx_list[] = { - REGDMA_PHY_LINK(0x0b), REGDMA_PHY_LINK(0x15), REGDMA_PHY_LINK(0x16), REGDMA_PHY_LINK(0x17) - }; static sleep_retention_entries_config_t phy_modem_config[] = { [0] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x00), MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN, MODEM_LPCON_CLK_I2C_MST_EN_M, 1, 0), .owner = PHY_ENTRY() }, /* I2C MST enable */ @@ -99,15 +95,11 @@ static esp_err_t sleep_phy_retention_init(void *arg) phy_modem_config[15].config.write_wait.value = phy_ana_i2c_master_burst_rf_onoff(false); esp_err_t err = sleep_retention_entries_create(phy_modem_config, ARRAY_SIZE(phy_modem_config), 7, SLEEP_RETENTION_MODULE_MODEM_PHY); ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate modem phy link"); - for (int i = 0; i < ARRAY_SIZE(skip_idx_list); i++) { - s_phy_skip_links.skip_link[i] = sleep_retention_find_link_by_id(skip_idx_list[i]); - assert(s_phy_skip_links.skip_link[i] != NULL); - } return ESP_OK; } #endif -esp_err_t sleep_phy_link_init(void **link_head) +esp_err_t sleep_phy_link_init(void **link_context) { esp_err_t err = ESP_OK; @@ -117,7 +109,9 @@ esp_err_t sleep_phy_link_init(void **link_head) if (err == ESP_OK) { err = sleep_retention_module_allocate(SLEEP_RETENTION_MODULE_MODEM_PHY); if (err == ESP_OK) { - const int id_array[] = { REGDMA_PHY_LINK(0x00), REGDMA_PHY_LINK(0x14) }; + const int id_array[] = { REGDMA_PHY_LINK(0x00), REGDMA_PHY_LINK(0x14), /* I2C MST CLK entries */ + REGDMA_PHY_LINK(0x0b), REGDMA_PHY_LINK(0x15), REGDMA_PHY_LINK(0x16), REGDMA_PHY_LINK(0x17) /* WiFi Related entries */ + }; static DRAM_ATTR sleep_phy_link_context_t phy_link_context; for (int i = 0; (err == ESP_OK) && (i < ARRAY_SIZE(phy_link_context.regdma_desc)); i++) { @@ -129,10 +123,13 @@ esp_err_t sleep_phy_link_init(void **link_head) } } if (err == ESP_OK) { - *link_head = (void *)&phy_link_context; + *link_context = (void *)&phy_link_context; } } } + if (err != ESP_OK) { + sleep_phy_link_deinit(NULL); + } #endif return err; } @@ -142,33 +139,36 @@ void IRAM_ATTR sleep_phy_link_config(void *link_context, uint32_t flags) #if SOC_PM_PAU_REGDMA_LINK_IDX_PHY sleep_phy_link_context_t *phy_link_context = (sleep_phy_link_context_t *)link_context; - if (flags & BIT(0)) { + if (flags & SLEEP_MODEM_SKIP_I2C_MST_CLK_RETENTION) { regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_ENA], true, true); regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_DIS], true, true); } else { regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_ENA], true, false); regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_DIS], false, true); } + + if (flags & SLEEP_MODEM_SKIP_WIFI_RETENTION) { + for (int i = 0; i < DESC_SKIP_WIFI_ENTRY_CNT; i++) { + regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_SKIP_WIFI + i], true, true); + } + } else { + for (int i = 0; i < DESC_SKIP_WIFI_ENTRY_CNT; i++) { + if (i < DESC_SKIP_WIFI_RESTORE_ENTRY_CNT) { + regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_SKIP_WIFI + i], true, false); + } else { + regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_SKIP_WIFI + i], false, true); + } + } + } #endif } -esp_err_t sleep_phy_link_deinit(void *link_head) +esp_err_t sleep_phy_link_deinit(void *link_context) { - esp_err_t err = ESP_OK; #if SOC_PM_PAU_REGDMA_LINK_IDX_PHY - err = sleep_retention_module_free(SLEEP_RETENTION_MODULE_MODEM_PHY); - if (err == ESP_OK) { - sleep_retention_module_deinit(SLEEP_RETENTION_MODULE_MODEM_PHY); - } + sleep_retention_module_free(SLEEP_RETENTION_MODULE_MODEM_PHY); + sleep_retention_module_deinit(SLEEP_RETENTION_MODULE_MODEM_PHY); #endif - return err; + return ESP_OK; } - -void sleep_phy_skip_wifi_reg(bool skip) -{ - for (int i = 0; i < ARRAY_SIZE(s_phy_skip_links.skip_link); i++) { - regdma_link_set_skip_flag(s_phy_skip_links.skip_link[i], skip, skip); - } -} - #endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY */ diff --git a/components/esp_hw_support/lowpower/port/esp32c6/sleep_phy.c b/components/esp_hw_support/lowpower/port/esp32c6/sleep_phy.c index c229945c745..54cdba41f19 100644 --- a/components/esp_hw_support/lowpower/port/esp32c6/sleep_phy.c +++ b/components/esp_hw_support/lowpower/port/esp32c6/sleep_phy.c @@ -39,19 +39,15 @@ typedef struct { #define DESC_IDX_I2C_MST_ENA (0) #define DESC_IDX_I2C_MST_SEL (1) #define DESC_IDX_I2C_MST_DIS (2) - void *regdma_desc[DESC_IDX_I2C_MST_DIS + 1]; +#define DESC_IDX_SKIP_WIFI (3) +#define DESC_SKIP_WIFI_ENTRY_CNT (8) +#define DESC_SKIP_WIFI_RESTORE_ENTRY_CNT (1) + void *regdma_desc[DESC_IDX_I2C_MST_DIS + 1 + DESC_SKIP_WIFI_ENTRY_CNT]; } sleep_phy_link_context_t; -static DRAM_ATTR struct{ - void *skip_link[8]; -} s_phy_skip_links; -esp_err_t sleep_phy_link_init(void **link_head) +esp_err_t sleep_phy_link_init(void **link_context) { esp_err_t err = ESP_OK; - const int skip_idx_list[] = { - REGDMA_PHY_LINK(0x10), REGDMA_PHY_LINK(0x1c), REGDMA_PHY_LINK(0x1d), REGDMA_PHY_LINK(0x1e), REGDMA_PHY_LINK(0x1f), - REGDMA_PHY_LINK(0x20), REGDMA_PHY_LINK(0x21), REGDMA_PHY_LINK(0x22) - }; #if SOC_PM_PAU_REGDMA_LINK_MODEM static regdma_link_config_t phy_modem_config[] = { @@ -111,18 +107,10 @@ esp_err_t sleep_phy_link_init(void **link_head) phy_modem_config[22].write_wait.value = phy_ana_i2c_master_burst_rf_onoff(false); void *link = NULL; - uint8_t skip_idx = 0; for (int i = ARRAY_SIZE(phy_modem_config) - 1; (err == ESP_OK) && (i >= 0); i--) { void *next = regdma_link_init_safe(&phy_modem_config[i], false, 0, link); if (next) { link = next; - for (int idx = 0; idx < ARRAY_SIZE(skip_idx_list); idx ++) { - if (skip_idx_list[idx] == phy_modem_config[i].id) { - s_phy_skip_links.skip_link[skip_idx] = next; - skip_idx ++; - break; - } - } } else { regdma_link_destroy(link, 0); err = ESP_ERR_NO_MEM; @@ -131,7 +119,10 @@ esp_err_t sleep_phy_link_init(void **link_head) if (err == ESP_OK) { pau_regdma_set_modem_link_addr(link); - const int id_array[] = { REGDMA_PHY_LINK(0x00), REGDMA_PHY_LINK(0x01), REGDMA_PHY_LINK(0x1b) }; + const int id_array[] = { REGDMA_PHY_LINK(0x00), REGDMA_PHY_LINK(0x01), REGDMA_PHY_LINK(0x1b), /* I2C MST CLK entries */ + REGDMA_PHY_LINK(0x10), REGDMA_PHY_LINK(0x1c), REGDMA_PHY_LINK(0x1d), REGDMA_PHY_LINK(0x1e), + REGDMA_PHY_LINK(0x1f), REGDMA_PHY_LINK(0x20), REGDMA_PHY_LINK(0x21), REGDMA_PHY_LINK(0x22) /* WiFi Related entries */ + }; static DRAM_ATTR sleep_phy_link_context_t phy_link_context; for (int i = 0; (err == ESP_OK) && (i < ARRAY_SIZE(phy_link_context.regdma_desc)); i++) { @@ -144,7 +135,9 @@ esp_err_t sleep_phy_link_init(void **link_head) } if (err == ESP_OK) { phy_link_context.link_head = link; - *link_head = (void *)&phy_link_context; + *link_context = (void *)&phy_link_context; + } else { + regdma_link_destroy(link, 0); } } #endif @@ -155,7 +148,7 @@ void IRAM_ATTR sleep_phy_link_config(void *link_context, uint32_t flags) { sleep_phy_link_context_t *phy_link_context = (sleep_phy_link_context_t *)link_context; - if (flags & BIT(0)) { + if (flags & SLEEP_MODEM_SKIP_I2C_MST_CLK_RETENTION) { regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_ENA], true, true); regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_SEL], true, true); regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_DIS], true, true); @@ -164,20 +157,27 @@ void IRAM_ATTR sleep_phy_link_config(void *link_context, uint32_t flags) regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_SEL], true, false); regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_DIS], false, true); } + + if (flags & SLEEP_MODEM_SKIP_WIFI_RETENTION) { + for (int i = 0; i < DESC_SKIP_WIFI_ENTRY_CNT; i++) { + regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_SKIP_WIFI + i], true, true); + } + } else { + for (int i = 0; i < DESC_SKIP_WIFI_ENTRY_CNT; i++) { + if (i < DESC_SKIP_WIFI_RESTORE_ENTRY_CNT) { + regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_SKIP_WIFI + i], true, false); + } else { + regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_SKIP_WIFI + i], false, true); + } + } + } } -esp_err_t sleep_phy_link_deinit(void *link_head) +esp_err_t sleep_phy_link_deinit(void *link_context) { #if SOC_PM_PAU_REGDMA_LINK_MODEM - regdma_link_destroy(((sleep_modem_state_phy_link_context_t *)link_head)->link_head, 0); + regdma_link_destroy(((sleep_phy_link_context_t *)link_context)->link_head, 0); #endif return ESP_OK; } - -void sleep_phy_skip_wifi_reg(bool skip) -{ - for (int i = 0; i < ARRAY_SIZE(s_phy_skip_links.skip_link); i++) { - regdma_link_set_skip_flag(s_phy_skip_links.skip_link[i], skip, skip); - } -} #endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY */ diff --git a/components/esp_hw_support/lowpower/port/esp32c61/sleep_phy.c b/components/esp_hw_support/lowpower/port/esp32c61/sleep_phy.c index b63768f41dd..ddc7602542f 100644 --- a/components/esp_hw_support/lowpower/port/esp32c61/sleep_phy.c +++ b/components/esp_hw_support/lowpower/port/esp32c61/sleep_phy.c @@ -36,19 +36,15 @@ typedef struct { void *link_head; #define DESC_IDX_I2C_MST_ENA (0) #define DESC_IDX_I2C_MST_DIS (1) - void *regdma_desc[DESC_IDX_I2C_MST_DIS + 1]; +#define DESC_IDX_SKIP_WIFI (2) +#define DESC_SKIP_WIFI_ENTRY_CNT (8) +#define DESC_SKIP_WIFI_RESTORE_ENTRY_CNT (1) + void *regdma_desc[DESC_IDX_I2C_MST_DIS + 1 + DESC_SKIP_WIFI_ENTRY_CNT]; } sleep_phy_link_context_t; -static DRAM_ATTR struct{ - void *skip_link[8]; -} s_phy_skip_links; -esp_err_t sleep_phy_link_init(void **link_head) +esp_err_t sleep_phy_link_init(void **link_context) { esp_err_t err = ESP_OK; - const int skip_idx_list[] = { - REGDMA_PHY_LINK(0x0f), REGDMA_PHY_LINK(0x1b), REGDMA_PHY_LINK(0x1c), REGDMA_PHY_LINK(0x1d), REGDMA_PHY_LINK(0x1e), - REGDMA_PHY_LINK(0x1f), REGDMA_PHY_LINK(0x20), REGDMA_PHY_LINK(0x21), - }; #if SOC_PM_PAU_REGDMA_LINK_MODEM static regdma_link_config_t phy_modem_config[] = { @@ -106,17 +102,9 @@ esp_err_t sleep_phy_link_init(void **link_head) phy_modem_config[19].write_wait.value = phy_ana_i2c_master_burst_rf_onoff(false); void *link = NULL; - uint8_t skip_idx = 0; for (int i = ARRAY_SIZE(phy_modem_config) - 1; (err == ESP_OK) && (i >= 0); i--) { void *next = regdma_link_init_safe(&phy_modem_config[i], false, 0, link); if (next) { - for (int idx = 0; idx < ARRAY_SIZE(skip_idx_list); idx ++) { - if (skip_idx_list[idx] == phy_modem_config[i].id) { - s_phy_skip_links.skip_link[skip_idx] = next; - skip_idx ++; - break; - } - } link = next; } else { regdma_link_destroy(link, 0); @@ -126,7 +114,10 @@ esp_err_t sleep_phy_link_init(void **link_head) if (err == ESP_OK) { pau_regdma_set_modem_link_addr(link); - const int id_array[] = { REGDMA_PHY_LINK(0x00), REGDMA_PHY_LINK(0x1a) }; + const int id_array[] = { REGDMA_PHY_LINK(0x00), REGDMA_PHY_LINK(0x1a), /* I2C MST CLK entries */ + REGDMA_PHY_LINK(0x0f), REGDMA_PHY_LINK(0x1b), REGDMA_PHY_LINK(0x1c), REGDMA_PHY_LINK(0x1d), + REGDMA_PHY_LINK(0x1e), REGDMA_PHY_LINK(0x1f), REGDMA_PHY_LINK(0x20), REGDMA_PHY_LINK(0x21) /* WiFi Related entries */ + }; static DRAM_ATTR sleep_phy_link_context_t phy_link_context; for (int i = 0; (err == ESP_OK) && (i < ARRAY_SIZE(phy_link_context.regdma_desc)); i++) { @@ -139,7 +130,9 @@ esp_err_t sleep_phy_link_init(void **link_head) } if (err == ESP_OK) { phy_link_context.link_head = link; - *link_head = (void *)&phy_link_context; + *link_context = (void *)&phy_link_context; + } else { + regdma_link_destroy(link, 0); } } #endif @@ -150,28 +143,34 @@ void IRAM_ATTR sleep_phy_link_config(void *link_context, uint32_t flags) { sleep_phy_link_context_t *phy_link_context = (sleep_phy_link_context_t *)link_context; - if (flags & BIT(0)) { + if (flags & SLEEP_MODEM_SKIP_I2C_MST_CLK_RETENTION) { regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_ENA], true, true); regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_DIS], true, true); } else { regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_ENA], true, false); regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_DIS], false, true); } -} -esp_err_t sleep_phy_link_deinit(void *link_head) -{ -#if SOC_PM_PAU_REGDMA_LINK_MODEM - regdma_link_destroy(((sleep_modem_state_phy_link_context_t *)link_head)->link_head, 0); -#endif - return ESP_OK; -} - -void sleep_phy_skip_wifi_reg(bool skip) -{ - for (int i = 0; i < ARRAY_SIZE(s_phy_skip_links.skip_link); i++) { - regdma_link_set_skip_flag(s_phy_skip_links.skip_link[i], skip, skip); + if (flags & SLEEP_MODEM_SKIP_WIFI_RETENTION) { + for (int i = 0; i < DESC_SKIP_WIFI_ENTRY_CNT; i++) { + regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_SKIP_WIFI + i], true, true); + } + } else { + for (int i = 0; i < DESC_SKIP_WIFI_ENTRY_CNT; i++) { + if (i < DESC_SKIP_WIFI_RESTORE_ENTRY_CNT) { + regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_SKIP_WIFI + i], true, false); + } else { + regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_SKIP_WIFI + i], false, true); + } + } } } +esp_err_t sleep_phy_link_deinit(void *link_context) +{ +#if SOC_PM_PAU_REGDMA_LINK_MODEM + regdma_link_destroy(((sleep_phy_link_context_t *)link_context)->link_head, 0); +#endif + return ESP_OK; +} #endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY */ diff --git a/components/esp_hw_support/lowpower/port/esp32s31/sleep_phy.c b/components/esp_hw_support/lowpower/port/esp32s31/sleep_phy.c index afe078ed07f..1ab483b9103 100644 --- a/components/esp_hw_support/lowpower/port/esp32s31/sleep_phy.c +++ b/components/esp_hw_support/lowpower/port/esp32s31/sleep_phy.c @@ -40,7 +40,11 @@ static __attribute__((unused)) const char *TAG = "sleep"; typedef struct { #define DESC_IDX_I2C_MST_ENA (0) #define DESC_IDX_I2C_MST_DIS (1) - void *regdma_desc[DESC_IDX_I2C_MST_DIS + 1]; +#define DESC_IDX_SKIP_WIFI (2) +#define DESC_SKIP_WIFI_ENTRY_CNT (4) +#define DESC_SKIP_WIFI_RESTORE_ENTRY_CNT (1) + void *regdma_desc[DESC_IDX_I2C_MST_DIS + 1 + DESC_SKIP_WIFI_ENTRY_CNT]; + } sleep_phy_link_context_t; static esp_err_t sleep_phy_retention_init(void *arg) @@ -104,7 +108,9 @@ esp_err_t sleep_phy_link_init(void **link_head) if (err == ESP_OK) { err = sleep_retention_module_allocate(SLEEP_RETENTION_MODULE_MODEM_PHY); if (err == ESP_OK) { - const int id_array[] = { REGDMA_PHY_LINK(0x00), REGDMA_PHY_LINK(0x14) }; + const int id_array[] = { REGDMA_PHY_LINK(0x00), REGDMA_PHY_LINK(0x14), + REGDMA_PHY_LINK(0x0b), REGDMA_PHY_LINK(0x15), REGDMA_PHY_LINK(0x16), REGDMA_PHY_LINK(0x17) /* WiFi Related entries */ + }; static DRAM_ATTR sleep_phy_link_context_t phy_link_context; for (int i = 0; (err == ESP_OK) && (i < ARRAY_SIZE(phy_link_context.regdma_desc)); i++) { @@ -120,6 +126,9 @@ esp_err_t sleep_phy_link_init(void **link_head) } } } + if (err != ESP_OK) { + sleep_phy_link_deinit(NULL); + } #endif return err; } @@ -129,26 +138,37 @@ void IRAM_ATTR sleep_phy_link_config(void *link_context, uint32_t flags) #if SOC_PM_PAU_REGDMA_LINK_IDX_PHY sleep_phy_link_context_t *phy_link_context = (sleep_phy_link_context_t *)link_context; - if (flags & BIT(0)) { + if (flags & SLEEP_MODEM_SKIP_I2C_MST_CLK_RETENTION) { regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_ENA], true, true); regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_DIS], true, true); } else { regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_ENA], true, false); regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_DIS], false, true); } + + if (flags & SLEEP_MODEM_SKIP_WIFI_RETENTION) { + for (int i = 0; i < DESC_SKIP_WIFI_ENTRY_CNT; i++) { + regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_SKIP_WIFI + i], true, true); + } + } else { + for (int i = 0; i < DESC_SKIP_WIFI_ENTRY_CNT; i++) { + if (i < DESC_SKIP_WIFI_RESTORE_ENTRY_CNT) { + regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_SKIP_WIFI + i], true, false); + } else { + regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_SKIP_WIFI + i], false, true); + } + } + } #endif } esp_err_t sleep_phy_link_deinit(void *link_head) { - esp_err_t err = ESP_OK; #if SOC_PM_PAU_REGDMA_LINK_IDX_PHY - err = sleep_retention_module_free(SLEEP_RETENTION_MODULE_MODEM_PHY); - if (err == ESP_OK) { - sleep_retention_module_deinit(SLEEP_RETENTION_MODULE_MODEM_PHY); - } + sleep_retention_module_free(SLEEP_RETENTION_MODULE_MODEM_PHY); + sleep_retention_module_deinit(SLEEP_RETENTION_MODULE_MODEM_PHY); #endif - return err; + return ESP_OK; } #endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY */ diff --git a/components/esp_phy/Kconfig b/components/esp_phy/Kconfig index e51102d1da3..2e14e8f89c9 100644 --- a/components/esp_phy/Kconfig +++ b/components/esp_phy/Kconfig @@ -260,5 +260,11 @@ menu "PHY" help Select to print PHY version in esp_phy_enable. This config only applies to esp32hxx for now. + config ESP_PHY_HW_SWITCH_RF + bool "Enable Hardware Triggered RF Switch" + depends on SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY + default n + help + Enabling this feature will allow PHY disable and enable using REGDMA. endif endmenu # PHY diff --git a/components/esp_phy/include/esp_phy_init.h b/components/esp_phy/include/esp_phy_init.h index b05c9fe82c8..edf27e7a21e 100644 --- a/components/esp_phy/include/esp_phy_init.h +++ b/components/esp_phy/include/esp_phy_init.h @@ -212,6 +212,7 @@ void esp_phy_modem_init(uint8_t modem); * @param modem Modem calling phy retention */ void esp_phy_modem_deinit(uint8_t modem); + #if CONFIG_MAC_BB_PD /** * @brief Initialize backup memory for MAC and Baseband power up/down diff --git a/components/esp_phy/src/phy_init.c b/components/esp_phy/src/phy_init.c index 99c239ee521..aeaf3c14870 100644 --- a/components/esp_phy/src/phy_init.c +++ b/components/esp_phy/src/phy_init.c @@ -103,7 +103,7 @@ static bool s_is_phy_reg_stored = false; /* Memory to store PHY digital registers */ static uint32_t* s_phy_digital_regs_mem = NULL; #endif // SOC_PM_MODEM_RETENTION_BY_BACKUPDMA -#if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA || CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP +#if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA || CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP || CONFIG_ESP_PHY_HW_SWITCH_RF static uint8_t s_phy_modem_init_ref = 0; #endif @@ -343,11 +343,16 @@ void esp_phy_enable(esp_phy_modem_t modem) } else { #if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY #if SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP - bool wifimac_link_is_sel = false; if (!pm_mac_modem_rf_already_enabled()) { #endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP */ if (sleep_modem_phy_link_enabled() && sleep_modem_phy_link_done()) { -#if SOC_PM_PAU_REGDMA_LINK_IDX_PHY && SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND + uint8_t modem_flags = SLEEP_MODEM_SKIP_I2C_MST_CLK_RETENTION; + if (!sleep_modem_wifi_modem_state_is_enabled()) { + modem_flags |= SLEEP_MODEM_SKIP_WIFI_RETENTION; + } + bool wifimac_link_is_sel = false; +#if SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP && \ + SOC_PM_PAU_REGDMA_LINK_IDX_PHY && SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND /* * A race exists between SoC wakeup and modem state sleep. After modem initiates sleep, * SoC may wake up before REGDMA completes RF close, leaving mac_modem_sleep_flag uncleared @@ -360,7 +365,7 @@ void esp_phy_enable(esp_phy_modem_t modem) */ wifimac_link_is_sel = pm_get_wifimac_regdma_link_selection(); #endif - sleep_modem_do_phy_retention(true, wifimac_link_is_sel); + sleep_modem_do_phy_retention(true, wifimac_link_is_sel, modem_flags); } else { phy_wakeup_init(); } @@ -430,11 +435,16 @@ void esp_phy_disable(esp_phy_modem_t modem) pm_mac_modem_clear_rf_power_state(); #endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP */ if (sleep_modem_phy_link_enabled()) { + uint8_t modem_flags = SLEEP_MODEM_SKIP_I2C_MST_CLK_RETENTION; + if (!sleep_modem_wifi_modem_state_is_enabled()) { + modem_flags |= SLEEP_MODEM_SKIP_WIFI_RETENTION; + } bool wifimac_link_is_sel = false; -#if SOC_PM_PAU_REGDMA_LINK_IDX_PHY && SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND +#if SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP && \ + SOC_PM_PAU_REGDMA_LINK_IDX_PHY && SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND wifimac_link_is_sel = pm_get_wifimac_regdma_link_selection(); #endif - sleep_modem_do_phy_retention(false, wifimac_link_is_sel); + sleep_modem_do_phy_retention(false, wifimac_link_is_sel, modem_flags); } else #endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY */ { @@ -503,7 +513,7 @@ void esp_wifi_bt_power_domain_off(void) void esp_phy_modem_init(uint8_t modem) { -#if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA || CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP +#if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA || CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP || CONFIG_ESP_PHY_HW_SWITCH_RF _lock_acquire(&s_phy_access_lock); s_phy_modem_init_ref++; #if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA @@ -511,16 +521,16 @@ void esp_phy_modem_init(uint8_t modem) s_phy_digital_regs_mem = (uint32_t *)heap_caps_malloc(SOC_PHY_DIG_REGS_MEM_SIZE, MALLOC_CAP_DMA|MALLOC_CAP_INTERNAL); } #endif // SOC_PM_MODEM_RETENTION_BY_BACKUPDMA -#if SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP +#if (SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP) || CONFIG_ESP_PHY_HW_SWITCH_RF sleep_modem_phy_init(modem); -#endif // CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP +#endif // (SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP) || CONFIG_ESP_PHY_HW_SWITCH_RF _lock_release(&s_phy_access_lock); #endif // SOC_PM_MODEM_RETENTION_BY_BACKUPDMA || CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP } void esp_phy_modem_deinit(uint8_t modem) { -#if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA || CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP +#if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA || CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP || CONFIG_ESP_PHY_HW_SWITCH_RF _lock_acquire(&s_phy_access_lock); if (s_phy_modem_init_ref == 0) { @@ -541,9 +551,9 @@ void esp_phy_modem_deinit(uint8_t modem) #endif // CONFIG_IDF_TARGET_ESP32C3 #endif // SOC_PM_MODEM_RETENTION_BY_BACKUPDMA } -#if SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP +#if (SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP) || CONFIG_ESP_PHY_HW_SWITCH_RF sleep_modem_phy_deinit(modem); -#endif // SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP +#endif // (SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP) || CONFIG_ESP_PHY_HW_SWITCH_RF _lock_release(&s_phy_access_lock); #endif // SOC_PM_MODEM_RETENTION_BY_BACKUPDMA || CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP } From 3c875310d160ca5dd8eab137c431f1607f3efbbb Mon Sep 17 00:00:00 2001 From: cjin Date: Tue, 4 Nov 2025 17:53:20 +0800 Subject: [PATCH 07/13] feat(modem): add phy retention related api --- components/esp_hal_pmu/esp32c5/pau_hal.c | 22 +++++++-- components/esp_hal_pmu/esp32c6/pau_hal.c | 18 +++++-- components/esp_hal_pmu/esp32c61/pau_hal.c | 18 +++++-- components/esp_hal_pmu/esp32p4/pau_hal.c | 13 +++-- components/esp_hal_pmu/esp32s31/pau_hal.c | 22 +++++++-- components/esp_hal_pmu/include/hal/pau_hal.h | 40 ++++++++++++++- .../include/esp_private/esp_pau.h | 47 +++++++++++++++--- .../include/esp_private/sleep_modem.h | 8 ++- .../include/esp_private/sleep_retention.h | 15 ++++-- .../lowpower/port/esp32s31/sleep_phy.c | 2 - components/esp_hw_support/port/pau_regdma.c | 49 +++++++++++++++---- components/esp_hw_support/sleep_modem.c | 16 +++--- components/esp_hw_support/sleep_retention.c | 25 +++++++--- .../esp32s31/include/soc/Kconfig.soc_caps.in | 4 ++ .../soc/esp32s31/include/soc/soc_caps.h | 1 + 15 files changed, 245 insertions(+), 55 deletions(-) diff --git a/components/esp_hal_pmu/esp32c5/pau_hal.c b/components/esp_hal_pmu/esp32c5/pau_hal.c index 0348105188b..c26d100473f 100644 --- a/components/esp_hal_pmu/esp32c5/pau_hal.c +++ b/components/esp_hal_pmu/esp32c5/pau_hal.c @@ -15,14 +15,26 @@ void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_ pau_ll_set_regdma_link_addr((uint32_t)(*link_addr)[0]); } -void IRAM_ATTR pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore) +void IRAM_ATTR pau_hal_regdma_wait_done(pau_hal_context_t *hal) +{ + while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW)); +} + +void IRAM_ATTR pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore, bool blocking) { pau_ll_clear_regdma_backup_done_intr_state(hal->dev); pau_ll_select_regdma_entry_link(hal->dev, SOC_PM_PAU_REGDMA_LINK_IDX_PHY); pau_ll_set_regdma_entry_link_backup_direction(hal->dev, backup_or_restore); pau_ll_set_regdma_entry_link_backup_start_enable(hal->dev, true); - while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW)); + if (blocking) { + pau_hal_regdma_wait_done(hal); + } +} + +bool IRAM_ATTR pau_hal_get_regdma_done_status(pau_hal_context_t *hal) +{ + return (pau_ll_get_regdma_intr_status(hal->dev) & 0x1); } void IRAM_ATTR pau_hal_stop_regdma_modem_link(pau_hal_context_t *hal) @@ -33,14 +45,16 @@ void IRAM_ATTR pau_hal_stop_regdma_modem_link(pau_hal_context_t *hal) } #if SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND -void IRAM_ATTR pau_hal_start_regdma_wifimac_link(pau_hal_context_t *hal, bool backup_or_restore) +void IRAM_ATTR pau_hal_start_regdma_wifimac_link(pau_hal_context_t *hal, bool backup_or_restore, bool blocking) { pau_ll_clear_regdma_backup_done_intr_state(hal->dev); pau_ll_set_regdma_select_wifimac_link(hal->dev); pau_ll_set_regdma_wifimac_link_backup_direction(hal->dev, backup_or_restore); pau_ll_set_regdma_wifimac_link_backup_start_enable(hal->dev); - while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW)); + if (blocking) { + pau_hal_regdma_wait_done(hal); + } } void IRAM_ATTR pau_hal_stop_regdma_wifimac_link(pau_hal_context_t *hal) diff --git a/components/esp_hal_pmu/esp32c6/pau_hal.c b/components/esp_hal_pmu/esp32c6/pau_hal.c index ac9e4a0759e..469f5a9c222 100644 --- a/components/esp_hal_pmu/esp32c6/pau_hal.c +++ b/components/esp_hal_pmu/esp32c6/pau_hal.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -18,14 +18,26 @@ void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_ * REGDMA link 3 */ } -void IRAM_ATTR pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore) +void IRAM_ATTR pau_hal_regdma_wait_done(pau_hal_context_t *hal) +{ + while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW)); +} + +void IRAM_ATTR pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore, bool blocking) { pau_ll_clear_regdma_backup_done_intr_state(hal->dev); pau_ll_set_regdma_select_wifimac_link(hal->dev); pau_ll_set_regdma_wifimac_link_backup_direction(hal->dev, backup_or_restore); pau_ll_set_regdma_wifimac_link_backup_start_enable(hal->dev); - while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW)); + if (blocking) { + pau_hal_regdma_wait_done(hal); + } +} + +bool IRAM_ATTR pau_hal_get_regdma_done_status(pau_hal_context_t *hal) +{ + return (pau_ll_get_regdma_intr_status(hal->dev) & 0x1); } void IRAM_ATTR pau_hal_stop_regdma_modem_link(pau_hal_context_t *hal) diff --git a/components/esp_hal_pmu/esp32c61/pau_hal.c b/components/esp_hal_pmu/esp32c61/pau_hal.c index 69e5323b993..273ca6b7ed5 100644 --- a/components/esp_hal_pmu/esp32c61/pau_hal.c +++ b/components/esp_hal_pmu/esp32c61/pau_hal.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -18,14 +18,26 @@ void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_ * REGDMA link 3 */ } -void IRAM_ATTR pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore) +void IRAM_ATTR pau_hal_regdma_wait_done(pau_hal_context_t *hal) +{ + while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW)); +} + +void IRAM_ATTR pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore, bool blocking) { pau_ll_clear_regdma_backup_done_intr_state(hal->dev); pau_ll_set_regdma_select_wifimac_link(hal->dev); pau_ll_set_regdma_wifimac_link_backup_direction(hal->dev, backup_or_restore); pau_ll_set_regdma_wifimac_link_backup_start_enable(hal->dev); - while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW)); + if (blocking) { + pau_hal_regdma_wait_done(hal); + } +} + +bool IRAM_ATTR pau_hal_get_regdma_done_status(pau_hal_context_t *hal) +{ + return (pau_ll_get_regdma_intr_status(hal->dev) & 0x1); } void IRAM_ATTR pau_hal_stop_regdma_modem_link(pau_hal_context_t *hal) diff --git a/components/esp_hal_pmu/esp32p4/pau_hal.c b/components/esp_hal_pmu/esp32p4/pau_hal.c index 963e6e7228f..8d991551fe9 100644 --- a/components/esp_hal_pmu/esp32p4/pau_hal.c +++ b/components/esp_hal_pmu/esp32p4/pau_hal.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -26,14 +26,21 @@ void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_ lp_sys_ll_set_pau_link_addr((uint32_t)(*link_addr)[0]); } -void IRAM_ATTR pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore) +void IRAM_ATTR pau_hal_regdma_wait_done(pau_hal_context_t *hal) +{ + while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW)); +} + +void IRAM_ATTR pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore, bool blocking) { pau_ll_clear_regdma_backup_done_intr_state(hal->dev); pau_ll_set_regdma_select_wifimac_link(hal->dev); pau_ll_set_regdma_wifimac_link_backup_direction(hal->dev, backup_or_restore); pau_ll_set_regdma_wifimac_link_backup_start_enable(hal->dev); - while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW)); + if (blocking) { + pau_hal_regdma_wait_done(hal); + } } void IRAM_ATTR pau_hal_stop_regdma_modem_link(pau_hal_context_t *hal) diff --git a/components/esp_hal_pmu/esp32s31/pau_hal.c b/components/esp_hal_pmu/esp32s31/pau_hal.c index 35b4107bfb6..682d85b3541 100644 --- a/components/esp_hal_pmu/esp32s31/pau_hal.c +++ b/components/esp_hal_pmu/esp32s31/pau_hal.c @@ -15,14 +15,26 @@ void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_ lp_sys_ll_set_pau_link_addr((uint32_t)(*link_addr)[0]); } -void IRAM_ATTR pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore) +void IRAM_ATTR pau_hal_regdma_wait_done(pau_hal_context_t *hal) +{ + while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW)); +} + +void IRAM_ATTR pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore, bool blocking) { pau_ll_clear_regdma_backup_done_intr_state(hal->dev); pau_ll_select_regdma_entry_link(hal->dev, SOC_PM_PAU_REGDMA_LINK_IDX_PHY); pau_ll_set_regdma_entry_link_backup_direction(hal->dev, backup_or_restore); pau_ll_set_regdma_entry_link_backup_start_enable(hal->dev, true); - while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW)); + if (blocking) { + pau_hal_regdma_wait_done(hal); + } +} + +bool IRAM_ATTR pau_hal_get_regdma_done_status(pau_hal_context_t *hal) +{ + return (pau_ll_get_regdma_intr_status(hal->dev) & 0x1); } void IRAM_ATTR pau_hal_stop_regdma_modem_link(pau_hal_context_t *hal) @@ -33,14 +45,16 @@ void IRAM_ATTR pau_hal_stop_regdma_modem_link(pau_hal_context_t *hal) } #if SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND -void IRAM_ATTR pau_hal_start_regdma_wifimac_link(pau_hal_context_t *hal, bool backup_or_restore) +void IRAM_ATTR pau_hal_start_regdma_wifimac_link(pau_hal_context_t *hal, bool backup_or_restore, bool blocking) { pau_ll_clear_regdma_backup_done_intr_state(hal->dev); pau_ll_set_regdma_select_wifimac_link(hal->dev); pau_ll_set_regdma_wifimac_link_backup_direction(hal->dev, backup_or_restore); pau_ll_set_regdma_wifimac_link_backup_start_enable(hal->dev); - while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW)); + if (blocking) { + pau_hal_regdma_wait_done(hal); + } } void IRAM_ATTR pau_hal_stop_regdma_wifimac_link(pau_hal_context_t *hal) diff --git a/components/esp_hal_pmu/include/hal/pau_hal.h b/components/esp_hal_pmu/include/hal/pau_hal.h index 662713e773d..2494c0e7bf6 100644 --- a/components/esp_hal_pmu/include/hal/pau_hal.h +++ b/components/esp_hal_pmu/include/hal/pau_hal.h @@ -47,13 +47,21 @@ void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_ #define pau_hal_set_regdma_modem_link_addr(hal, addr) pau_ll_set_regdma_wifimac_link_addr((hal)->dev, (addr)) #endif +/** + * @brief Wait until regdma completes + * + * @param hal regdma hal context + */ +void pau_hal_regdma_wait_done(pau_hal_context_t *hal); + /** * @brief Start transmission on regdma modem link * * @param hal regdma hal context * @param backup_or_restore false:restore true:backup + * @param blocking software wait till regdma completes */ -void pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore); +void pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore, bool blocking); /** * @brief Stop transmission on regdma modem link @@ -68,8 +76,9 @@ void pau_hal_stop_regdma_modem_link(pau_hal_context_t *hal); * * @param hal regdma hal context * @param backup_or_restore false: restore, true: backup + * @param blocking software wait till regdma completes */ -void pau_hal_start_regdma_wifimac_link(pau_hal_context_t *hal, bool backup_or_restore); +void pau_hal_start_regdma_wifimac_link(pau_hal_context_t *hal, bool backup_or_restore, bool blocking); /** * @brief Stop transmission on regdma WiFi MAC SEL link @@ -78,6 +87,33 @@ void pau_hal_start_regdma_wifimac_link(pau_hal_context_t *hal, bool backup_or_re */ void pau_hal_stop_regdma_wifimac_link(pau_hal_context_t *hal); #endif +/** + * @brief Enable regdma done interrupt + * + * @param hal regdma hal context + */ +#define pau_hal_regdma_done_int_enable(hal) pau_ll_set_regdma_backup_done_intr_enable((hal)->dev, true) + +/** + * @brief Disable regdma done interrupt + * + * @param hal regdma hal context + */ +#define pau_hal_regdma_done_int_disable(hal) pau_ll_set_regdma_backup_done_intr_enable((hal)->dev, false) + +/** + * @brief Get regdma done interrupt status + * + * @param hal regdma hal context + */ +bool pau_hal_get_regdma_done_status(pau_hal_context_t *hal); + +/** + * @brief Clear regdma done interrupt status + * + * @param hal regdma hal context + */ +#define pau_hal_clear_regdma_backup_done_intr_state(hal) pau_ll_clear_regdma_backup_done_intr_state((hal)->dev) #endif #if SOC_PM_RETENTION_SW_TRIGGER_REGDMA diff --git a/components/esp_hw_support/include/esp_private/esp_pau.h b/components/esp_hw_support/include/esp_private/esp_pau.h index 0b17f68c5a2..562201060a4 100644 --- a/components/esp_hw_support/include/esp_private/esp_pau.h +++ b/components/esp_hw_support/include/esp_private/esp_pau.h @@ -28,7 +28,7 @@ void pau_regdma_set_entry_link_addr(pau_regdma_link_addr_t *link_entries); #if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY #if SOC_PM_PAU_REGDMA_LINK_MODEM /** - * @brief Set the address of WiFi MAC REGDMA Link in modem state + * @brief Set the address of modem REGDMA Link in modem state * @param link_addr linked lists address */ void pau_regdma_set_modem_link_addr(void *link_addr); @@ -36,26 +36,62 @@ void pau_regdma_set_modem_link_addr(void *link_addr); /** * @brief Software trigger regdma to perform modem link backup + * + * @param blocking software waits for regdma to complete */ -void pau_regdma_trigger_modem_link_backup(void); +void pau_regdma_trigger_modem_link_backup(bool blocking); /** * @brief Software trigger regdma to perform modem link restore + * + * @param blocking software waits for regdma to complete */ -void pau_regdma_trigger_modem_link_restore(void); +void pau_regdma_trigger_modem_link_restore(bool blocking); + +/** + * @brief Completion process of regdma for modem link retention + * + */ +void pau_regdma_modem_link_complete(void); #if SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND /** * @brief Software trigger REGDMA backup on WiFi MAC SEL link */ -void pau_regdma_trigger_wifimac_link_backup(void); +void pau_regdma_trigger_wifimac_link_backup(bool blocking); /** * @brief Software trigger REGDMA restore on WiFi MAC SEL link */ -void pau_regdma_trigger_wifimac_link_restore(void); +void pau_regdma_trigger_wifimac_link_restore(bool blocking); #endif +/** + * @brief Enable pau done interrupt + * + */ +void pau_regdma_done_int_enable(void); + +/** + * @brief Disable pau done interrupt + * + */ +void pau_regdma_done_int_disable(void); + +/** + * @brief Check pau done interrupt status + * + */ +bool pau_get_regdma_done_status(void); + +/** + * @brief Clear pau done interrupt status + * + */ +void pau_clear_regdma_done_status(void); + +#endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY */ + #if SOC_PM_RETENTION_SW_TRIGGER_REGDMA /** * @brief Set the address of system REGDMA Link in active state @@ -101,7 +137,6 @@ void pau_regdma_trigger_extra_link_restore(void); */ bool pau_regdma_enable_aon_link_entry(bool enable); #endif -#endif #ifdef __cplusplus } diff --git a/components/esp_hw_support/include/esp_private/sleep_modem.h b/components/esp_hw_support/include/esp_private/sleep_modem.h index 0f3a564b13b..2430d3f9ce6 100644 --- a/components/esp_hw_support/include/esp_private/sleep_modem.h +++ b/components/esp_hw_support/include/esp_private/sleep_modem.h @@ -10,6 +10,7 @@ #include "sdkconfig.h" #include "esp_err.h" #include "esp_sleep.h" +#include "esp_attr.h" #ifdef __cplusplus extern "C" { @@ -90,9 +91,14 @@ void sleep_modem_mac_bb_power_up_prepare(void); #endif // SOC_PM_RETENTION_HAS_CLOCK_BUG && CONFIG_MAC_BB_PD #if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY +/** + * @brief Phy retention completes + * + */ +void sleep_modem_phy_retention_complete(void); /** - * @brief The retention action in the modem state of PHY module + * @brief The retention action of PHY module * * @param restore true for restore the PHY context, false for backup the PHY context * @param flags Configure flags for phy link diff --git a/components/esp_hw_support/include/esp_private/sleep_retention.h b/components/esp_hw_support/include/esp_private/sleep_retention.h index aed019c1202..d9a4e7f3bbc 100644 --- a/components/esp_hw_support/include/esp_private/sleep_retention.h +++ b/components/esp_hw_support/include/esp_private/sleep_retention.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -340,7 +340,7 @@ void sleep_retention_do_extra_retention(bool backup_or_restore); void sleep_retention_do_system_retention(bool backup_or_restore); #endif -#if SOC_PM_SUPPORT_PMU_MODEM_STATE +#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY /** * @brief Software trigger REGDMA to do phy linked list retention * @@ -348,9 +348,16 @@ void sleep_retention_do_system_retention(bool backup_or_restore); * or false for restore to register from memory * @param wifimac_link_is_sel true to use dedicated WiFi MAC link, * false to use modem entry link + * @param blocking Software wait for REGDMA to complete */ -void sleep_retention_do_phy_retention(bool backup_or_restore, bool wifimac_link_is_sel); -#endif /*SOC_PM_SUPPORT_PMU_MODEM_STATE */ +void sleep_retention_do_phy_retention(bool backup_or_restore, bool wifimac_link_is_sel, bool blocking); + +/** + * @brief Completion process of REGDMA for PHY linked list retention + * + */ +void sleep_retention_phy_retention_complete(void); +#endif /*SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY */ #endif // SOC_PAU_SUPPORTED #ifdef __cplusplus diff --git a/components/esp_hw_support/lowpower/port/esp32s31/sleep_phy.c b/components/esp_hw_support/lowpower/port/esp32s31/sleep_phy.c index 1ab483b9103..6f3d214bd16 100644 --- a/components/esp_hw_support/lowpower/port/esp32s31/sleep_phy.c +++ b/components/esp_hw_support/lowpower/port/esp32s31/sleep_phy.c @@ -44,7 +44,6 @@ typedef struct { #define DESC_SKIP_WIFI_ENTRY_CNT (4) #define DESC_SKIP_WIFI_RESTORE_ENTRY_CNT (1) void *regdma_desc[DESC_IDX_I2C_MST_DIS + 1 + DESC_SKIP_WIFI_ENTRY_CNT]; - } sleep_phy_link_context_t; static esp_err_t sleep_phy_retention_init(void *arg) @@ -112,7 +111,6 @@ esp_err_t sleep_phy_link_init(void **link_head) REGDMA_PHY_LINK(0x0b), REGDMA_PHY_LINK(0x15), REGDMA_PHY_LINK(0x16), REGDMA_PHY_LINK(0x17) /* WiFi Related entries */ }; static DRAM_ATTR sleep_phy_link_context_t phy_link_context; - for (int i = 0; (err == ESP_OK) && (i < ARRAY_SIZE(phy_link_context.regdma_desc)); i++) { void *desc = sleep_retention_find_link_by_id(id_array[i]); if (desc) { diff --git a/components/esp_hw_support/port/pau_regdma.c b/components/esp_hw_support/port/pau_regdma.c index 17069be9c32..ea9b0ef398b 100644 --- a/components/esp_hw_support/port/pau_regdma.c +++ b/components/esp_hw_support/port/pau_regdma.c @@ -69,32 +69,61 @@ void pau_regdma_set_modem_link_addr(void *link_addr) } #endif -void IRAM_ATTR pau_regdma_trigger_modem_link_backup(void) +void IRAM_ATTR pau_regdma_trigger_modem_link_backup(bool blocking) +{ + pau_hal_start_regdma_modem_link(PAU_instance()->hal, true, blocking); + if (blocking) { + pau_hal_stop_regdma_modem_link(PAU_instance()->hal); + } +} + +void IRAM_ATTR pau_regdma_trigger_modem_link_restore(bool blocking) +{ + pau_hal_start_regdma_modem_link(PAU_instance()->hal, false, blocking); + if (blocking) { + pau_hal_stop_regdma_modem_link(PAU_instance()->hal); + } +} + +void IRAM_ATTR pau_regdma_modem_link_complete(void) { - pau_hal_start_regdma_modem_link(PAU_instance()->hal, true); pau_hal_stop_regdma_modem_link(PAU_instance()->hal); } -void IRAM_ATTR pau_regdma_trigger_modem_link_restore(void) +void IRAM_ATTR pau_regdma_done_int_enable(void) { - pau_hal_start_regdma_modem_link(PAU_instance()->hal, false); - pau_hal_stop_regdma_modem_link(PAU_instance()->hal); + pau_hal_regdma_done_int_enable(PAU_instance()->hal); +} + +void IRAM_ATTR pau_regdma_done_int_disable(void) +{ + pau_hal_regdma_done_int_disable(PAU_instance()->hal); +} + +bool IRAM_ATTR pau_get_regdma_done_status(void) +{ + return pau_hal_get_regdma_done_status(PAU_instance()->hal); +} + +void IRAM_ATTR pau_clear_regdma_done_status(void) +{ + pau_hal_clear_regdma_backup_done_intr_state(PAU_instance()->hal); } -#endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY */ #if SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND -void IRAM_ATTR pau_regdma_trigger_wifimac_link_backup(void) +void IRAM_ATTR pau_regdma_trigger_wifimac_link_backup(bool blocking) { - pau_hal_start_regdma_wifimac_link(PAU_instance()->hal, true); + pau_hal_start_regdma_wifimac_link(PAU_instance()->hal, true, blocking); pau_hal_stop_regdma_wifimac_link(PAU_instance()->hal); } -void IRAM_ATTR pau_regdma_trigger_wifimac_link_restore(void) +void IRAM_ATTR pau_regdma_trigger_wifimac_link_restore(bool blocking) { - pau_hal_start_regdma_wifimac_link(PAU_instance()->hal, false); + pau_hal_start_regdma_wifimac_link(PAU_instance()->hal, false, blocking); pau_hal_stop_regdma_wifimac_link(PAU_instance()->hal); } #endif +#endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY */ #if SOC_PM_RETENTION_SW_TRIGGER_REGDMA void IRAM_ATTR pau_regdma_set_system_link_addr(void *link_addr) diff --git a/components/esp_hw_support/sleep_modem.c b/components/esp_hw_support/sleep_modem.c index 397b3fbe358..86851e09f65 100644 --- a/components/esp_hw_support/sleep_modem.c +++ b/components/esp_hw_support/sleep_modem.c @@ -130,7 +130,6 @@ void mac_bb_power_up_cb_execute(void) #endif ///CONFIG_MAC_BB_PD #if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY - typedef struct sleep_modem_config { _lock_t phy_link_lock; void *phy_link; @@ -196,11 +195,16 @@ __attribute__((unused)) void sleep_modem_phy_deinit(sleep_modem_type_t modem_mas _lock_release(&s_sleep_modem.phy_link_lock); } -void IRAM_ATTR sleep_modem_do_phy_retention(bool restore, bool wifimac_link_is_sel) +void IRAM_ATTR sleep_modem_phy_retention_complete(void) { - sleep_phy_link_config(s_sleep_modem.phy_link, 1); - sleep_retention_do_phy_retention(!restore, wifimac_link_is_sel); - sleep_phy_link_config(s_sleep_modem.phy_link, 0); + sleep_retention_phy_retention_complete(); +} + +void IRAM_ATTR sleep_modem_do_phy_retention(bool restore, bool wifimac_link_is_sel, uint8_t flags) +{ + sleep_phy_link_config(s_sleep_modem.phy_link, flags); + sleep_retention_do_phy_retention(!restore, wifimac_link_is_sel, true); + sleep_phy_link_config(s_sleep_modem.phy_link, SLEEP_MODEM_RESET_RETENTION); if (!restore) { s_sleep_modem.phy_link_done = 1; } @@ -208,7 +212,7 @@ void IRAM_ATTR sleep_modem_do_phy_retention(bool restore, bool wifimac_link_is_s inline __attribute__((always_inline)) bool sleep_modem_phy_link_enabled(void) { - return (s_sleep_modem.phy_link != NULL); + return s_sleep_modem.modem_mask; } inline __attribute__((always_inline)) bool sleep_modem_phy_link_done(void) diff --git a/components/esp_hw_support/sleep_retention.c b/components/esp_hw_support/sleep_retention.c index 54bad4f9901..3d0e0349a1d 100644 --- a/components/esp_hw_support/sleep_retention.c +++ b/components/esp_hw_support/sleep_retention.c @@ -1303,8 +1303,8 @@ void IRAM_ATTR sleep_retention_do_system_retention(bool backup_or_restore) } #endif -#if SOC_PM_SUPPORT_PMU_MODEM_STATE -void IRAM_ATTR sleep_retention_do_phy_retention(bool backup_or_restore, bool wifimac_link_is_sel) +#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY +void IRAM_ATTR sleep_retention_do_phy_retention(bool backup_or_restore, bool wifimac_link_is_sel, bool blocking) { /* since the PHY link and other module links are within the sleep-retention entry (4) context， * add mutex protection to avoid data race. @@ -1315,24 +1315,35 @@ void IRAM_ATTR sleep_retention_do_phy_retention(bool backup_or_restore, bool wif if (backup_or_restore) { #if SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND if (wifimac_link_is_sel) { - pau_regdma_trigger_wifimac_link_backup(); + pau_regdma_trigger_wifimac_link_backup(blocking); } else #endif { - pau_regdma_trigger_modem_link_backup(); + pau_regdma_trigger_modem_link_backup(blocking); } } else { #if SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND if (wifimac_link_is_sel) { - pau_regdma_trigger_wifimac_link_restore(); + pau_regdma_trigger_wifimac_link_restore(blocking); } else #endif { - pau_regdma_trigger_modem_link_restore(); + pau_regdma_trigger_modem_link_restore(blocking); } } #if SOC_PM_PAU_REGDMA_COMMON_PHY_LINK_ENTRY _lock_release_recursive(&s_retention.lock); #endif } -#endif /*SOC_PM_SUPPORT_PMU_MODEM_STATE */ + +void IRAM_ATTR sleep_retention_phy_retention_complete(void) +{ +#if SOC_PM_PAU_REGDMA_COMMON_PHY_LINK_ENTRY + _lock_acquire_recursive(&s_retention.lock); +#endif + pau_regdma_modem_link_complete(); +#if SOC_PM_PAU_REGDMA_COMMON_PHY_LINK_ENTRY + _lock_release_recursive(&s_retention.lock); +#endif +} +#endif // SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY diff --git a/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in index fde94ba06be..611ab36dc28 100644 --- a/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in @@ -1571,6 +1571,10 @@ config SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE bool default y +config SOC_PM_PAU_REGDMA_COMMON_PHY_LINK_ENTRY + bool + default y + config SOC_PM_PAU_REGDMA_LINK_IDX_PHY int default 4 diff --git a/components/soc/esp32s31/include/soc/soc_caps.h b/components/soc/esp32s31/include/soc/soc_caps.h index f02c6551b43..b12766971b9 100644 --- a/components/soc/esp32s31/include/soc/soc_caps.h +++ b/components/soc/esp32s31/include/soc/soc_caps.h @@ -581,6 +581,7 @@ #define SOC_PM_PAU_LINK_NUM (5) #define SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE (1) +#define SOC_PM_PAU_REGDMA_COMMON_PHY_LINK_ENTRY (1) #define SOC_PM_PAU_REGDMA_LINK_IDX_PHY (4) // The range of values for the link index is [0, SOC_PM_PAU_LINK_NUM) /** Workaround: software-triggered modem PHY retention uses dedicated WiFi MAC REGDMA, not entry link_sel */ #define SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND (1) From 40dbcb9ea6924491592f629d92e7a57236b3db6e Mon Sep 17 00:00:00 2001 From: cjin Date: Mon, 9 Mar 2026 10:57:10 +0800 Subject: [PATCH 08/13] feat(phy): support retention module for phy FE retgisters --- components/esp_phy/esp32c5/phy_init_data.c | 57 ++++++++++++++--- components/esp_phy/esp32c6/phy_init_data.c | 40 +++++++++++- components/esp_phy/esp32c61/phy_init_data.c | 57 ++++++++++++++--- components/esp_phy/esp32s31/phy_init_data.c | 61 ++++++++++++++----- components/esp_phy/include/esp_private/phy.h | 15 ++++- components/esp_phy/src/btbb_init.c | 9 +-- components/esp_phy/src/phy_init.c | 6 +- .../esp32c5/include/soc/Kconfig.soc_caps.in | 2 +- .../include/soc/retention_periph_defs.h | 1 + components/soc/esp32c5/include/soc/soc_caps.h | 2 +- .../include/soc/retention_periph_defs.h | 1 + .../include/soc/retention_periph_defs.h | 1 + 12 files changed, 207 insertions(+), 45 deletions(-) diff --git a/components/esp_phy/esp32c5/phy_init_data.c b/components/esp_phy/esp32c5/phy_init_data.c index 0ee2aa51599..844bc85e3fb 100644 --- a/components/esp_phy/esp32c5/phy_init_data.c +++ b/components/esp_phy/esp32c5/phy_init_data.c @@ -290,21 +290,13 @@ static esp_err_t sleep_retention_wifi_bb_init(void *arg) #define N_REGS_WIFI_NRX() (145) #define N_REGS_WIFI_BB() (82) #define N_REGS_WIFI_BRX() (39) - #define N_REGS_WIFI_FE_COEX() (21) - #define N_REGS_WIFI_FE_DATA() (35) - #define N_REGS_WIFI_FE_CTRL() (56) - #define N_REGS_WIFI_FE_DATA_WIFI() (22) const static sleep_retention_entries_config_t bb_regs_retention[] = { [0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b00, 0x600a7000, 0x600a7000, N_REGS_WIFI_AGC(), 0, 0), .owner = BIT(0) | BIT(1) }, /* AGC */ [1] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b01, 0x600a7400, 0x600a7400, N_REGS_WIFI_TX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* TX */ [2] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b02, 0x600a7800, 0x600a7800, N_REGS_WIFI_NRX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* NRX */ [3] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b03, 0x600a7c00, 0x600a7c00, N_REGS_WIFI_BB(), 0, 0), .owner = BIT(0) | BIT(1) }, /* BB */ - [4] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b05, 0x600a0000, 0x600a0000, N_REGS_WIFI_FE_COEX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE COEX */ - [5] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b06, 0x600a8000, 0x600a8000, N_REGS_WIFI_BRX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* BRX */ - [6] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b07, 0x600a0400, 0x600a0400, N_REGS_WIFI_FE_DATA(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE DATA */ - [7] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b08, 0x600a0800, 0x600a0800, N_REGS_WIFI_FE_CTRL(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE CTRL */ - [8] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b09, 0x600a0c00, 0x600a0c00, N_REGS_WIFI_FE_DATA_WIFI(),0, 0), .owner = BIT(0) | BIT(1) } /* FE WIFI DATA */ + [4] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b04, 0x600a8000, 0x600a8000, N_REGS_WIFI_BRX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* BRX */ }; esp_err_t err = sleep_retention_entries_create(bb_regs_retention, ARRAY_SIZE(bb_regs_retention), 3, SLEEP_RETENTION_MODULE_WIFI_BB); ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for modem (%s) retention", "WiFi BB"); @@ -337,6 +329,7 @@ void esp_phy_sleep_data_init(void) .attribute = SLEEP_RETENTION_MODULE_ATTR_ATTACH, .depends = RETENTION_MODULE_BITMAP_INIT(CLOCK_MODEM) }; + RETENTION_MODULE_BITMAP_SET(&init_param.depends, SLEEP_RETENTION_MODULE_PHY_FE); esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_WIFI_BB, &init_param); if (err != ESP_OK) { ESP_LOGW(TAG, "WiFi BB sleep retention init failed"); @@ -361,4 +354,48 @@ void esp_phy_sleep_data_deinit(void) } } -#endif /* SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD */ +static esp_err_t sleep_retention_phy_fe_init(void *arg) +{ + #define N_REGS_FE_COEX() (21) + #define N_REGS_FE_DATA() (35) + #define N_REGS_FE_CTRL() (56) + #define N_REGS_FE_DATA_WIFI() (22) + #define REG_FECOEX_BASE 0x600a0000 + #define REG_FEDATA_BASE 0x600a0400 + #define REG_FECTRL_BASE 0x600a0800 + #define REG_FEDATAWIFI_BASE 0x600a0c00 + + const static sleep_retention_entries_config_t phy_fe_regs_retention[] = { + [0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_FE_LINK(0), REG_FECOEX_BASE, REG_FECOEX_BASE, N_REGS_FE_COEX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE COEX */ + [1] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_FE_LINK(1), REG_FEDATA_BASE, REG_FEDATA_BASE, N_REGS_FE_DATA(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE DATA */ + [2] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_FE_LINK(2), REG_FECTRL_BASE, REG_FECTRL_BASE, N_REGS_FE_CTRL(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE CTRL */ + [3] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_FE_LINK(3), REG_FEDATAWIFI_BASE, REG_FEDATAWIFI_BASE, N_REGS_FE_DATA_WIFI(),0, 0), .owner = BIT(0) | BIT(1) } /* FE WIFI DATA */ + }; + esp_err_t err = sleep_retention_entries_create(phy_fe_regs_retention, ARRAY_SIZE(phy_fe_regs_retention), 3, SLEEP_RETENTION_MODULE_PHY_FE); + ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for modem (%s) retention", "PHY FE"); + ESP_LOGD(TAG, "PHY FE sleep retention initialization"); + return ESP_OK; +} + +void esp_phy_fe_sleep_data_init(void) +{ + sleep_retention_module_init_param_t init_param = { + .cbs = { .create = { .handle = sleep_retention_phy_fe_init, .arg = NULL } }, + .attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE | SLEEP_RETENTION_MODULE_ATTR_ATTACH + }; + esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_PHY_FE, &init_param); + if (err != ESP_OK) { + ESP_LOGW(TAG, "PHY FE sleep retention init failed"); + return; + } +} + +void esp_phy_fe_sleep_data_deinit(void) +{ + esp_err_t err = sleep_retention_module_deinit(SLEEP_RETENTION_MODULE_PHY_FE); + if (err != ESP_OK) { + ESP_LOGW(TAG, "PHY FE sleep retention deinit failed"); + return; + } +} +#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD diff --git a/components/esp_phy/esp32c6/phy_init_data.c b/components/esp_phy/esp32c6/phy_init_data.c index 068b66a6088..f7a82173b29 100644 --- a/components/esp_phy/esp32c6/phy_init_data.c +++ b/components/esp_phy/esp32c6/phy_init_data.c @@ -161,14 +161,12 @@ static esp_err_t sleep_retention_wifi_bb_init(void *arg) #define N_REGS_WIFI_NRX() (136) #define N_REGS_WIFI_BB() (53) #define N_REGS_WIFI_BRX() (39) - #define N_REGS_WIFI_FE_COEX() (58) const static sleep_retention_entries_config_t bb_regs_retention[] = { [0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b00, 0x600a7000, 0x600a7000, N_REGS_WIFI_AGC(), 0, 0), .owner = BIT(0) | BIT(1) }, /* AGC */ [1] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b01, 0x600a7400, 0x600a7400, N_REGS_WIFI_TX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* TX */ [2] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b02, 0x600a7800, 0x600a7800, N_REGS_WIFI_NRX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* NRX */ [3] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b03, 0x600a7c00, 0x600a7c00, N_REGS_WIFI_BB(), 0, 0), .owner = BIT(0) | BIT(1) }, /* BB */ - [4] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b05, 0x600a0000, 0x600a0000, N_REGS_WIFI_FE_COEX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE COEX */ }; esp_err_t err = sleep_retention_entries_create(bb_regs_retention, ARRAY_SIZE(bb_regs_retention), 3, SLEEP_RETENTION_MODULE_WIFI_BB); ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for modem (%s) retention", "WiFi BB"); @@ -201,6 +199,7 @@ void esp_phy_sleep_data_init(void) .attribute = SLEEP_RETENTION_MODULE_ATTR_ATTACH, .depends = RETENTION_MODULE_BITMAP_INIT(CLOCK_MODEM) }; + RETENTION_MODULE_BITMAP_SET(&init_param.depends, SLEEP_RETENTION_MODULE_PHY_FE); esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_WIFI_BB, &init_param); if (err != ESP_OK) { ESP_LOGW(TAG, "WiFi BB sleep retention init failed"); @@ -225,4 +224,39 @@ void esp_phy_sleep_data_deinit(void) } } -#endif /* SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD */ +static esp_err_t sleep_retention_phy_fe_init(void *arg) +{ + #define N_REGS_FE_COEX() (58) + #define REG_FECOEX_BASE 0x600a0000 + + const static sleep_retention_entries_config_t phy_fe_regs_retention[] = { + [0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_FE_LINK(0), REG_FECOEX_BASE, REG_FECOEX_BASE, N_REGS_FE_COEX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE COEX */ + }; + esp_err_t err = sleep_retention_entries_create(phy_fe_regs_retention, ARRAY_SIZE(phy_fe_regs_retention), 3, SLEEP_RETENTION_MODULE_PHY_FE); + ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for modem (%s) retention", "PHY FE"); + ESP_LOGD(TAG, "PHY FE sleep retention initialization"); + return ESP_OK; +} + +void esp_phy_fe_sleep_data_init(void) +{ + sleep_retention_module_init_param_t init_param = { + .cbs = { .create = { .handle = sleep_retention_phy_fe_init, .arg = NULL } }, + .attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE | SLEEP_RETENTION_MODULE_ATTR_ATTACH + }; + esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_PHY_FE, &init_param); + if (err != ESP_OK) { + ESP_LOGW(TAG, "PHY FE sleep retention init failed"); + return; + } +} + +void esp_phy_fe_sleep_data_deinit(void) +{ + esp_err_t err = sleep_retention_module_deinit(SLEEP_RETENTION_MODULE_PHY_FE); + if (err != ESP_OK) { + ESP_LOGW(TAG, "PHY FE sleep retention deinit failed"); + return; + } +} +#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD diff --git a/components/esp_phy/esp32c61/phy_init_data.c b/components/esp_phy/esp32c61/phy_init_data.c index 081df9a8261..e653e2ebf58 100644 --- a/components/esp_phy/esp32c61/phy_init_data.c +++ b/components/esp_phy/esp32c61/phy_init_data.c @@ -162,21 +162,13 @@ static esp_err_t sleep_retention_wifi_bb_init(void *arg) #define N_REGS_WIFI_NRX() (145) #define N_REGS_WIFI_BB() (82) #define N_REGS_WIFI_BRX() (39) - #define N_REGS_WIFI_FE_COEX() (21) - #define N_REGS_WIFI_FE_DATA() (34) - #define N_REGS_WIFI_FE_CTRL() (56) - #define N_REGS_WIFI_FE_WIFI() (21) const static sleep_retention_entries_config_t bb_regs_retention[] = { [0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b00, 0x600a7000, 0x600a7000, N_REGS_WIFI_AGC(), 0, 0), .owner = BIT(0) | BIT(1) }, /* AGC */ [1] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b01, 0x600a7400, 0x600a7400, N_REGS_WIFI_TX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* TX */ [2] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b02, 0x600a7800, 0x600a7800, N_REGS_WIFI_NRX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* NRX */ [3] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b03, 0x600a7c00, 0x600a7c00, N_REGS_WIFI_BB(), 0, 0), .owner = BIT(0) | BIT(1) }, /* BB */ - [4] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b05, 0x600a0000, 0x600a0000, N_REGS_WIFI_FE_COEX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE COEX */ - [5] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b06, 0x600a8000, 0x600a8000, N_REGS_WIFI_BRX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* BRX */ - [6] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b07, 0x600a0400, 0x600a0400, N_REGS_WIFI_FE_DATA(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE DATA */ - [7] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b08, 0x600a0800, 0x600a0800, N_REGS_WIFI_FE_CTRL(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE CTRL */ - [8] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b09, 0x600a0c00, 0x600a0c00, N_REGS_WIFI_FE_WIFI(), 0, 0), .owner = BIT(0) | BIT(1) } /* FE WiFi DATA */ + [4] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b04, 0x600a8000, 0x600a8000, N_REGS_WIFI_BRX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* BRX */ }; esp_err_t err = sleep_retention_entries_create(bb_regs_retention, ARRAY_SIZE(bb_regs_retention), 3, SLEEP_RETENTION_MODULE_WIFI_BB); ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for modem (%s) retention", "WiFi BB"); @@ -209,6 +201,7 @@ void esp_phy_sleep_data_init(void) .attribute = SLEEP_RETENTION_MODULE_ATTR_ATTACH, .depends = RETENTION_MODULE_BITMAP_INIT(CLOCK_MODEM) }; + RETENTION_MODULE_BITMAP_SET(&init_param.depends, SLEEP_RETENTION_MODULE_PHY_FE); esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_WIFI_BB, &init_param); if (err != ESP_OK) { ESP_LOGW(TAG, "WiFi BB sleep retention init failed"); @@ -233,4 +226,48 @@ void esp_phy_sleep_data_deinit(void) } } -#endif /* SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD */ +static esp_err_t sleep_retention_phy_fe_init(void *arg) +{ + #define N_REGS_FE_COEX() (21) + #define N_REGS_FE_DATA() (34) + #define N_REGS_FE_CTRL() (56) + #define N_REGS_FE_DATA_WIFI() (21) + #define REG_FECOEX_BASE 0x600a0000 + #define REG_FEDATA_BASE 0x600a0400 + #define REG_FECTRL_BASE 0x600a0800 + #define REG_FEDATAWIFI_BASE 0x600a0c00 + + const static sleep_retention_entries_config_t phy_fe_regs_retention[] = { + [0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_FE_LINK(0), REG_FECOEX_BASE, REG_FECOEX_BASE, N_REGS_FE_COEX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE COEX */ + [1] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_FE_LINK(1), REG_FEDATA_BASE, REG_FEDATA_BASE, N_REGS_FE_DATA(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE DATA */ + [2] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_FE_LINK(2), REG_FECTRL_BASE, REG_FECTRL_BASE, N_REGS_FE_CTRL(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE CTRL */ + [3] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_FE_LINK(3), REG_FEDATAWIFI_BASE, REG_FEDATAWIFI_BASE, N_REGS_FE_DATA_WIFI(),0, 0), .owner = BIT(0) | BIT(1) } /* FE WIFI DATA */ + }; + esp_err_t err = sleep_retention_entries_create(phy_fe_regs_retention, ARRAY_SIZE(phy_fe_regs_retention), 3, SLEEP_RETENTION_MODULE_PHY_FE); + ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for modem (%s) retention", "PHY FE"); + ESP_LOGD(TAG, "PHY FE sleep retention initialization"); + return ESP_OK; +} + +void esp_phy_fe_sleep_data_init(void) +{ + sleep_retention_module_init_param_t init_param = { + .cbs = { .create = { .handle = sleep_retention_phy_fe_init, .arg = NULL } }, + .attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE | SLEEP_RETENTION_MODULE_ATTR_ATTACH + }; + esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_PHY_FE, &init_param); + if (err != ESP_OK) { + ESP_LOGW(TAG, "PHY FE sleep retention init failed"); + return; + } +} + +void esp_phy_fe_sleep_data_deinit(void) +{ + esp_err_t err = sleep_retention_module_deinit(SLEEP_RETENTION_MODULE_PHY_FE); + if (err != ESP_OK) { + ESP_LOGW(TAG, "PHY FE sleep retention deinit failed"); + return; + } +} +#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD diff --git a/components/esp_phy/esp32s31/phy_init_data.c b/components/esp_phy/esp32s31/phy_init_data.c index 4d635da82bb..9312f501a9a 100644 --- a/components/esp_phy/esp32s31/phy_init_data.c +++ b/components/esp_phy/esp32s31/phy_init_data.c @@ -162,19 +162,11 @@ static esp_err_t sleep_retention_wifi_bb_init(void *arg) #define N_REGS_WIFI_NRX() (145) #define N_REGS_WIFI_BB() (84) #define N_REGS_WIFI_BRX() (39) - #define N_REGS_WIFI_FE_COEX() (22) - #define N_REGS_WIFI_FE_DATA() (35) - #define N_REGS_WIFI_FE_CTRL() (57) - #define N_REGS_WIFI_FE_DATA_WIFI() (22) #define AGC_BASE 0x20107000 #define BB_TX_BASE 0x20107400 #define NRX_BASE 0x20107800 #define BB_BASE 0x20107C00 #define BRX_BASE 0x20108000 - #define REG_FECOEX_BASE 0x20100000 - #define REG_FEDATA_BASE 0x20100400 - #define REG_FECTRL_BASE 0x20100800 - #define REG_FEDATAWIFI_BASE 0x20100c00 /* AGC agc_reg: 0x000 ~0x204  130 BB bb_reg: 0x000~0x14c 84 @@ -188,11 +180,7 @@ NRX: 0x000~0x240 145 [1] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b01, BB_TX_BASE, BB_TX_BASE, N_REGS_WIFI_TX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* TX */ [2] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b02, NRX_BASE, NRX_BASE, N_REGS_WIFI_NRX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* NRX */ [3] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b03, BB_BASE, BB_BASE, N_REGS_WIFI_BB(), 0, 0), .owner = BIT(0) | BIT(1) }, /* BB */ - [4] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b05, REG_FECOEX_BASE, REG_FECOEX_BASE, N_REGS_WIFI_FE_COEX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE COEX */ - [5] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b06, BRX_BASE, BRX_BASE, N_REGS_WIFI_BRX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* BRX */ - [6] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b07, REG_FEDATA_BASE, REG_FEDATA_BASE, N_REGS_WIFI_FE_DATA(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE DATA */ - [7] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b08, REG_FECTRL_BASE, REG_FECTRL_BASE, N_REGS_WIFI_FE_CTRL(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE CTRL */ - [8] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b09, REG_FEDATAWIFI_BASE, REG_FEDATAWIFI_BASE, N_REGS_WIFI_FE_DATA_WIFI(), 0, 0), .owner = BIT(0) | BIT(1) } /* FE WIFI DATA */ + [4] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b04, BRX_BASE, BRX_BASE, N_REGS_WIFI_BRX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* BRX */ }; esp_err_t err = sleep_retention_entries_create(bb_regs_retention, ARRAY_SIZE(bb_regs_retention), 3, SLEEP_RETENTION_MODULE_WIFI_BB); ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for modem (%s) retention", "WiFi BB"); @@ -225,6 +213,7 @@ void esp_phy_sleep_data_init(void) .attribute = SLEEP_RETENTION_MODULE_ATTR_ATTACH, .depends = RETENTION_MODULE_BITMAP_INIT(CLOCK_MODEM) }; + RETENTION_MODULE_BITMAP_SET(&init_param.depends, SLEEP_RETENTION_MODULE_PHY_FE); esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_WIFI_BB, &init_param); if (err != ESP_OK) { ESP_LOGW(TAG, "WiFi BB sleep retention init failed"); @@ -249,4 +238,48 @@ void esp_phy_sleep_data_deinit(void) } } -#endif /* SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD */ +static esp_err_t sleep_retention_phy_fe_init(void *arg) +{ + #define N_REGS_FE_COEX() (22) + #define N_REGS_FE_DATA() (35) + #define N_REGS_FE_CTRL() (57) + #define N_REGS_FE_DATA_WIFI() (22) + #define REG_FECOEX_BASE 0x20100000 + #define REG_FEDATA_BASE 0x20100400 + #define REG_FECTRL_BASE 0x20100800 + #define REG_FEDATAWIFI_BASE 0x20100c00 + + const static sleep_retention_entries_config_t phy_fe_regs_retention[] = { + [0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_FE_LINK(0), REG_FECOEX_BASE, REG_FECOEX_BASE, N_REGS_FE_COEX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE COEX */ + [1] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_FE_LINK(1), REG_FEDATA_BASE, REG_FEDATA_BASE, N_REGS_FE_DATA(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE DATA */ + [2] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_FE_LINK(2), REG_FECTRL_BASE, REG_FECTRL_BASE, N_REGS_FE_CTRL(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE CTRL */ + [3] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_FE_LINK(3), REG_FEDATAWIFI_BASE, REG_FEDATAWIFI_BASE, N_REGS_FE_DATA_WIFI(),0, 0), .owner = BIT(0) | BIT(1) } /* FE WIFI DATA */ + }; + esp_err_t err = sleep_retention_entries_create(phy_fe_regs_retention, ARRAY_SIZE(phy_fe_regs_retention), 3, SLEEP_RETENTION_MODULE_PHY_FE); + ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for modem (%s) retention", "PHY FE"); + ESP_LOGD(TAG, "PHY FE sleep retention initialization"); + return ESP_OK; +} + +void esp_phy_fe_sleep_data_init(void) +{ + sleep_retention_module_init_param_t init_param = { + .cbs = { .create = { .handle = sleep_retention_phy_fe_init, .arg = NULL } }, + .attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE | SLEEP_RETENTION_MODULE_ATTR_ATTACH + }; + esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_PHY_FE, &init_param); + if (err != ESP_OK) { + ESP_LOGW(TAG, "PHY FE sleep retention init failed"); + return; + } +} + +void esp_phy_fe_sleep_data_deinit(void) +{ + esp_err_t err = sleep_retention_module_deinit(SLEEP_RETENTION_MODULE_PHY_FE); + if (err != ESP_OK) { + ESP_LOGW(TAG, "PHY FE sleep retention deinit failed"); + return; + } +} +#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD diff --git a/components/esp_phy/include/esp_private/phy.h b/components/esp_phy/include/esp_private/phy.h index dcbafcab296..ca003827b6e 100644 --- a/components/esp_phy/include/esp_private/phy.h +++ b/components/esp_phy/include/esp_private/phy.h @@ -257,7 +257,7 @@ void esp_phy_modem_rf_flag_update(void); #if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD /** - * @brief PHY module sleep data (includes AGC, TX, NRX, BB, FE, etc..) initialize. + * @brief PHY module sleep data (includes AGC, TX, NRX, BB, etc..) initialize. */ void esp_phy_sleep_data_init(void); @@ -300,6 +300,19 @@ void phy_wait_freq_hw_hop_done(void); */ void phy_track_temp_debug(uint8_t debug_flag, uint8_t track_temp); #endif +#if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD +/** + * @brief PHY module common memory (FE) initialize + * + */ +void esp_phy_fe_sleep_data_init(void); + +/** + * @brief PHY module common memory (FE) de-initialize + * + */ +void esp_phy_fe_sleep_data_deinit(void); +#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD #ifdef __cplusplus } diff --git a/components/esp_phy/src/btbb_init.c b/components/esp_phy/src/btbb_init.c index bcd7768ec37..3b89879538c 100644 --- a/components/esp_phy/src/btbb_init.c +++ b/components/esp_phy/src/btbb_init.c @@ -21,6 +21,7 @@ static uint8_t s_btbb_access_ref = 0; #if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE #include "esp_private/sleep_retention.h" #include "btbb_retention_reg.h" +#include "esp_private/phy.h" static const char* TAG = "btbb_init"; #if SOC_PM_RETENTION_HAS_CLOCK_BUG @@ -32,13 +33,13 @@ static const char* TAG = "btbb_init"; static esp_err_t btbb_sleep_retention_init(void *arg) { const static sleep_retention_entries_config_t btbb_regs_retention[] = { - [0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_BT_BB_LINK(0x00), BB_PART_0_ADDR, BB_PART_0_ADDR, BB_PART_0_SIZE, 0, 0), .owner = BTBB_LINK_OWNER }, - [1] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_BT_BB_LINK(0x01), BB_PART_1_ADDR, BB_PART_1_ADDR, BB_PART_1_SIZE, 0, 0), .owner = BTBB_LINK_OWNER }, + { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_BT_BB_LINK(0x00), BB_PART_0_ADDR, BB_PART_0_ADDR, BB_PART_0_SIZE, 0, 0), .owner = BTBB_LINK_OWNER }, + { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_BT_BB_LINK(0x01), BB_PART_1_ADDR, BB_PART_1_ADDR, BB_PART_1_SIZE, 0, 0), .owner = BTBB_LINK_OWNER }, #if BB_PART_CNT > 2 - [2] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_BT_BB_LINK(0x02), BB_PART_2_ADDR, BB_PART_2_ADDR, BB_PART_2_SIZE, 0, 0), .owner = BTBB_LINK_OWNER }, + { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_BT_BB_LINK(0x02), BB_PART_2_ADDR, BB_PART_2_ADDR, BB_PART_2_SIZE, 0, 0), .owner = BTBB_LINK_OWNER }, #endif // BB_PART_CNT > 2 #if BB_PART_CNT > 3 - [3] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_BT_BB_LINK(0x03), BB_PART_3_ADDR, BB_PART_3_ADDR, BB_PART_3_SIZE, 0, 0), .owner = BTBB_LINK_OWNER }, + { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_BT_BB_LINK(0x03), BB_PART_3_ADDR, BB_PART_3_ADDR, BB_PART_3_SIZE, 0, 0), .owner = BTBB_LINK_OWNER }, #endif // BB_PART_CNT > 3 }; esp_err_t err = sleep_retention_entries_create(btbb_regs_retention, ARRAY_SIZE(btbb_regs_retention), REGDMA_LINK_PRI_BT_MAC_BB, SLEEP_RETENTION_MODULE_BT_BB); diff --git a/components/esp_phy/src/phy_init.c b/components/esp_phy/src/phy_init.c index aeaf3c14870..afc9a4a48e7 100644 --- a/components/esp_phy/src/phy_init.c +++ b/components/esp_phy/src/phy_init.c @@ -522,7 +522,9 @@ void esp_phy_modem_init(uint8_t modem) } #endif // SOC_PM_MODEM_RETENTION_BY_BACKUPDMA #if (SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP) || CONFIG_ESP_PHY_HW_SWITCH_RF - sleep_modem_phy_init(modem); + if (sleep_modem_phy_init(modem) != ESP_OK) { + ESP_LOGE(TAG, "failed to initialize sleep modem phy"); + } #endif // (SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP) || CONFIG_ESP_PHY_HW_SWITCH_RF _lock_release(&s_phy_access_lock); #endif // SOC_PM_MODEM_RETENTION_BY_BACKUPDMA || CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP @@ -577,6 +579,7 @@ void esp_mac_bb_pd_mem_init(void) } _lock_release(&s_phy_access_lock); #elif SOC_PM_MODEM_RETENTION_BY_REGDMA + esp_phy_fe_sleep_data_init(); esp_phy_sleep_data_init(); #endif } @@ -593,6 +596,7 @@ void esp_mac_bb_pd_mem_deinit(void) _lock_release(&s_phy_access_lock); #elif SOC_PM_MODEM_RETENTION_BY_REGDMA esp_phy_sleep_data_deinit(); + esp_phy_fe_sleep_data_deinit(); #endif } diff --git a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in index 1090af40bdc..f9273da7cd7 100644 --- a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in @@ -1465,7 +1465,7 @@ config SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED config SOC_PM_RETENTION_MODULE_NUM int - default 32 + default 40 config SOC_PM_FLASH_KEEP_POWER_IN_LSLP bool diff --git a/components/soc/esp32c5/include/soc/retention_periph_defs.h b/components/soc/esp32c5/include/soc/retention_periph_defs.h index 3bc72fa0bb7..4cd0ac7e680 100644 --- a/components/soc/esp32c5/include/soc/retention_periph_defs.h +++ b/components/soc/esp32c5/include/soc/retention_periph_defs.h @@ -55,6 +55,7 @@ typedef enum periph_retention_module { SLEEP_RETENTION_MODULE_BT_BB = 29, SLEEP_RETENTION_MODULE_802154_MAC = 30, SLEEP_RETENTION_MODULE_MODEM_PHY = 31, + SLEEP_RETENTION_MODULE_PHY_FE = 32, SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1 } periph_retention_module_t; diff --git a/components/soc/esp32c5/include/soc/soc_caps.h b/components/soc/esp32c5/include/soc/soc_caps.h index 5345cf8308c..3d6d7a109f3 100644 --- a/components/soc/esp32c5/include/soc/soc_caps.h +++ b/components/soc/esp32c5/include/soc/soc_caps.h @@ -593,7 +593,7 @@ #define SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED (1) -#define SOC_PM_RETENTION_MODULE_NUM (32) +#define SOC_PM_RETENTION_MODULE_NUM (40) #define SOC_PM_FLASH_KEEP_POWER_IN_LSLP (1) /*! Date: Sat, 9 May 2026 08:18:45 +0800 Subject: [PATCH 09/13] fix(phy): added fe set freq reset to rf retention list --- .../lowpower/port/esp32c5/sleep_phy.c | 60 ++++++------- .../lowpower/port/esp32c6/sleep_phy.c | 84 ++++++++++--------- .../lowpower/port/esp32c61/sleep_phy.c | 84 ++++++++++--------- components/esp_phy/esp32s31/phy_init_data.c | 5 +- .../include/soc/retention_periph_defs.h | 2 +- .../include/soc/retention_periph_defs.h | 2 +- .../include/soc/retention_periph_defs.h | 2 +- .../include/soc/retention_periph_defs.h | 1 + 8 files changed, 128 insertions(+), 112 deletions(-) diff --git a/components/esp_hw_support/lowpower/port/esp32c5/sleep_phy.c b/components/esp_hw_support/lowpower/port/esp32c5/sleep_phy.c index a3bd8d480f4..07ae281b1da 100644 --- a/components/esp_hw_support/lowpower/port/esp32c5/sleep_phy.c +++ b/components/esp_hw_support/lowpower/port/esp32c5/sleep_phy.c @@ -25,6 +25,7 @@ #define FECOEX_SET_FREQ_SET_CHAN_REG (0x600a001c) #define FECOEX_SET_CHAN_EN (BIT(17)) +#define FECOEX_SET_FREQ_RESETN (BIT(30)) #define FECOEX_SET_FREQ_SET_CHAN_ST_REG (0x600a0028) #define FECOEX_SET_CHAN_DONE (BIT(8)) #define FECOEX_AGC_CONF_REG (0x600a7030) @@ -55,44 +56,47 @@ static esp_err_t sleep_phy_retention_init(void *arg) static sleep_retention_entries_config_t phy_modem_config[] = { [0] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x00), MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN, MODEM_LPCON_CLK_I2C_MST_EN_M, 1, 0), .owner = PHY_ENTRY() }, /* I2C MST enable */ + /* Reset SET_FREQ fsm */ + [1] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x01), FECOEX_SET_FREQ_SET_CHAN_REG, 0, FECOEX_SET_FREQ_RESETN, 1, 0), .owner = PHY_ENTRY() }, /* PMU or software to trigger enable RF PHY */ - [1] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x01), I2C_ANA_MST_ANA_CONF0_REG, 0x8, 0xc, 1, 0), .owner = PHY_ENTRY() }, /* BBPLL calibration enable */ - [2] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x02), PMU_RF_PWR_REG, 0xf3800000, 0xf3800000, 1, 0), .owner = PHY_ENTRY() }, - [3] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x03), SARADC_TSENS_REG, SARADC_TSENS_PU, 0x400000, 1, 0), .owner = PHY_ENTRY() }, - [4] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x04), I2C_ANA_MST_I2C_BURST_CONF_REG, 0, 0xffffffff, 1, 0), .owner = PHY_ENTRY() }, - [5] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x05), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_BURST_DONE, 0x1, 1, 0), .owner = PHY_ENTRY() }, - [6] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x06), FECOEX_SET_FREQ_SET_CHAN_REG, FECOEX_SET_CHAN_EN, 0x20000, 1, 0), .owner = PHY_ENTRY() }, - [7] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x07), FECOEX_SET_FREQ_SET_CHAN_REG, 0, 0x20000, 1, 0), .owner = PHY_ENTRY() }, - [8] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x08), FECOEX_SET_FREQ_SET_CHAN_ST_REG, FECOEX_SET_CHAN_DONE, 0x100, 1, 0), .owner = PHY_ENTRY() }, - [9] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x09), MODEM_SYSCON_WIFI_BB_CFG_REG, BIT(1), 0x2, 1, 0), .owner = PHY_ENTRY() }, - [10] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0a), FECOEX_AGC_CONF_REG, 0, 0x20000000, 1, 0), .owner = PHY_ENTRY() }, + [2] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x02), I2C_ANA_MST_ANA_CONF0_REG, 0x8, 0xc, 1, 0), .owner = PHY_ENTRY() }, /* BBPLL calibration enable */ + [3] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x03), PMU_RF_PWR_REG, 0xf3800000, 0xf3800000, 1, 0), .owner = PHY_ENTRY() }, + [4] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x04), SARADC_TSENS_REG, SARADC_TSENS_PU, 0x400000, 1, 0), .owner = PHY_ENTRY() }, + [5] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x05), I2C_ANA_MST_I2C_BURST_CONF_REG, 0, 0xffffffff, 1, 0), .owner = PHY_ENTRY() }, + [6] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x06), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_BURST_DONE, 0x1, 1, 0), .owner = PHY_ENTRY() }, + [7] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x07), FECOEX_SET_FREQ_SET_CHAN_REG, FECOEX_SET_FREQ_RESETN, FECOEX_SET_FREQ_RESETN, 1, 0), .owner = PHY_ENTRY() },\ + [8] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x08), FECOEX_SET_FREQ_SET_CHAN_REG, FECOEX_SET_CHAN_EN, 0x20000, 1, 0), .owner = PHY_ENTRY() }, + [9] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x09), FECOEX_SET_FREQ_SET_CHAN_REG, 0, 0x20000, 1, 0), .owner = PHY_ENTRY() }, + [10] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x0a), FECOEX_SET_FREQ_SET_CHAN_ST_REG, FECOEX_SET_CHAN_DONE, 0x100, 1, 0), .owner = PHY_ENTRY() }, + [11] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0b), MODEM_SYSCON_WIFI_BB_CFG_REG, BIT(1), 0x2, 1, 0), .owner = PHY_ENTRY() }, + [12] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0c), FECOEX_AGC_CONF_REG, 0, 0x20000000, 1, 0), .owner = PHY_ENTRY() }, /* PMU to trigger enable RXBLOCK */ - [11] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0b), WDEVTXQ_BLOCK, 0, 0x1000, 1, 0), .owner = PHY_ENTRY() }, + [13] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0d), WDEVTXQ_BLOCK, 0, 0x1000, 1, 0), .owner = PHY_ENTRY() }, /* PMU or software to trigger disable RF PHY */ - [12] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0c), FECOEX_AGC_CONF_REG, FECOEX_AGC_DIS, 0x20000000, 0, 1), .owner = PHY_ENTRY() }, - [13] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0d), MODEM_SYSCON_WIFI_BB_CFG_REG, 0, 0x2, 0, 1), .owner = PHY_ENTRY() }, - [14] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0e), FECOEX_SET_FREQ_SET_CHAN_REG, 0, 0x20000, 0, 1), .owner = PHY_ENTRY() }, - [15] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0f), I2C_ANA_MST_I2C_BURST_CONF_REG, 0, 0xffffffff, 0, 1), .owner = PHY_ENTRY() }, - [16] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x10), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_BURST_DONE, 0x1, 0, 1), .owner = PHY_ENTRY() }, - [17] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x11), SARADC_TSENS_REG, 0, 0x400000, 0, 1), .owner = PHY_ENTRY() }, - [18] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x12), PMU_RF_PWR_REG, 0, 0xf3800000, 0, 1), .owner = PHY_ENTRY() }, - [19] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x13), I2C_ANA_MST_ANA_CONF0_REG, 0x4, 0xc, 0, 1), .owner = PHY_ENTRY() }, /* BBPLL calibration disable */ + [14] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0e), FECOEX_AGC_CONF_REG, FECOEX_AGC_DIS, 0x20000000, 0, 1), .owner = PHY_ENTRY() }, + [15] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0f), MODEM_SYSCON_WIFI_BB_CFG_REG, 0, 0x2, 0, 1), .owner = PHY_ENTRY() }, + [16] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x10), FECOEX_SET_FREQ_SET_CHAN_REG, 0, 0x20000, 0, 1), .owner = PHY_ENTRY() }, + [17] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x11), I2C_ANA_MST_I2C_BURST_CONF_REG, 0, 0xffffffff, 0, 1), .owner = PHY_ENTRY() }, + [18] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x12), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_BURST_DONE, 0x1, 0, 1), .owner = PHY_ENTRY() }, + [19] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x13), SARADC_TSENS_REG, 0, 0x400000, 0, 1), .owner = PHY_ENTRY() }, + [20] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x14), PMU_RF_PWR_REG, 0, 0xf3800000, 0, 1), .owner = PHY_ENTRY() }, + [21] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x15), I2C_ANA_MST_ANA_CONF0_REG, 0x4, 0xc, 0, 1), .owner = PHY_ENTRY() }, /* BBPLL calibration disable */ - [20] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x14), MODEM_LPCON_CLK_CONF_REG, 0, MODEM_LPCON_CLK_I2C_MST_EN_M, 0, 1), .owner = PHY_ENTRY() }, /* I2C MST disable */ + [22] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x16), MODEM_LPCON_CLK_CONF_REG, 0, MODEM_LPCON_CLK_I2C_MST_EN_M, 0, 1), .owner = PHY_ENTRY() }, /* I2C MST disable */ /* PMU to trigger disable RXBLOCK */ - [21] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x15), WDEVTXQ_BLOCK, 0, 0x6000, 0, 1), .owner = PHY_ENTRY() }, - [22] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x16), WDEVTXQ_BLOCK, WDEV_RXBLOCK, 0x1000, 0, 1), .owner = PHY_ENTRY() }, [23] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x17), WDEVTXQ_BLOCK, 0, 0x6000, 0, 1), .owner = PHY_ENTRY() }, + [24] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x18), WDEVTXQ_BLOCK, WDEV_RXBLOCK, 0x1000, 0, 1), .owner = PHY_ENTRY() }, + [25] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x19), WDEVTXQ_BLOCK, 0, 0x6000, 0, 1), .owner = PHY_ENTRY() }, - [24] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x18), PMU_SLP_WAKEUP_CNTL7_REG, 0x200000, 0xffff0000, 1, 0), .owner = PHY_ENTRY() }, - [25] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x19), PMU_SLP_WAKEUP_CNTL7_REG, 0x9730000, 0xffff0000, 0, 1), .owner = PHY_ENTRY() } + [26] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1a), PMU_SLP_WAKEUP_CNTL7_REG, 0x200000, 0xffff0000, 1, 0), .owner = PHY_ENTRY() }, + [27] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1b), PMU_SLP_WAKEUP_CNTL7_REG, 0x9730000, 0xffff0000, 0, 1), .owner = PHY_ENTRY() } }; extern uint32_t phy_ana_i2c_master_burst_rf_onoff(bool on); - phy_modem_config[4].config.write_wait.value = phy_ana_i2c_master_burst_rf_onoff(true); - phy_modem_config[15].config.write_wait.value = phy_ana_i2c_master_burst_rf_onoff(false); + phy_modem_config[5].config.write_wait.value = phy_ana_i2c_master_burst_rf_onoff(true); + phy_modem_config[17].config.write_wait.value = phy_ana_i2c_master_burst_rf_onoff(false); esp_err_t err = sleep_retention_entries_create(phy_modem_config, ARRAY_SIZE(phy_modem_config), 7, SLEEP_RETENTION_MODULE_MODEM_PHY); ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate modem phy link"); return ESP_OK; @@ -109,8 +113,8 @@ esp_err_t sleep_phy_link_init(void **link_context) if (err == ESP_OK) { err = sleep_retention_module_allocate(SLEEP_RETENTION_MODULE_MODEM_PHY); if (err == ESP_OK) { - const int id_array[] = { REGDMA_PHY_LINK(0x00), REGDMA_PHY_LINK(0x14), /* I2C MST CLK entries */ - REGDMA_PHY_LINK(0x0b), REGDMA_PHY_LINK(0x15), REGDMA_PHY_LINK(0x16), REGDMA_PHY_LINK(0x17) /* WiFi Related entries */ + const int id_array[] = { REGDMA_PHY_LINK(0x00), REGDMA_PHY_LINK(0x16), /* I2C MST CLK entries */ + REGDMA_PHY_LINK(0x0d), REGDMA_PHY_LINK(0x17), REGDMA_PHY_LINK(0x18), REGDMA_PHY_LINK(0x19) /* WiFi Related entries */ }; static DRAM_ATTR sleep_phy_link_context_t phy_link_context; diff --git a/components/esp_hw_support/lowpower/port/esp32c6/sleep_phy.c b/components/esp_hw_support/lowpower/port/esp32c6/sleep_phy.c index 54cdba41f19..3d2e5ca55a1 100644 --- a/components/esp_hw_support/lowpower/port/esp32c6/sleep_phy.c +++ b/components/esp_hw_support/lowpower/port/esp32c6/sleep_phy.c @@ -23,6 +23,7 @@ #define PMU_RF_PWR_REG (0x600b0154) #define FECOEX_SET_FREQ_SET_CHAN_REG (0x600a00c0) +#define FECOEX_SET_FREQ_RESETN (BIT(30)) #define FECOEX_SET_CHAN_EN (BIT(14)) #define FECOEX_SET_FREQ_SET_CHAN_ST_REG (0x600a00cc) #define FECOEX_SET_CHAN_DONE (BIT(8)) @@ -57,54 +58,57 @@ esp_err_t sleep_phy_link_init(void **link_context) [2] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x00), MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN, MODEM_LPCON_CLK_I2C_MST_EN_M, 1, 0), /* I2C MST enable */ [3] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x01), MODEM_LPCON_I2C_MST_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_SEL_160M, MODEM_LPCON_CLK_I2C_MST_SEL_160M_M, 1, 0), /* I2C MST sel 160m enable */ + /* Reset SET_FREQ fsm */ + [4] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x02), FECOEX_SET_FREQ_SET_CHAN_REG, 0, FECOEX_SET_FREQ_RESETN, 1, 0), /* PMU or software to trigger enable RF PHY */ - [4] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x02), I2C_ANA_MST_ANA_CONF0_REG, 0x8, 0xc, 1, 0), /* BBPLL calibration enable */ - [5] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x03), PMU_RF_PWR_REG, 0xf0000000, 0xf0000000, 1, 0), - [6] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x04), SARADC_TSENS_REG, SARADC_TSENS_PU, 0x400000, 1, 0), - [7] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x05), I2C_ANA_MST_I2C_BURST_CONF_REG, 0, 0xffffffff, 1, 0), - [8] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x06), PMU_DATE_REG, ~I2C_ANA_MST_BURST_DONE, 0x1, 1, 0), - [9] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x07), PMU_DATE_REG, ~I2C_ANA_MST_BURST_DONE, 0x1, 1, 0), - [10] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x08), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_BURST_DONE, 0x1, 1, 0), - [11] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x09), FECOEX_SET_FREQ_SET_CHAN_REG, FECOEX_SET_CHAN_EN, 0x4000, 1, 0), - [12] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0a), FECOEX_SET_FREQ_SET_CHAN_REG, 0, 0x4000, 1, 0), - [13] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0b), PMU_DATE_REG, ~FECOEX_SET_CHAN_DONE, 0x100, 1, 0), - [14] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x0c), PMU_DATE_REG, ~FECOEX_SET_CHAN_DONE, 0x100, 1, 0), - [15] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x0d), FECOEX_SET_FREQ_SET_CHAN_ST_REG, FECOEX_SET_CHAN_DONE, 0x100, 1, 0), - [16] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0e), MODEM_SYSCON_WIFI_BB_CFG_REG, BIT(1), 0x2, 1, 0), - [17] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0f), FECOEX_AGC_CONF_REG, 0, 0x20000000, 1, 0), + [5] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x03), I2C_ANA_MST_ANA_CONF0_REG, 0x8, 0xc, 1, 0), /* BBPLL calibration enable */ + [6] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x04), PMU_RF_PWR_REG, 0xf0000000, 0xf0000000, 1, 0), + [7] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x05), SARADC_TSENS_REG, SARADC_TSENS_PU, 0x400000, 1, 0), + [8] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x06), I2C_ANA_MST_I2C_BURST_CONF_REG, 0, 0xffffffff, 1, 0), + [9] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x07), PMU_DATE_REG, ~I2C_ANA_MST_BURST_DONE, 0x1, 1, 0), + [10] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x08), PMU_DATE_REG, ~I2C_ANA_MST_BURST_DONE, 0x1, 1, 0), + [11] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x09), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_BURST_DONE, 0x1, 1, 0), + [12] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0a), FECOEX_SET_FREQ_SET_CHAN_REG, FECOEX_SET_FREQ_RESETN, FECOEX_SET_FREQ_RESETN, 1, 0), + [13] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0b), FECOEX_SET_FREQ_SET_CHAN_REG, FECOEX_SET_CHAN_EN, 0x4000, 1, 0), + [14] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0c), FECOEX_SET_FREQ_SET_CHAN_REG, 0, 0x4000, 1, 0), + [15] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0d), PMU_DATE_REG, ~FECOEX_SET_CHAN_DONE, 0x100, 1, 0), + [16] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x0e), PMU_DATE_REG, ~FECOEX_SET_CHAN_DONE, 0x100, 1, 0), + [17] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x0f), FECOEX_SET_FREQ_SET_CHAN_ST_REG, FECOEX_SET_CHAN_DONE, 0x100, 1, 0), + [18] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x10), MODEM_SYSCON_WIFI_BB_CFG_REG, BIT(1), 0x2, 1, 0), + [19] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x11), FECOEX_AGC_CONF_REG, 0, 0x20000000, 1, 0), /* PMU to trigger enable RXBLOCK */ - [18] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x10), WDEVTXQ_BLOCK, 0, 0x1000, 1, 0), + [20] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x12), WDEVTXQ_BLOCK, 0, 0x1000, 1, 0), /* PMU or software to trigger disable RF PHY */ - [19] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x11), FECOEX_AGC_CONF_REG, FECOEX_AGC_DIS, 0x20000000, 0, 1), - [20] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x12), MODEM_SYSCON_WIFI_BB_CFG_REG, 0, 0x2, 0, 1), - [21] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x13), FECOEX_SET_FREQ_SET_CHAN_REG, 0, 0x4000, 0, 1), - [22] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x14), I2C_ANA_MST_I2C_BURST_CONF_REG, 0, 0xffffffff, 0, 1), - [23] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x15), PMU_DATE_REG, ~I2C_ANA_MST_BURST_DONE, 0x1, 0, 1), - [24] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x16), PMU_DATE_REG, ~I2C_ANA_MST_BURST_DONE, 0x1, 0, 1), - [25] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x17), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_BURST_DONE, 0x1, 0, 1), - [26] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x18), SARADC_TSENS_REG, 0, 0x400000, 0, 1), - [27] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x19), PMU_RF_PWR_REG, 0, 0xf0000000, 0, 1), - [28] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1a), I2C_ANA_MST_ANA_CONF0_REG, 0x4, 0xc, 0, 1), /* BBPLL calibration disable */ + [21] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x13), FECOEX_AGC_CONF_REG, FECOEX_AGC_DIS, 0x20000000, 0, 1), + [22] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x14), MODEM_SYSCON_WIFI_BB_CFG_REG, 0, 0x2, 0, 1), + [23] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x15), FECOEX_SET_FREQ_SET_CHAN_REG, 0, 0x4000, 0, 1), + [24] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x16), I2C_ANA_MST_I2C_BURST_CONF_REG, 0, 0xffffffff, 0, 1), + [25] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x17), PMU_DATE_REG, ~I2C_ANA_MST_BURST_DONE, 0x1, 0, 1), + [26] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x18), PMU_DATE_REG, ~I2C_ANA_MST_BURST_DONE, 0x1, 0, 1), + [27] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x19), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_BURST_DONE, 0x1, 0, 1), + [28] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1a), SARADC_TSENS_REG, 0, 0x400000, 0, 1), + [29] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1b), PMU_RF_PWR_REG, 0, 0xf0000000, 0, 1), + [30] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1c), I2C_ANA_MST_ANA_CONF0_REG, 0x4, 0xc, 0, 1), /* BBPLL calibration disable */ - [29] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1b), MODEM_LPCON_CLK_CONF_REG, 0, MODEM_LPCON_CLK_I2C_MST_EN_M, 0, 1), /* I2C MST disable */ + [31] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1d), MODEM_LPCON_CLK_CONF_REG, 0, MODEM_LPCON_CLK_I2C_MST_EN_M, 0, 1), /* I2C MST disable */ /* PMU to trigger disable RXBLOCK */ - [30] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1c), PMU_DATE_REG, ~0, 0x6000, 0, 1), - [31] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x1d), PMU_DATE_REG, ~0, 0x6000, 0, 1), - [32] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x1e), WDEVTXQ_BLOCK, 0, 0x6000, 0, 1), - [33] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1f), WDEVTXQ_BLOCK, WDEV_RXBLOCK, 0x1000, 0, 1), - [34] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x20), PMU_DATE_REG, ~0, 0x6000, 0, 1), - [35] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x21), PMU_DATE_REG, ~0, 0x6000, 0, 1), - [36] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x22), WDEVTXQ_BLOCK, 0, 0x6000, 0, 1), + [32] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1e), PMU_DATE_REG, ~0, 0x6000, 0, 1), + [33] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x1f), PMU_DATE_REG, ~0, 0x6000, 0, 1), + [34] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x20), WDEVTXQ_BLOCK, 0, 0x6000, 0, 1), + [35] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x21), WDEVTXQ_BLOCK, WDEV_RXBLOCK, 0x1000, 0, 1), + [36] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x22), PMU_DATE_REG, ~0, 0x6000, 0, 1), + [37] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x23), PMU_DATE_REG, ~0, 0x6000, 0, 1), + [38] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x24), WDEVTXQ_BLOCK, 0, 0x6000, 0, 1), - [37] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x23), PMU_SLP_WAKEUP_CNTL7_REG, 0x200000, 0xffff0000, 1, 0), - [38] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x24), PMU_SLP_WAKEUP_CNTL7_REG, 0x9730000, 0xffff0000, 0, 1) + [39] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x25), PMU_SLP_WAKEUP_CNTL7_REG, 0x200000, 0xffff0000, 1, 0), + [40] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x26), PMU_SLP_WAKEUP_CNTL7_REG, 0x9730000, 0xffff0000, 0, 1) }; extern uint32_t phy_ana_i2c_master_burst_rf_onoff(bool on); - phy_modem_config[7].write_wait.value = phy_ana_i2c_master_burst_rf_onoff(true); - phy_modem_config[22].write_wait.value = phy_ana_i2c_master_burst_rf_onoff(false); + phy_modem_config[8].write_wait.value = phy_ana_i2c_master_burst_rf_onoff(true); + phy_modem_config[24].write_wait.value = phy_ana_i2c_master_burst_rf_onoff(false); void *link = NULL; for (int i = ARRAY_SIZE(phy_modem_config) - 1; (err == ESP_OK) && (i >= 0); i--) { @@ -119,9 +123,9 @@ esp_err_t sleep_phy_link_init(void **link_context) if (err == ESP_OK) { pau_regdma_set_modem_link_addr(link); - const int id_array[] = { REGDMA_PHY_LINK(0x00), REGDMA_PHY_LINK(0x01), REGDMA_PHY_LINK(0x1b), /* I2C MST CLK entries */ - REGDMA_PHY_LINK(0x10), REGDMA_PHY_LINK(0x1c), REGDMA_PHY_LINK(0x1d), REGDMA_PHY_LINK(0x1e), - REGDMA_PHY_LINK(0x1f), REGDMA_PHY_LINK(0x20), REGDMA_PHY_LINK(0x21), REGDMA_PHY_LINK(0x22) /* WiFi Related entries */ + const int id_array[] = { REGDMA_PHY_LINK(0x00), REGDMA_PHY_LINK(0x01), REGDMA_PHY_LINK(0x1d), /* I2C MST CLK entries */ + REGDMA_PHY_LINK(0x12), REGDMA_PHY_LINK(0x1e), REGDMA_PHY_LINK(0x1f), REGDMA_PHY_LINK(0x20), + REGDMA_PHY_LINK(0x21), REGDMA_PHY_LINK(0x22), REGDMA_PHY_LINK(0x23), REGDMA_PHY_LINK(0x24) /* WiFi Related entries */ }; static DRAM_ATTR sleep_phy_link_context_t phy_link_context; diff --git a/components/esp_hw_support/lowpower/port/esp32c61/sleep_phy.c b/components/esp_hw_support/lowpower/port/esp32c61/sleep_phy.c index ddc7602542f..cfcaf31fb50 100644 --- a/components/esp_hw_support/lowpower/port/esp32c61/sleep_phy.c +++ b/components/esp_hw_support/lowpower/port/esp32c61/sleep_phy.c @@ -24,6 +24,7 @@ #define FECOEX_SET_FREQ_SET_CHAN_REG (0x600a001c) #define FECOEX_SET_CHAN_EN (BIT(17)) +#define FECOEX_SET_FREQ_RESETN (BIT(30)) #define FECOEX_SET_FREQ_SET_CHAN_ST_REG (0x600a0028) #define FECOEX_SET_CHAN_DONE (BIT(8)) #define FECOEX_AGC_CONF_REG (0x600a7030) @@ -50,56 +51,59 @@ esp_err_t sleep_phy_link_init(void **link_context) static regdma_link_config_t phy_modem_config[] = { [0] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x00), MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN, MODEM_LPCON_CLK_I2C_MST_EN_M, 1, 0), /* I2C MST enable */ + /* Reset SET_FREQ fsm */ + [1] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x01), FECOEX_SET_FREQ_SET_CHAN_REG, 0, FECOEX_SET_FREQ_RESETN, 1, 0), /* PMU or software to trigger enable RF PHY */ - [1] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x01), I2C_ANA_MST_ANA_CONF0_REG, 0x8, 0xc, 1, 0), /* BBPLL calibration enable */ - [2] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x02), PMU_RF_PWR_REG, 0xf0000000, 0xf0000000, 1, 0), - [3] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x03), SARADC_TSENS_REG, SARADC_TSENS_PU, 0x400000, 1, 0), + [2] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x02), I2C_ANA_MST_ANA_CONF0_REG, 0x8, 0xc, 1, 0), /* BBPLL calibration enable */ + [3] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x03), PMU_RF_PWR_REG, 0xf0000000, 0xf0000000, 1, 0), + [4] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x04), SARADC_TSENS_REG, SARADC_TSENS_PU, 0x400000, 1, 0), - [4] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x04), I2C_ANA_MST_I2C_BURST_CONF_REG, 0, 0xffffffff, 1, 0), - [5] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x05), PMU_DATE_REG, ~I2C_ANA_MST_BURST_DONE, 0x1, 1, 0), - [6] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x06), PMU_DATE_REG, ~I2C_ANA_MST_BURST_DONE, 0x1, 1, 0), - [7] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x07), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_BURST_DONE, 0x1, 1, 0), + [5] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x05), I2C_ANA_MST_I2C_BURST_CONF_REG, 0, 0xffffffff, 1, 0), + [6] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x06), PMU_DATE_REG, ~I2C_ANA_MST_BURST_DONE, 0x1, 1, 0), + [7] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x07), PMU_DATE_REG, ~I2C_ANA_MST_BURST_DONE, 0x1, 1, 0), + [8] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x08), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_BURST_DONE, 0x1, 1, 0), - [8] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x08), FECOEX_SET_FREQ_SET_CHAN_REG, FECOEX_SET_CHAN_EN, 0x20000, 1, 0), - [9] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x09), FECOEX_SET_FREQ_SET_CHAN_REG, 0, 0x20000, 1, 0), - [10] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0a), PMU_DATE_REG, ~FECOEX_SET_CHAN_DONE, 0x100, 1, 0), - [11] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x0b), PMU_DATE_REG, ~FECOEX_SET_CHAN_DONE, 0x100, 1, 0), - [12] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x0c), FECOEX_SET_FREQ_SET_CHAN_ST_REG, FECOEX_SET_CHAN_DONE, 0x100, 1, 0), - [13] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0d), MODEM_SYSCON_WIFI_BB_CFG_REG, BIT(1), 0x2, 1, 0), - [14] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0e), FECOEX_AGC_CONF_REG, 0, 0x20000000, 1, 0), + [9] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x09), FECOEX_SET_FREQ_SET_CHAN_REG, FECOEX_SET_FREQ_RESETN, FECOEX_SET_FREQ_RESETN, 1, 0),\ + [10] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0a), FECOEX_SET_FREQ_SET_CHAN_REG, FECOEX_SET_CHAN_EN, 0x20000, 1, 0), + [11] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0b), FECOEX_SET_FREQ_SET_CHAN_REG, 0, 0x20000, 1, 0), + [12] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0c), PMU_DATE_REG, ~FECOEX_SET_CHAN_DONE, 0x100, 1, 0), + [13] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x0d), PMU_DATE_REG, ~FECOEX_SET_CHAN_DONE, 0x100, 1, 0), + [14] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x0e), FECOEX_SET_FREQ_SET_CHAN_ST_REG, FECOEX_SET_CHAN_DONE, 0x100, 1, 0), + [15] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0f), MODEM_SYSCON_WIFI_BB_CFG_REG, BIT(1), 0x2, 1, 0), + [16] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x10), FECOEX_AGC_CONF_REG, 0, 0x20000000, 1, 0), /* PMU to trigger enable RXBLOCK */ - [15] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0f), WDEVTXQ_BLOCK, 0, 0x1000, 1, 0), + [17] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x11), WDEVTXQ_BLOCK, 0, 0x1000, 1, 0), /* PMU or software to trigger disable RF PHY */ - [16] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x10), FECOEX_AGC_CONF_REG, FECOEX_AGC_DIS, 0x20000000, 0, 1), - [17] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x11), MODEM_SYSCON_WIFI_BB_CFG_REG, 0, 0x2, 0, 1), - [18] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x12), FECOEX_SET_FREQ_SET_CHAN_REG, 0, 0x20000, 0, 1), - [19] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x13), I2C_ANA_MST_I2C_BURST_CONF_REG, 0, 0xffffffff, 0, 1), - [20] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x14), PMU_DATE_REG, ~I2C_ANA_MST_BURST_DONE, 0x1, 0, 1), - [21] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x15), PMU_DATE_REG, ~I2C_ANA_MST_BURST_DONE, 0x1, 0, 1), - [22] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x16), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_BURST_DONE, 0x1, 0, 1), - [23] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x17), SARADC_TSENS_REG, 0, 0x400000, 0, 1), - [24] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x18), PMU_RF_PWR_REG, 0, 0xf0000000, 0, 1), - [25] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x19), I2C_ANA_MST_ANA_CONF0_REG, 0x4, 0xc, 0, 1), /* BBPLL calibration disable */ + [18] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x12), FECOEX_AGC_CONF_REG, FECOEX_AGC_DIS, 0x20000000, 0, 1), + [19] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x13), MODEM_SYSCON_WIFI_BB_CFG_REG, 0, 0x2, 0, 1), + [20] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x14), FECOEX_SET_FREQ_SET_CHAN_REG, 0, 0x20000, 0, 1), + [21] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x15), I2C_ANA_MST_I2C_BURST_CONF_REG, 0, 0xffffffff, 0, 1), + [22] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x16), PMU_DATE_REG, ~I2C_ANA_MST_BURST_DONE, 0x1, 0, 1), + [23] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x17), PMU_DATE_REG, ~I2C_ANA_MST_BURST_DONE, 0x1, 0, 1), + [24] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x18), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_BURST_DONE, 0x1, 0, 1), + [25] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x19), SARADC_TSENS_REG, 0, 0x400000, 0, 1), + [26] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1a), PMU_RF_PWR_REG, 0, 0xf0000000, 0, 1), + [27] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1b), I2C_ANA_MST_ANA_CONF0_REG, 0x4, 0xc, 0, 1), /* BBPLL calibration disable */ - [26] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1a), MODEM_LPCON_CLK_CONF_REG, 0, MODEM_LPCON_CLK_I2C_MST_EN_M, 0, 1), /* I2C MST disable */ + [28] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1c), MODEM_LPCON_CLK_CONF_REG, 0, MODEM_LPCON_CLK_I2C_MST_EN_M, 0, 1), /* I2C MST disable */ /* PMU to trigger disable RXBLOCK */ - [27] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1b), PMU_DATE_REG, ~0, 0x6000, 0, 1), - [28] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x1c), PMU_DATE_REG, ~0, 0x6000, 0, 1), - [29] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x1d), WDEVTXQ_BLOCK, 0, 0x6000, 0, 1), - [30] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1e), WDEVTXQ_BLOCK, WDEV_RXBLOCK, 0x1000, 0, 1), - [31] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1f), PMU_DATE_REG, ~0, 0x6000, 0, 1), - [32] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x20), PMU_DATE_REG, ~0, 0x6000, 0, 1), - [33] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x21), WDEVTXQ_BLOCK, 0, 0x6000, 0, 1), + [29] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1d), PMU_DATE_REG, ~0, 0x6000, 0, 1), + [30] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x1e), PMU_DATE_REG, ~0, 0x6000, 0, 1), + [31] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x1f), WDEVTXQ_BLOCK, 0, 0x6000, 0, 1), + [32] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x20), WDEVTXQ_BLOCK, WDEV_RXBLOCK, 0x1000, 0, 1), + [33] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x21), PMU_DATE_REG, ~0, 0x6000, 0, 1), + [34] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x22), PMU_DATE_REG, ~0, 0x6000, 0, 1), + [35] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x23), WDEVTXQ_BLOCK, 0, 0x6000, 0, 1), - [34] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x22), PMU_SLP_WAKEUP_CNTL7_REG, 0x200000, 0xffff0000, 1, 0), - [35] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x23), PMU_SLP_WAKEUP_CNTL7_REG, 0x9730000, 0xffff0000, 0, 1) + [36] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x24), PMU_SLP_WAKEUP_CNTL7_REG, 0x200000, 0xffff0000, 1, 0), + [37] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x25), PMU_SLP_WAKEUP_CNTL7_REG, 0x9730000, 0xffff0000, 0, 1) }; extern uint32_t phy_ana_i2c_master_burst_rf_onoff(bool on); - phy_modem_config[4].write_wait.value = phy_ana_i2c_master_burst_rf_onoff(true); - phy_modem_config[19].write_wait.value = phy_ana_i2c_master_burst_rf_onoff(false); + phy_modem_config[5].write_wait.value = phy_ana_i2c_master_burst_rf_onoff(true); + phy_modem_config[21].write_wait.value = phy_ana_i2c_master_burst_rf_onoff(false); void *link = NULL; for (int i = ARRAY_SIZE(phy_modem_config) - 1; (err == ESP_OK) && (i >= 0); i--) { @@ -114,9 +118,9 @@ esp_err_t sleep_phy_link_init(void **link_context) if (err == ESP_OK) { pau_regdma_set_modem_link_addr(link); - const int id_array[] = { REGDMA_PHY_LINK(0x00), REGDMA_PHY_LINK(0x1a), /* I2C MST CLK entries */ - REGDMA_PHY_LINK(0x0f), REGDMA_PHY_LINK(0x1b), REGDMA_PHY_LINK(0x1c), REGDMA_PHY_LINK(0x1d), - REGDMA_PHY_LINK(0x1e), REGDMA_PHY_LINK(0x1f), REGDMA_PHY_LINK(0x20), REGDMA_PHY_LINK(0x21) /* WiFi Related entries */ + const int id_array[] = { REGDMA_PHY_LINK(0x00), REGDMA_PHY_LINK(0x1c), /* I2C MST CLK entries */ + REGDMA_PHY_LINK(0x11), REGDMA_PHY_LINK(0x1d), REGDMA_PHY_LINK(0x1e), REGDMA_PHY_LINK(0x1f), + REGDMA_PHY_LINK(0x20), REGDMA_PHY_LINK(0x21), REGDMA_PHY_LINK(0x22), REGDMA_PHY_LINK(0x23) /* WiFi Related entries */ }; static DRAM_ATTR sleep_phy_link_context_t phy_link_context; diff --git a/components/esp_phy/esp32s31/phy_init_data.c b/components/esp_phy/esp32s31/phy_init_data.c index 9312f501a9a..cc21fb626a4 100644 --- a/components/esp_phy/esp32s31/phy_init_data.c +++ b/components/esp_phy/esp32s31/phy_init_data.c @@ -149,12 +149,15 @@ const esp_phy_init_data_t phy_init_data= { { const char __attribute__((section(".rodata"))) phy_init_magic_post[] = PHY_INIT_MAGIC; -#if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD +#if SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF) #include "esp_private/sleep_retention.h" static const char* TAG = "phy_sleep"; +#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF) + +#if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD static esp_err_t sleep_retention_wifi_bb_init(void *arg) { #define N_REGS_WIFI_AGC() (130) diff --git a/components/soc/esp32c5/include/soc/retention_periph_defs.h b/components/soc/esp32c5/include/soc/retention_periph_defs.h index 4cd0ac7e680..70b88570a1c 100644 --- a/components/soc/esp32c5/include/soc/retention_periph_defs.h +++ b/components/soc/esp32c5/include/soc/retention_periph_defs.h @@ -55,7 +55,7 @@ typedef enum periph_retention_module { SLEEP_RETENTION_MODULE_BT_BB = 29, SLEEP_RETENTION_MODULE_802154_MAC = 30, SLEEP_RETENTION_MODULE_MODEM_PHY = 31, - SLEEP_RETENTION_MODULE_PHY_FE = 32, + SLEEP_RETENTION_MODULE_PHY_FE = 32, SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1 } periph_retention_module_t; diff --git a/components/soc/esp32c6/include/soc/retention_periph_defs.h b/components/soc/esp32c6/include/soc/retention_periph_defs.h index a09272f7338..134d3500cec 100644 --- a/components/soc/esp32c6/include/soc/retention_periph_defs.h +++ b/components/soc/esp32c6/include/soc/retention_periph_defs.h @@ -54,7 +54,7 @@ typedef enum periph_retention_module { SLEEP_RETENTION_MODULE_BLE_MAC = 28, SLEEP_RETENTION_MODULE_BT_BB = 29, SLEEP_RETENTION_MODULE_802154_MAC = 30, - SLEEP_RETENTION_MODULE_PHY_FE = 31, + SLEEP_RETENTION_MODULE_PHY_FE = 31, SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1 } periph_retention_module_t; diff --git a/components/soc/esp32c61/include/soc/retention_periph_defs.h b/components/soc/esp32c61/include/soc/retention_periph_defs.h index 8b0aa683b02..24b0883b775 100644 --- a/components/soc/esp32c61/include/soc/retention_periph_defs.h +++ b/components/soc/esp32c61/include/soc/retention_periph_defs.h @@ -47,7 +47,7 @@ typedef enum periph_retention_module { SLEEP_RETENTION_MODULE_BLE_MAC = 28, SLEEP_RETENTION_MODULE_BT_BB = 29, SLEEP_RETENTION_MODULE_802154_MAC = 30, - SLEEP_RETENTION_MODULE_PHY_FE = 31, + SLEEP_RETENTION_MODULE_PHY_FE = 31, SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1 } periph_retention_module_t; diff --git a/components/soc/esp32s31/include/soc/retention_periph_defs.h b/components/soc/esp32s31/include/soc/retention_periph_defs.h index 1f18489dd3e..3dbc6a61039 100644 --- a/components/soc/esp32s31/include/soc/retention_periph_defs.h +++ b/components/soc/esp32s31/include/soc/retention_periph_defs.h @@ -78,6 +78,7 @@ typedef enum periph_retention_module { SLEEP_RETENTION_MODULE_802154_MAC = 50, SLEEP_RETENTION_MODULE_CLOCK_MODEM = 51, SLEEP_RETENTION_MODULE_MODEM_PHY = 52, + SLEEP_RETENTION_MODULE_PHY_FE = 53, SLEEP_RETENTION_MODULE_ASRC = 53, From 55b00bb1e45b89c9ed1c0a33455228b6888338bb Mon Sep 17 00:00:00 2001 From: zhuanghang Date: Thu, 26 Mar 2026 14:50:53 +0800 Subject: [PATCH 10/13] feat(802.15.4): enable switch rf with regdma for 15.4 --- .../ieee802154/driver/esp_ieee802154_dev.c | 24 ++++++++++++++++--- 1 file changed, 21 insertions(+), 3 deletions(-) diff --git a/components/ieee802154/driver/esp_ieee802154_dev.c b/components/ieee802154/driver/esp_ieee802154_dev.c index 9e2cca3098b..16cdd05de3c 100644 --- a/components/ieee802154/driver/esp_ieee802154_dev.c +++ b/components/ieee802154/driver/esp_ieee802154_dev.c @@ -35,13 +35,15 @@ #include "esp_pm.h" #include "esp_private/esp_clk.h" #include "esp_private/sleep_retention.h" -#include "esp_private/sleep_modem.h" #if SOC_PM_RETENTION_HAS_CLOCK_BUG #define IEEE802154_LINK_OWNER ENTRY(3) #else #define IEEE802154_LINK_OWNER ENTRY(0) | ENTRY(2) #endif // SOC_PM_RETENTION_HAS_CLOCK_BUG #endif // CONFIG_PM_ENABLE +#if CONFIG_PM_ENABLE || SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY +#include "esp_private/sleep_modem.h" +#endif // CONFIG_PM_ENABLE || SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY static bool s_rf_closed = true; #define CCA_DETECTION_TIME 8 @@ -935,17 +937,31 @@ esp_err_t ieee802154_mac_init(void) ret = esp_intr_alloc(ieee802154_periph.irq_id, 0, ieee802154_isr, NULL, &s_ieee802154_isr_handle); ESP_RETURN_ON_FALSE(ret == ESP_OK, ESP_FAIL, IEEE802154_TAG, "IEEE802154 MAC init failed"); - ESP_RETURN_ON_FALSE(ieee802154_sleep_init() == ESP_OK, ESP_FAIL, IEEE802154_TAG, "IEEE802154 MAC sleep init failed"); + ret = ieee802154_sleep_init(); + if (unlikely(ret != ESP_OK)) { + ESP_LOGE(IEEE802154_TAG, "%s(%d): IEEE802154 MAC sleep init failed", __FUNCTION__, __LINE__); + if (esp_intr_free(s_ieee802154_isr_handle) != ESP_OK) { + ESP_LOGE(IEEE802154_TAG, "%s(%d): IEEE802154 MAC ISR deinit failed", __FUNCTION__, __LINE__); + } + s_ieee802154_isr_handle = NULL; + return ret; + } #if CONFIG_ESP_COEX_EXTERNAL_COEXIST_ENABLE esp_coex_ieee802154_force_rx_enable(true); #endif +#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY + esp_phy_modem_init(SLEEP_MODEM_IEEE802154); +#endif return ret; } esp_err_t ieee802154_mac_deinit(void) { +#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY + esp_phy_modem_deinit(SLEEP_MODEM_IEEE802154); +#endif esp_err_t ret = ESP_OK; #if CONFIG_ESP_COEX_EXTERNAL_COEXIST_ENABLE esp_coex_ieee802154_force_rx_enable(false); @@ -953,7 +969,9 @@ esp_err_t ieee802154_mac_deinit(void) if (s_ieee802154_isr_handle) { ret = esp_intr_free(s_ieee802154_isr_handle); s_ieee802154_isr_handle = NULL; - ESP_RETURN_ON_FALSE(ret == ESP_OK, ESP_FAIL, IEEE802154_TAG, "IEEE802154 MAC ISR deinit failed"); + if (unlikely(ret != ESP_OK)) { + ESP_LOGE(IEEE802154_TAG, "%s(%d): IEEE802154 MAC ISR deinit failed", __FUNCTION__, __LINE__); + } } ESP_RETURN_ON_FALSE(ieee802154_sleep_deinit() == ESP_OK, ESP_FAIL, IEEE802154_TAG, "IEEE802154 MAC sleep deinit failed"); return ret; From c2a1465dc2445ecaa1cca334cb2bacb856d26a69 Mon Sep 17 00:00:00 2001 From: cjin Date: Wed, 29 Jul 2026 09:58:26 +0800 Subject: [PATCH 11/13] fix(sleep): fix reject trigger when wifi is enabled --- components/esp_hw_support/sleep_modem.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/esp_hw_support/sleep_modem.c b/components/esp_hw_support/sleep_modem.c index 86851e09f65..f7c19fac44d 100644 --- a/components/esp_hw_support/sleep_modem.c +++ b/components/esp_hw_support/sleep_modem.c @@ -258,7 +258,7 @@ uint32_t sleep_modem_reject_triggers(void) { uint32_t reject_triggers = 0; #if SOC_PM_SUPPORT_PMU_MODEM_STATE - reject_triggers = (s_sleep_modem.phy_link != NULL) ? PMU_MODEM_WAKEUP_PROTECT : 0; + reject_triggers = sleep_modem_wifi_modem_state_is_enabled() ? PMU_MODEM_WAKEUP_PROTECT : 0; #endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE */ return reject_triggers; } From aebcc6842dbad66dec9887102a3798e293d2fdb9 Mon Sep 17 00:00:00 2001 From: cjin Date: Wed, 29 Jul 2026 09:59:38 +0800 Subject: [PATCH 12/13] fix(phy): add fe dependency when enable rf with regdma --- components/esp_phy/esp32c5/phy_init_data.c | 63 +++++++++++++------- components/esp_phy/esp32c6/phy_init_data.c | 50 +++++++++++----- components/esp_phy/esp32c61/phy_init_data.c | 60 ++++++++++++------- components/esp_phy/esp32s31/phy_init_data.c | 53 ++++++++++------ components/esp_phy/include/esp_private/phy.h | 7 +-- components/esp_phy/src/btbb_init.c | 19 +++++- 6 files changed, 173 insertions(+), 79 deletions(-) diff --git a/components/esp_phy/esp32c5/phy_init_data.c b/components/esp_phy/esp32c5/phy_init_data.c index 844bc85e3fb..836eb5b715d 100644 --- a/components/esp_phy/esp32c5/phy_init_data.c +++ b/components/esp_phy/esp32c5/phy_init_data.c @@ -276,13 +276,16 @@ const esp_phy_init_data_t phy_init_data= { { } }; const char __attribute__((section(".rodata"))) phy_init_magic_post[] = PHY_INIT_MAGIC; +#if SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF) +#include "esp_private/sleep_retention.h" +uint8_t s_phy_fe_retention_ref = 0; +static _lock_t s_phy_fe_retention_lock; +static const char* TAG = "phy_sleep"; + +#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF) #if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD -#include "esp_private/sleep_retention.h" - -static const char* TAG = "phy_sleep"; - static esp_err_t sleep_retention_wifi_bb_init(void *arg) { #define N_REGS_WIFI_AGC() (130) @@ -353,18 +356,19 @@ void esp_phy_sleep_data_deinit(void) ESP_LOGW(TAG, "WiFi BB sleep retention deinit failed"); } } +#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD +#if SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF) static esp_err_t sleep_retention_phy_fe_init(void *arg) { - #define N_REGS_FE_COEX() (21) - #define N_REGS_FE_DATA() (35) - #define N_REGS_FE_CTRL() (56) - #define N_REGS_FE_DATA_WIFI() (22) + #define N_REGS_FE_COEX() (21) + #define N_REGS_FE_DATA() (35) + #define N_REGS_FE_CTRL() (56) + #define N_REGS_FE_DATA_WIFI() (22) #define REG_FECOEX_BASE 0x600a0000 #define REG_FEDATA_BASE 0x600a0400 #define REG_FECTRL_BASE 0x600a0800 #define REG_FEDATAWIFI_BASE 0x600a0c00 - const static sleep_retention_entries_config_t phy_fe_regs_retention[] = { [0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_FE_LINK(0), REG_FECOEX_BASE, REG_FECOEX_BASE, N_REGS_FE_COEX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE COEX */ [1] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_FE_LINK(1), REG_FEDATA_BASE, REG_FEDATA_BASE, N_REGS_FE_DATA(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE DATA */ @@ -377,25 +381,40 @@ static esp_err_t sleep_retention_phy_fe_init(void *arg) return ESP_OK; } -void esp_phy_fe_sleep_data_init(void) +esp_err_t esp_phy_fe_sleep_data_init(void) { - sleep_retention_module_init_param_t init_param = { - .cbs = { .create = { .handle = sleep_retention_phy_fe_init, .arg = NULL } }, - .attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE | SLEEP_RETENTION_MODULE_ATTR_ATTACH - }; - esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_PHY_FE, &init_param); - if (err != ESP_OK) { - ESP_LOGW(TAG, "PHY FE sleep retention init failed"); - return; + _lock_acquire(&s_phy_fe_retention_lock); + if (s_phy_fe_retention_ref++ == 0) { + sleep_retention_module_init_param_t init_param = { + .cbs = { .create = { .handle = sleep_retention_phy_fe_init, .arg = NULL } }, + .attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE | SLEEP_RETENTION_MODULE_ATTR_ATTACH + }; + esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_PHY_FE, &init_param); + if (err != ESP_OK) { + ESP_LOGW(TAG, "PHY FE sleep retention init failed"); + s_phy_fe_retention_ref --; + _lock_release(&s_phy_fe_retention_lock); + return err; + } } + _lock_release(&s_phy_fe_retention_lock); + return ESP_OK; } void esp_phy_fe_sleep_data_deinit(void) { - esp_err_t err = sleep_retention_module_deinit(SLEEP_RETENTION_MODULE_PHY_FE); - if (err != ESP_OK) { - ESP_LOGW(TAG, "PHY FE sleep retention deinit failed"); + _lock_acquire(&s_phy_fe_retention_lock); + if (s_phy_fe_retention_ref == 0) { + _lock_release(&s_phy_fe_retention_lock); return; } + + if (--s_phy_fe_retention_ref == 0) { + esp_err_t err = sleep_retention_module_deinit(SLEEP_RETENTION_MODULE_PHY_FE); + if (err != ESP_OK) { + ESP_LOGW(TAG, "PHY FE sleep retention deinit failed"); + } + } + _lock_release(&s_phy_fe_retention_lock); } -#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD +#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF) diff --git a/components/esp_phy/esp32c6/phy_init_data.c b/components/esp_phy/esp32c6/phy_init_data.c index f7a82173b29..383d82a19eb 100644 --- a/components/esp_phy/esp32c6/phy_init_data.c +++ b/components/esp_phy/esp32c6/phy_init_data.c @@ -148,12 +148,15 @@ const esp_phy_init_data_t phy_init_data= { { const char __attribute__((section(".rodata"))) phy_init_magic_post[] = PHY_INIT_MAGIC; -#if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD - +#if SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF) #include "esp_private/sleep_retention.h" static const char* TAG = "phy_sleep"; +static _lock_t s_phy_fe_retention_lock; +uint8_t s_phy_fe_retention_ref = 0; +#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF) +#if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD static esp_err_t sleep_retention_wifi_bb_init(void *arg) { #define N_REGS_WIFI_AGC() (121) @@ -223,7 +226,9 @@ void esp_phy_sleep_data_deinit(void) ESP_LOGW(TAG, "WiFi BB sleep retention deinit failed"); } } +#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD +#if SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF) static esp_err_t sleep_retention_phy_fe_init(void *arg) { #define N_REGS_FE_COEX() (58) @@ -238,25 +243,40 @@ static esp_err_t sleep_retention_phy_fe_init(void *arg) return ESP_OK; } -void esp_phy_fe_sleep_data_init(void) +esp_err_t esp_phy_fe_sleep_data_init(void) { - sleep_retention_module_init_param_t init_param = { - .cbs = { .create = { .handle = sleep_retention_phy_fe_init, .arg = NULL } }, - .attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE | SLEEP_RETENTION_MODULE_ATTR_ATTACH - }; - esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_PHY_FE, &init_param); - if (err != ESP_OK) { - ESP_LOGW(TAG, "PHY FE sleep retention init failed"); - return; + _lock_acquire(&s_phy_fe_retention_lock); + if (s_phy_fe_retention_ref++ == 0) { + sleep_retention_module_init_param_t init_param = { + .cbs = { .create = { .handle = sleep_retention_phy_fe_init, .arg = NULL } }, + .attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE | SLEEP_RETENTION_MODULE_ATTR_ATTACH + }; + esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_PHY_FE, &init_param); + if (err != ESP_OK) { + ESP_LOGW(TAG, "PHY FE sleep retention init failed"); + s_phy_fe_retention_ref --; + _lock_release(&s_phy_fe_retention_lock); + return err; + } } + _lock_release(&s_phy_fe_retention_lock); + return ESP_OK; } void esp_phy_fe_sleep_data_deinit(void) { - esp_err_t err = sleep_retention_module_deinit(SLEEP_RETENTION_MODULE_PHY_FE); - if (err != ESP_OK) { - ESP_LOGW(TAG, "PHY FE sleep retention deinit failed"); + _lock_acquire(&s_phy_fe_retention_lock); + if (s_phy_fe_retention_ref == 0) { + _lock_release(&s_phy_fe_retention_lock); return; } + + if (--s_phy_fe_retention_ref == 0) { + esp_err_t err = sleep_retention_module_deinit(SLEEP_RETENTION_MODULE_PHY_FE); + if (err != ESP_OK) { + ESP_LOGW(TAG, "PHY FE sleep retention deinit failed"); + } + } + _lock_release(&s_phy_fe_retention_lock); } -#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD +#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF) diff --git a/components/esp_phy/esp32c61/phy_init_data.c b/components/esp_phy/esp32c61/phy_init_data.c index e653e2ebf58..e491a4f0a62 100644 --- a/components/esp_phy/esp32c61/phy_init_data.c +++ b/components/esp_phy/esp32c61/phy_init_data.c @@ -148,13 +148,15 @@ const esp_phy_init_data_t phy_init_data= { { } }; const char __attribute__((section(".rodata"))) phy_init_magic_post[] = PHY_INIT_MAGIC; - -#if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD - +#if SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF) #include "esp_private/sleep_retention.h" static const char* TAG = "phy_sleep"; +static _lock_t s_phy_fe_retention_lock; +uint8_t s_phy_fe_retention_ref = 0; +#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF) +#if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD static esp_err_t sleep_retention_wifi_bb_init(void *arg) { #define N_REGS_WIFI_AGC() (130) @@ -226,12 +228,15 @@ void esp_phy_sleep_data_deinit(void) } } +#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD. + +#if SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF) static esp_err_t sleep_retention_phy_fe_init(void *arg) { - #define N_REGS_FE_COEX() (21) - #define N_REGS_FE_DATA() (34) - #define N_REGS_FE_CTRL() (56) - #define N_REGS_FE_DATA_WIFI() (21) + #define N_REGS_FE_COEX() (21) + #define N_REGS_FE_DATA() (34) + #define N_REGS_FE_CTRL() (56) + #define N_REGS_FE_DATA_WIFI() (21) #define REG_FECOEX_BASE 0x600a0000 #define REG_FEDATA_BASE 0x600a0400 #define REG_FECTRL_BASE 0x600a0800 @@ -249,25 +254,40 @@ static esp_err_t sleep_retention_phy_fe_init(void *arg) return ESP_OK; } -void esp_phy_fe_sleep_data_init(void) +esp_err_t esp_phy_fe_sleep_data_init(void) { - sleep_retention_module_init_param_t init_param = { - .cbs = { .create = { .handle = sleep_retention_phy_fe_init, .arg = NULL } }, - .attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE | SLEEP_RETENTION_MODULE_ATTR_ATTACH - }; - esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_PHY_FE, &init_param); - if (err != ESP_OK) { - ESP_LOGW(TAG, "PHY FE sleep retention init failed"); - return; + _lock_acquire(&s_phy_fe_retention_lock); + if (s_phy_fe_retention_ref++ == 0) { + sleep_retention_module_init_param_t init_param = { + .cbs = { .create = { .handle = sleep_retention_phy_fe_init, .arg = NULL } }, + .attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE | SLEEP_RETENTION_MODULE_ATTR_ATTACH + }; + esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_PHY_FE, &init_param); + if (err != ESP_OK) { + ESP_LOGW(TAG, "PHY FE sleep retention init failed"); + s_phy_fe_retention_ref --; + _lock_release(&s_phy_fe_retention_lock); + return err; + } } + _lock_release(&s_phy_fe_retention_lock); + return ESP_OK; } void esp_phy_fe_sleep_data_deinit(void) { - esp_err_t err = sleep_retention_module_deinit(SLEEP_RETENTION_MODULE_PHY_FE); - if (err != ESP_OK) { - ESP_LOGW(TAG, "PHY FE sleep retention deinit failed"); + _lock_acquire(&s_phy_fe_retention_lock); + if (s_phy_fe_retention_ref == 0) { + _lock_release(&s_phy_fe_retention_lock); return; } + + if (--s_phy_fe_retention_ref == 0) { + esp_err_t err = sleep_retention_module_deinit(SLEEP_RETENTION_MODULE_PHY_FE); + if (err != ESP_OK) { + ESP_LOGW(TAG, "PHY FE sleep retention deinit failed"); + } + } + _lock_release(&s_phy_fe_retention_lock); } -#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD +#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF) diff --git a/components/esp_phy/esp32s31/phy_init_data.c b/components/esp_phy/esp32s31/phy_init_data.c index cc21fb626a4..5f83a25756c 100644 --- a/components/esp_phy/esp32s31/phy_init_data.c +++ b/components/esp_phy/esp32s31/phy_init_data.c @@ -154,6 +154,8 @@ const char __attribute__((section(".rodata"))) phy_init_magic_post[] = PHY_INIT_ #include "esp_private/sleep_retention.h" static const char* TAG = "phy_sleep"; +static _lock_t s_phy_fe_retention_lock; +uint8_t s_phy_fe_retention_ref = 0; #endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF) @@ -240,13 +242,15 @@ void esp_phy_sleep_data_deinit(void) ESP_LOGW(TAG, "WiFi BB sleep retention deinit failed"); } } +#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD +#if SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF) static esp_err_t sleep_retention_phy_fe_init(void *arg) { - #define N_REGS_FE_COEX() (22) - #define N_REGS_FE_DATA() (35) - #define N_REGS_FE_CTRL() (57) - #define N_REGS_FE_DATA_WIFI() (22) + #define N_REGS_FE_COEX() (22) + #define N_REGS_FE_DATA() (35) + #define N_REGS_FE_CTRL() (57) + #define N_REGS_FE_DATA_WIFI() (22) #define REG_FECOEX_BASE 0x20100000 #define REG_FEDATA_BASE 0x20100400 #define REG_FECTRL_BASE 0x20100800 @@ -264,25 +268,40 @@ static esp_err_t sleep_retention_phy_fe_init(void *arg) return ESP_OK; } -void esp_phy_fe_sleep_data_init(void) +esp_err_t esp_phy_fe_sleep_data_init(void) { - sleep_retention_module_init_param_t init_param = { - .cbs = { .create = { .handle = sleep_retention_phy_fe_init, .arg = NULL } }, - .attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE | SLEEP_RETENTION_MODULE_ATTR_ATTACH - }; - esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_PHY_FE, &init_param); - if (err != ESP_OK) { - ESP_LOGW(TAG, "PHY FE sleep retention init failed"); - return; + _lock_acquire(&s_phy_fe_retention_lock); + if (s_phy_fe_retention_ref++ == 0) { + sleep_retention_module_init_param_t init_param = { + .cbs = { .create = { .handle = sleep_retention_phy_fe_init, .arg = NULL } }, + .attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE | SLEEP_RETENTION_MODULE_ATTR_ATTACH + }; + esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_PHY_FE, &init_param); + if (err != ESP_OK) { + ESP_LOGW(TAG, "PHY FE sleep retention init failed"); + s_phy_fe_retention_ref --; + _lock_release(&s_phy_fe_retention_lock); + return err; + } } + _lock_release(&s_phy_fe_retention_lock); + return ESP_OK; } void esp_phy_fe_sleep_data_deinit(void) { - esp_err_t err = sleep_retention_module_deinit(SLEEP_RETENTION_MODULE_PHY_FE); - if (err != ESP_OK) { - ESP_LOGW(TAG, "PHY FE sleep retention deinit failed"); + _lock_acquire(&s_phy_fe_retention_lock); + if (s_phy_fe_retention_ref == 0) { + _lock_release(&s_phy_fe_retention_lock); return; } + + if (--s_phy_fe_retention_ref == 0) { + esp_err_t err = sleep_retention_module_deinit(SLEEP_RETENTION_MODULE_PHY_FE); + if (err != ESP_OK) { + ESP_LOGW(TAG, "PHY FE sleep retention deinit failed"); + } + } + _lock_release(&s_phy_fe_retention_lock); } -#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD +#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF) diff --git a/components/esp_phy/include/esp_private/phy.h b/components/esp_phy/include/esp_private/phy.h index ca003827b6e..21d4374fb35 100644 --- a/components/esp_phy/include/esp_private/phy.h +++ b/components/esp_phy/include/esp_private/phy.h @@ -300,20 +300,19 @@ void phy_wait_freq_hw_hop_done(void); */ void phy_track_temp_debug(uint8_t debug_flag, uint8_t track_temp); #endif -#if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD +#if SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF) /** * @brief PHY module common memory (FE) initialize * */ -void esp_phy_fe_sleep_data_init(void); +esp_err_t esp_phy_fe_sleep_data_init(void); /** * @brief PHY module common memory (FE) de-initialize * */ void esp_phy_fe_sleep_data_deinit(void); -#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD - +#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF) #ifdef __cplusplus } #endif diff --git a/components/esp_phy/src/btbb_init.c b/components/esp_phy/src/btbb_init.c index 3b89879538c..a0199764577 100644 --- a/components/esp_phy/src/btbb_init.c +++ b/components/esp_phy/src/btbb_init.c @@ -71,6 +71,9 @@ static esp_err_t btbb_sleep_retention_enable(void) .attribute = SLEEP_RETENTION_MODULE_ATTR_ATTACH, }; init_param.depends.bitmap[SLEEP_RETENTION_MODULE_CLOCK_MODEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM % 32); +#if CONFIG_ESP_PHY_HW_SWITCH_RF + init_param.depends.bitmap[SLEEP_RETENTION_MODULE_PHY_FE >> 5] |= BIT(SLEEP_RETENTION_MODULE_PHY_FE % 32); +#endif // CONFIG_ESP_PHY_HW_SWITCH_RF #if SOC_PM_MODEM_LOCK_CLK_WORKAROUND && CONFIG_BT_CTRL_SLEEP_ENABLE init_param.depends.bitmap[SLEEP_RETENTION_MODULE_POWER >> 5] |= BIT(SLEEP_RETENTION_MODULE_POWER % 32); #endif @@ -98,9 +101,20 @@ void esp_btbb_enable(void) if (s_btbb_access_ref == 0) { bt_bb_v2_init_cmplx(BTBB_ENABLE_VERSION_PRINT); #if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE - esp_err_t err = btbb_sleep_retention_enable(); + esp_err_t err = ESP_OK; +#if CONFIG_ESP_PHY_HW_SWITCH_RF + err = esp_phy_fe_sleep_data_init(); + if (err != ESP_OK) { + _lock_release(&s_btbb_access_lock); + return; + } +#endif // CONFIG_ESP_PHY_HW_SWITCH_RF + err = btbb_sleep_retention_enable(); if (err != ESP_OK) { btbb_sleep_retention_disable(); +#if CONFIG_ESP_PHY_HW_SWITCH_RF + esp_phy_fe_sleep_data_deinit(); +#endif // CONFIG_ESP_PHY_HW_SWITCH_RF _lock_release(&s_btbb_access_lock); return; } @@ -116,6 +130,9 @@ void esp_btbb_disable(void) if (s_btbb_access_ref && (--s_btbb_access_ref == 0)) { #if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE btbb_sleep_retention_disable(); +#if CONFIG_ESP_PHY_HW_SWITCH_RF + esp_phy_fe_sleep_data_deinit(); +#endif // CONFIG_ESP_PHY_HW_SWITCH_RF #endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE } _lock_release(&s_btbb_access_lock); From df470e9dee13f14dfab46d1638a14141ae73e046 Mon Sep 17 00:00:00 2001 From: cjin Date: Fri, 14 Aug 2026 11:35:42 +0800 Subject: [PATCH 13/13] feat(sleep): applied regi2c conflict process at regdma rf --- .../include/esp_private/esp_pau.h | 19 ++++++ components/esp_hw_support/port/pau_regdma.c | 60 ++++++++++++++++++- components/esp_phy/src/phy_init.c | 29 ++++++++- .../esp32c5/include/soc/Kconfig.soc_caps.in | 4 ++ components/soc/esp32c5/include/soc/soc_caps.h | 1 + .../esp32c6/include/soc/Kconfig.soc_caps.in | 4 ++ components/soc/esp32c6/include/soc/soc_caps.h | 1 + .../esp32c61/include/soc/Kconfig.soc_caps.in | 4 ++ .../soc/esp32c61/include/soc/soc_caps.h | 1 + .../esp32s31/include/soc/Kconfig.soc_caps.in | 4 ++ .../soc/esp32s31/include/soc/soc_caps.h | 1 + 11 files changed, 124 insertions(+), 4 deletions(-) diff --git a/components/esp_hw_support/include/esp_private/esp_pau.h b/components/esp_hw_support/include/esp_private/esp_pau.h index 562201060a4..2a4e8a78bcf 100644 --- a/components/esp_hw_support/include/esp_private/esp_pau.h +++ b/components/esp_hw_support/include/esp_private/esp_pau.h @@ -138,6 +138,25 @@ void pau_regdma_trigger_extra_link_restore(void); bool pau_regdma_enable_aon_link_entry(bool enable); #endif +#if SOC_PM_REGDMA_MODEM_LINK_PROTECT +/** + * @brief Callback function type for modem link protect. + * + */ +typedef void (* pau_regdma_modem_link_protect_cb_t)(bool protect); + +/** + * @brief Register the modem link trigger hook callback function + * @param cb the callback function + */ +void pau_regdma_register_modem_link_protect(pau_regdma_modem_link_protect_cb_t cb); + +/** + * @brief Unregister the modem link trigger hook callback function + */ +void pau_regdma_unregister_modem_link_protect(void); +#endif // SOC_PM_REGDMA_MODEM_LINK_PROTECT + #ifdef __cplusplus } #endif diff --git a/components/esp_hw_support/port/pau_regdma.c b/components/esp_hw_support/port/pau_regdma.c index ea9b0ef398b..a64c43c80e0 100644 --- a/components/esp_hw_support/port/pau_regdma.c +++ b/components/esp_hw_support/port/pau_regdma.c @@ -27,12 +27,19 @@ ESP_LOG_ATTR_TAG(TAG, "pau_regdma"); typedef struct { pau_hal_context_t *hal; +#if SOC_PM_REGDMA_MODEM_LINK_PROTECT + pau_regdma_modem_link_protect_cb_t modem_link_protect; +#endif // SOC_PM_REGDMA_MODEM_LINK_PROTECT } pau_context_t; pau_context_t * __attribute__((weak)) IRAM_ATTR PAU_instance(void) { static pau_hal_context_t pau_hal = { .dev = NULL }; - static pau_context_t pau_context = { .hal = &pau_hal }; + static pau_context_t pau_context = { .hal = &pau_hal, +#if SOC_PM_REGDMA_MODEM_LINK_PROTECT + .modem_link_protect = NULL, +#endif // SOC_PM_REGDMA_MODEM_LINK_PROTECT + }; /* periph_module_enable don not need to be put in iram because it is * called before the flash is powered off and will not be called again. */ @@ -61,6 +68,25 @@ void pau_regdma_set_entry_link_addr(pau_regdma_link_addr_t *link_entries) pau_hal_set_regdma_entry_link_addr(PAU_instance()->hal, link_entries); } +#if SOC_PM_REGDMA_MODEM_LINK_PROTECT +void pau_regdma_register_modem_link_protect(pau_regdma_modem_link_protect_cb_t cb) +{ + PAU_instance()->modem_link_protect = cb; +} + +void pau_regdma_unregister_modem_link_protect(void) +{ + PAU_instance()->modem_link_protect = NULL; +} + +static void IRAM_ATTR pau_regdma_invoke_modem_link_procect(bool protect) +{ + if (PAU_instance()->modem_link_protect) { + PAU_instance()->modem_link_protect(protect); + } +} +#endif // SOC_PM_REGDMA_MODEM_LINK_PROTECT + #if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY #if SOC_PM_PAU_REGDMA_LINK_MODEM void pau_regdma_set_modem_link_addr(void *link_addr) @@ -71,18 +97,30 @@ void pau_regdma_set_modem_link_addr(void *link_addr) void IRAM_ATTR pau_regdma_trigger_modem_link_backup(bool blocking) { +#if SOC_PM_REGDMA_MODEM_LINK_PROTECT + pau_regdma_invoke_modem_link_procect(true); +#endif // SOC_PM_REGDMA_MODEM_LINK_PROTECT pau_hal_start_regdma_modem_link(PAU_instance()->hal, true, blocking); if (blocking) { pau_hal_stop_regdma_modem_link(PAU_instance()->hal); } +#if SOC_PM_REGDMA_MODEM_LINK_PROTECT + pau_regdma_invoke_modem_link_procect(false); +#endif // SOC_PM_REGDMA_MODEM_LINK_PROTECT } void IRAM_ATTR pau_regdma_trigger_modem_link_restore(bool blocking) { +#if SOC_PM_REGDMA_MODEM_LINK_PROTECT + pau_regdma_invoke_modem_link_procect(true); +#endif // SOC_PM_REGDMA_MODEM_LINK_PROTECT pau_hal_start_regdma_modem_link(PAU_instance()->hal, false, blocking); if (blocking) { pau_hal_stop_regdma_modem_link(PAU_instance()->hal); } +#if SOC_PM_REGDMA_MODEM_LINK_PROTECT + pau_regdma_invoke_modem_link_procect(false); +#endif // SOC_PM_REGDMA_MODEM_LINK_PROTECT } void IRAM_ATTR pau_regdma_modem_link_complete(void) @@ -113,14 +151,30 @@ void IRAM_ATTR pau_clear_regdma_done_status(void) #if SOC_PM_PAU_REGDMA_MODEM_WIFIMAC_WORKAROUND void IRAM_ATTR pau_regdma_trigger_wifimac_link_backup(bool blocking) { +#if SOC_PM_REGDMA_MODEM_LINK_PROTECT + pau_regdma_invoke_modem_link_procect(true); +#endif // SOC_PM_REGDMA_MODEM_LINK_PROTECT pau_hal_start_regdma_wifimac_link(PAU_instance()->hal, true, blocking); - pau_hal_stop_regdma_wifimac_link(PAU_instance()->hal); + if (blocking) { + pau_hal_stop_regdma_wifimac_link(PAU_instance()->hal); + } +#if SOC_PM_REGDMA_MODEM_LINK_PROTECT + pau_regdma_invoke_modem_link_procect(false); +#endif // SOC_PM_REGDMA_MODEM_LINK_PROTECT } void IRAM_ATTR pau_regdma_trigger_wifimac_link_restore(bool blocking) { +#if SOC_PM_REGDMA_MODEM_LINK_PROTECT + pau_regdma_invoke_modem_link_procect(true); +#endif // SOC_PM_REGDMA_MODEM_LINK_PROTECT pau_hal_start_regdma_wifimac_link(PAU_instance()->hal, false, blocking); - pau_hal_stop_regdma_wifimac_link(PAU_instance()->hal); + if (blocking) { + pau_hal_stop_regdma_wifimac_link(PAU_instance()->hal); + } +#if SOC_PM_REGDMA_MODEM_LINK_PROTECT + pau_regdma_invoke_modem_link_procect(false); +#endif // SOC_PM_REGDMA_MODEM_LINK_PROTECT } #endif #endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY */ diff --git a/components/esp_phy/src/phy_init.c b/components/esp_phy/src/phy_init.c index afc9a4a48e7..7f63b8efba0 100644 --- a/components/esp_phy/src/phy_init.c +++ b/components/esp_phy/src/phy_init.c @@ -55,6 +55,9 @@ #include "soc/periph_defs.h" #endif #include "phy_init_deps.h" +#if SOC_PM_REGDMA_MODEM_LINK_PROTECT +#include "esp_private/esp_pau.h" +#endif // SOC_PM_REGDMA_MODEM_LINK_PROTECT #ifndef PHY_INIT_MODEM_CLOCK_REQUIRED_BITS #warning "PHY_INIT_MODEM_CLOCK_REQUIRED_BITS not defined; using default value 0" @@ -73,6 +76,11 @@ extern bool pm_get_wifimac_regdma_link_selection(void); #endif #endif +#if SOC_PM_REGDMA_MODEM_LINK_PROTECT +extern void phy_i2c_enter_critical(void); +extern void phy_i2c_exit_critical(void); +#endif // SOC_PM_REGDMA_MODEM_LINK_PROTECT + static const char* TAG = "phy_init"; static _lock_t s_phy_access_lock; @@ -511,6 +519,17 @@ void esp_wifi_bt_power_domain_off(void) #endif // SOC_PM_SUPPORT_MODEM_PD || SOC_PM_SUPPORT_WIFI_PD } +#if SOC_PM_REGDMA_MODEM_LINK_PROTECT +void IRAM_ATTR esp_phy_regi2c_lock_apply(bool enable) +{ + if (enable) { + phy_i2c_enter_critical(); + } else { + phy_i2c_exit_critical(); + } +} +#endif // SOC_PM_REGDMA_MODEM_LINK_PROTECT + void esp_phy_modem_init(uint8_t modem) { #if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA || CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP || CONFIG_ESP_PHY_HW_SWITCH_RF @@ -522,6 +541,9 @@ void esp_phy_modem_init(uint8_t modem) } #endif // SOC_PM_MODEM_RETENTION_BY_BACKUPDMA #if (SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP) || CONFIG_ESP_PHY_HW_SWITCH_RF +#if SOC_PM_REGDMA_MODEM_LINK_PROTECT + pau_regdma_register_modem_link_protect(esp_phy_regi2c_lock_apply); +#endif // SOC_PM_REGDMA_MODEM_LINK_PROTECT if (sleep_modem_phy_init(modem) != ESP_OK) { ESP_LOGE(TAG, "failed to initialize sleep modem phy"); } @@ -552,9 +574,14 @@ void esp_phy_modem_deinit(uint8_t modem) phy_init_flag(); #endif // CONFIG_IDF_TARGET_ESP32C3 #endif // SOC_PM_MODEM_RETENTION_BY_BACKUPDMA - } #if (SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP) || CONFIG_ESP_PHY_HW_SWITCH_RF +#if SOC_PM_REGDMA_MODEM_LINK_PROTECT + pau_regdma_unregister_modem_link_protect(); +#endif // SOC_PM_REGDMA_MODEM_LINK_PROTECT + } sleep_modem_phy_deinit(modem); +#else + } #endif // (SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP) || CONFIG_ESP_PHY_HW_SWITCH_RF _lock_release(&s_phy_access_lock); #endif // SOC_PM_MODEM_RETENTION_BY_BACKUPDMA || CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP diff --git a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in index f9273da7cd7..3207ce1ef4e 100644 --- a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in @@ -1415,6 +1415,10 @@ config SOC_PM_SUPPORT_PMU_MODEM_STATE bool default y +config SOC_PM_REGDMA_MODEM_LINK_PROTECT + bool + default y + config SOC_PM_SUPPORT_PMU_CLK_ICG bool default y diff --git a/components/soc/esp32c5/include/soc/soc_caps.h b/components/soc/esp32c5/include/soc/soc_caps.h index 3d6d7a109f3..50307da67ca 100644 --- a/components/soc/esp32c5/include/soc/soc_caps.h +++ b/components/soc/esp32c5/include/soc/soc_caps.h @@ -574,6 +574,7 @@ #define SOC_PM_SUPPORT_PMU_MODEM_STATE (1) /* macro redefine for pass esp_wifi headers md5sum check */ #define MAC_SUPPORT_PMU_MODEM_STATE SOC_PM_SUPPORT_PMU_MODEM_STATE +#define SOC_PM_REGDMA_MODEM_LINK_PROTECT (1) #define SOC_PM_SUPPORT_PMU_CLK_ICG (1) #define SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG (1) diff --git a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in index 95bee1b8424..b1fc40a3996 100644 --- a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in @@ -1151,6 +1151,10 @@ config SOC_PM_SUPPORT_PMU_MODEM_STATE bool default y +config SOC_PM_REGDMA_MODEM_LINK_PROTECT + bool + default y + config SOC_PM_SUPPORT_PMU_CLK_ICG bool default y diff --git a/components/soc/esp32c6/include/soc/soc_caps.h b/components/soc/esp32c6/include/soc/soc_caps.h index 19ff88bbc20..9e14ad1cd28 100644 --- a/components/soc/esp32c6/include/soc/soc_caps.h +++ b/components/soc/esp32c6/include/soc/soc_caps.h @@ -473,6 +473,7 @@ #define SOC_PM_SUPPORT_PMU_MODEM_STATE (1) /* macro redefine for pass esp_wifi headers md5sum check */ #define MAC_SUPPORT_PMU_MODEM_STATE SOC_PM_SUPPORT_PMU_MODEM_STATE +#define SOC_PM_REGDMA_MODEM_LINK_PROTECT (1) #define SOC_PM_SUPPORT_PMU_CLK_ICG (1) #define SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG (1) diff --git a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in index ffb508da939..baaf8e78cbd 100644 --- a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in @@ -1067,6 +1067,10 @@ config SOC_PM_SUPPORT_PMU_MODEM_STATE bool default y +config SOC_PM_REGDMA_MODEM_LINK_PROTECT + bool + default y + config SOC_PM_SUPPORT_PMU_CLK_ICG bool default y diff --git a/components/soc/esp32c61/include/soc/soc_caps.h b/components/soc/esp32c61/include/soc/soc_caps.h index c63c5f90f8f..4607c4dcf59 100644 --- a/components/soc/esp32c61/include/soc/soc_caps.h +++ b/components/soc/esp32c61/include/soc/soc_caps.h @@ -441,6 +441,7 @@ #define SOC_PM_SUPPORT_PMU_MODEM_STATE (1) /* macro redefine for pass esp_wifi headers md5sum check */ #define MAC_SUPPORT_PMU_MODEM_STATE SOC_PM_SUPPORT_PMU_MODEM_STATE +#define SOC_PM_REGDMA_MODEM_LINK_PROTECT (1) #define SOC_PM_SUPPORT_PMU_CLK_ICG (1) #define SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG (1) diff --git a/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in index 611ab36dc28..44b9a4f405c 100644 --- a/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in @@ -1595,6 +1595,10 @@ config SOC_PM_SUPPORT_PMU_MODEM_STATE bool default y +config SOC_PM_REGDMA_MODEM_LINK_PROTECT + bool + default y + config SOC_PM_MODEM_STATE_USE_XTAL bool default y diff --git a/components/soc/esp32s31/include/soc/soc_caps.h b/components/soc/esp32s31/include/soc/soc_caps.h index b12766971b9..f006a11feaf 100644 --- a/components/soc/esp32s31/include/soc/soc_caps.h +++ b/components/soc/esp32s31/include/soc/soc_caps.h @@ -590,6 +590,7 @@ #define SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY (1) #define SOC_PM_SUPPORT_PMU_MODEM_STATE (1) #define MAC_SUPPORT_PMU_MODEM_STATE SOC_PM_SUPPORT_PMU_MODEM_STATE +#define SOC_PM_REGDMA_MODEM_LINK_PROTECT (1) /* Since SOC APB and MODEM APB on ESP32-S31 are decoupled, XTAL can be used as SOC clock in modem state */ #define SOC_PM_MODEM_STATE_USE_XTAL (1)