feat(mspi): add clear log in psram mspi intr isr for addr misaligned error

This commit is contained in:
Song Ruo Jing
2026-02-26 16:38:06 +08:00
parent 67290da88f
commit 29d62fa6ae
6 changed files with 12 additions and 2 deletions
@@ -38,6 +38,7 @@ extern "C" {
#define PSRAM_CTRLR_LL_PMS_ATTR_READABLE (1<<1)
#define PSRAM_CTRLR_LL_PMS_INT_SUPPORTED 1
#define PSRAM_CTRLR_LL_ADDR_INT_SUPPORTED 1
#define PSRAM_CTRLR_LL_EVENT_SLV_ST_END (1<<3)
#define PSRAM_CTRLR_LL_EVENT_MST_ST_END (1<<4)
#define PSRAM_CTRLR_LL_EVENT_ECC_ERR (1<<5)