Files
esp-idf/components/efuse/esp32h21/esp_efuse_table.csv
2026-05-21 16:29:09 +03:00

21 KiB

1# field_name, | efuse_block, | bit_start, | bit_count, |comment #
2# | (EFUSE_BLK0 | (0..255) | (1-256) | #
3# | EFUSE_BLK1 | | | #
4# | ...) | | | #
5##########################################################################
6# !!!!!!!!!!! #
7# this will generate new source files, next rebuild all the sources.
8# !!!!!!!!!!! #
9# This file was generated by regtools.py based on the efuses.yaml file with the version: fdae7598a57fba48c608b1747e3d3d65
10WR_DIS, EFUSE_BLK0, 0, 32, [] Disable programming of individual eFuses
11WR_DIS.RD_DIS, EFUSE_BLK0, 0, 1, [] wr_dis of RD_DIS
12WR_DIS.PVT_GLITCH_EN, EFUSE_BLK0, 2, 1, [] wr_dis of PVT_GLITCH_EN
13WR_DIS.DIS_ICACHE, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_ICACHE
14WR_DIS.DIS_USB_JTAG, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_USB_JTAG
15WR_DIS.POWERGLITCH_EN, EFUSE_BLK0, 2, 1, [] wr_dis of POWERGLITCH_EN
16WR_DIS.DIS_FORCE_DOWNLOAD, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_FORCE_DOWNLOAD
17WR_DIS.SPI_DOWNLOAD_MSPI_DIS, EFUSE_BLK0, 2, 1, [] wr_dis of SPI_DOWNLOAD_MSPI_DIS
18WR_DIS.DIS_TWAI, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_TWAI
19WR_DIS.JTAG_SEL_ENABLE, EFUSE_BLK0, 2, 1, [] wr_dis of JTAG_SEL_ENABLE
20WR_DIS.DIS_PAD_JTAG, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_PAD_JTAG
21WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT
22WR_DIS.POWERGLITCH_EN1, EFUSE_BLK0, 2, 1, [] wr_dis of POWERGLITCH_EN1
23WR_DIS.WDT_DELAY_SEL, EFUSE_BLK0, 3, 1, [] wr_dis of WDT_DELAY_SEL
24WR_DIS.SPI_BOOT_CRYPT_CNT, EFUSE_BLK0, 4, 1, [] wr_dis of SPI_BOOT_CRYPT_CNT
25WR_DIS.SECURE_BOOT_KEY_REVOKE0, EFUSE_BLK0, 5, 1, [] wr_dis of SECURE_BOOT_KEY_REVOKE0
26WR_DIS.SECURE_BOOT_KEY_REVOKE1, EFUSE_BLK0, 6, 1, [] wr_dis of SECURE_BOOT_KEY_REVOKE1
27WR_DIS.SECURE_BOOT_KEY_REVOKE2, EFUSE_BLK0, 7, 1, [] wr_dis of SECURE_BOOT_KEY_REVOKE2
28WR_DIS.KEY_PURPOSE_0, EFUSE_BLK0, 8, 1, [WR_DIS.KEY0_PURPOSE] wr_dis of KEY_PURPOSE_0
29WR_DIS.KEY_PURPOSE_1, EFUSE_BLK0, 9, 1, [WR_DIS.KEY1_PURPOSE] wr_dis of KEY_PURPOSE_1
30WR_DIS.KEY_PURPOSE_2, EFUSE_BLK0, 10, 1, [WR_DIS.KEY2_PURPOSE] wr_dis of KEY_PURPOSE_2
31WR_DIS.KEY_PURPOSE_3, EFUSE_BLK0, 11, 1, [WR_DIS.KEY3_PURPOSE] wr_dis of KEY_PURPOSE_3
32WR_DIS.KEY_PURPOSE_4, EFUSE_BLK0, 12, 1, [WR_DIS.KEY4_PURPOSE] wr_dis of KEY_PURPOSE_4
33WR_DIS.KEY_PURPOSE_5, EFUSE_BLK0, 13, 1, [WR_DIS.KEY5_PURPOSE] wr_dis of KEY_PURPOSE_5
34WR_DIS.XTS_DPA_PSEUDO_LEVEL, EFUSE_BLK0, 14, 1, [] wr_dis of XTS_DPA_PSEUDO_LEVEL
35WR_DIS.SEC_DPA_LEVEL, EFUSE_BLK0, 14, 1, [] wr_dis of SEC_DPA_LEVEL
36WR_DIS.CRYPT_DPA_ENABLE, EFUSE_BLK0, 14, 1, [] wr_dis of CRYPT_DPA_ENABLE
37WR_DIS.SECURE_BOOT_EN, EFUSE_BLK0, 15, 1, [] wr_dis of SECURE_BOOT_EN
38WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE, EFUSE_BLK0, 16, 1, [] wr_dis of SECURE_BOOT_AGGRESSIVE_REVOKE
39WR_DIS.ECDSA_CURVE_MODE, EFUSE_BLK0, 17, 1, [] wr_dis of ECDSA_CURVE_MODE
40WR_DIS.ECC_FORCE_CONST_TIME, EFUSE_BLK0, 17, 1, [] wr_dis of ECC_FORCE_CONST_TIME
41WR_DIS.FLASH_TPUW, EFUSE_BLK0, 18, 1, [] wr_dis of FLASH_TPUW
42WR_DIS.DIS_DOWNLOAD_MODE, EFUSE_BLK0, 18, 1, [] wr_dis of DIS_DOWNLOAD_MODE
43WR_DIS.DIS_DIRECT_BOOT, EFUSE_BLK0, 18, 1, [] wr_dis of DIS_DIRECT_BOOT
44WR_DIS.DIS_USB_SERIAL_JTAG_ROM_PRINT, EFUSE_BLK0, 18, 1, [] wr_dis of DIS_USB_SERIAL_JTAG_ROM_PRINT
45WR_DIS.DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE, EFUSE_BLK0, 18, 1, [] wr_dis of DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE
46WR_DIS.ENABLE_SECURITY_DOWNLOAD, EFUSE_BLK0, 18, 1, [] wr_dis of ENABLE_SECURITY_DOWNLOAD
47WR_DIS.UART_PRINT_CONTROL, EFUSE_BLK0, 18, 1, [] wr_dis of UART_PRINT_CONTROL
48WR_DIS.FORCE_SEND_RESUME, EFUSE_BLK0, 18, 1, [] wr_dis of FORCE_SEND_RESUME
49WR_DIS.SECURE_VERSION, EFUSE_BLK0, 18, 1, [] wr_dis of SECURE_VERSION
50WR_DIS.SECURE_BOOT_DISABLE_FAST_WAKE, EFUSE_BLK0, 18, 1, [] wr_dis of SECURE_BOOT_DISABLE_FAST_WAKE
51WR_DIS.HYS_EN_PAD0, EFUSE_BLK0, 19, 1, [] wr_dis of HYS_EN_PAD0
52WR_DIS.HYS_EN_PAD1, EFUSE_BLK0, 19, 1, [] wr_dis of HYS_EN_PAD1
53WR_DIS.BLK1, EFUSE_BLK0, 20, 1, [] wr_dis of BLOCK1
54WR_DIS.MAC, EFUSE_BLK0, 20, 1, [WR_DIS.MAC_FACTORY] wr_dis of MAC
55WR_DIS.MAC_EXT, EFUSE_BLK0, 20, 1, [] wr_dis of MAC_EXT
56WR_DIS.PVT_CELL_SELECT, EFUSE_BLK0, 20, 1, [] wr_dis of PVT_CELL_SELECT
57WR_DIS.BLK_VERSION_MINOR, EFUSE_BLK0, 20, 1, [] wr_dis of BLK_VERSION_MINOR
58WR_DIS.BLK_VERSION_MAJOR, EFUSE_BLK0, 20, 1, [] wr_dis of BLK_VERSION_MAJOR
59WR_DIS.DISABLE_BLK_VERSION_MAJOR, EFUSE_BLK0, 20, 1, [] wr_dis of DISABLE_BLK_VERSION_MAJOR
60WR_DIS.FLASH_CAP, EFUSE_BLK0, 20, 1, [] wr_dis of FLASH_CAP
61WR_DIS.FLASH_VENDOR, EFUSE_BLK0, 20, 1, [] wr_dis of FLASH_VENDOR
62WR_DIS.TEMP, EFUSE_BLK0, 20, 1, [] wr_dis of TEMP
63WR_DIS.PVT_LIMIT, EFUSE_BLK0, 20, 1, [] wr_dis of PVT_LIMIT
64WR_DIS.PVT_GLITCH_CHARGE_RESET, EFUSE_BLK0, 20, 1, [] wr_dis of PVT_GLITCH_CHARGE_RESET
65WR_DIS.PVT_GLITCH_MODE, EFUSE_BLK0, 20, 1, [] wr_dis of PVT_GLITCH_MODE
66WR_DIS.PVT_PUMP_LIMIT, EFUSE_BLK0, 20, 1, [] wr_dis of PVT_PUMP_LIMIT
67WR_DIS.PUMP_DRV, EFUSE_BLK0, 20, 1, [] wr_dis of PUMP_DRV
68WR_DIS.WAFER_VERSION_MINOR, EFUSE_BLK0, 20, 1, [] wr_dis of WAFER_VERSION_MINOR
69WR_DIS.WAFER_VERSION_MAJOR, EFUSE_BLK0, 20, 1, [] wr_dis of WAFER_VERSION_MAJOR
70WR_DIS.DISABLE_WAFER_VERSION_MAJOR, EFUSE_BLK0, 20, 1, [] wr_dis of DISABLE_WAFER_VERSION_MAJOR
71WR_DIS.PKG_VERSION, EFUSE_BLK0, 20, 1, [] wr_dis of PKG_VERSION
72WR_DIS.SYS_DATA_PART1, EFUSE_BLK0, 21, 1, [] wr_dis of BLOCK2
73WR_DIS.OPTIONAL_UNIQUE_ID, EFUSE_BLK0, 21, 1, [] wr_dis of OPTIONAL_UNIQUE_ID
74WR_DIS.BLOCK_USR_DATA, EFUSE_BLK0, 22, 1, [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA
75WR_DIS.CUSTOM_MAC, EFUSE_BLK0, 22, 1, [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC
76WR_DIS.BLOCK_KEY0, EFUSE_BLK0, 23, 1, [WR_DIS.KEY0] wr_dis of BLOCK_KEY0
77WR_DIS.BLOCK_KEY1, EFUSE_BLK0, 24, 1, [WR_DIS.KEY1] wr_dis of BLOCK_KEY1
78WR_DIS.BLOCK_KEY2, EFUSE_BLK0, 25, 1, [WR_DIS.KEY2] wr_dis of BLOCK_KEY2
79WR_DIS.BLOCK_KEY3, EFUSE_BLK0, 26, 1, [WR_DIS.KEY3] wr_dis of BLOCK_KEY3
80WR_DIS.BLOCK_KEY4, EFUSE_BLK0, 27, 1, [WR_DIS.KEY4] wr_dis of BLOCK_KEY4
81WR_DIS.BLOCK_KEY5, EFUSE_BLK0, 28, 1, [WR_DIS.KEY5] wr_dis of BLOCK_KEY5
82WR_DIS.BLOCK_SYS_DATA2, EFUSE_BLK0, 29, 1, [WR_DIS.SYS_DATA_PART2] wr_dis of BLOCK_SYS_DATA2
83WR_DIS.USB_EXCHG_PINS, EFUSE_BLK0, 30, 1, [] wr_dis of USB_EXCHG_PINS
84WR_DIS.VDD_SPI_AS_GPIO, EFUSE_BLK0, 30, 1, [] wr_dis of VDD_SPI_AS_GPIO
85WR_DIS.SOFT_DIS_JTAG, EFUSE_BLK0, 31, 1, [] wr_dis of SOFT_DIS_JTAG
86RD_DIS, EFUSE_BLK0, 32, 7, [] Disable reading from BlOCK4-10
87RD_DIS.BLOCK_KEY0, EFUSE_BLK0, 32, 1, [RD_DIS.KEY0] rd_dis of BLOCK_KEY0
88RD_DIS.BLOCK_KEY1, EFUSE_BLK0, 33, 1, [RD_DIS.KEY1] rd_dis of BLOCK_KEY1
89RD_DIS.BLOCK_KEY2, EFUSE_BLK0, 34, 1, [RD_DIS.KEY2] rd_dis of BLOCK_KEY2
90RD_DIS.BLOCK_KEY3, EFUSE_BLK0, 35, 1, [RD_DIS.KEY3] rd_dis of BLOCK_KEY3
91RD_DIS.BLOCK_KEY4, EFUSE_BLK0, 36, 1, [RD_DIS.KEY4] rd_dis of BLOCK_KEY4
92RD_DIS.BLOCK_KEY5, EFUSE_BLK0, 37, 1, [RD_DIS.KEY5] rd_dis of BLOCK_KEY5
93RD_DIS.BLOCK_SYS_DATA2, EFUSE_BLK0, 38, 1, [RD_DIS.SYS_DATA_PART2] rd_dis of BLOCK_SYS_DATA2
94PVT_GLITCH_EN, EFUSE_BLK0, 39, 1, [] Represents whether to enable PVT power glitch monitor function.1: Enable. 0: Disable
95DIS_ICACHE, EFUSE_BLK0, 40, 1, [] Represents whether icache is disabled or enabled. 1: Disabled 0: Enabled
96DIS_USB_JTAG, EFUSE_BLK0, 41, 1, [] Represents whether the USB-to-JTAG function in USB Serial/JTAG is disabled. 1: Disabled 0: Enabled
97POWERGLITCH_EN, EFUSE_BLK0, 42, 1, [] Represents whether to enable power glitch function.
98DIS_FORCE_DOWNLOAD, EFUSE_BLK0, 44, 1, [] Represents whether the function that forces chip into Download mode is disabled. 1: Disabled 0: Enabled
99SPI_DOWNLOAD_MSPI_DIS, EFUSE_BLK0, 45, 1, [] Represents accessing MSPI flash/MSPI RAM by SYS AXI matrix is disabled during boot_mode_download. 1: Disabled 0: Enabled
100DIS_TWAI, EFUSE_BLK0, 46, 1, [] Represents whether TWAI function is disabled. 1: Disabled 0: Enabled
101JTAG_SEL_ENABLE, EFUSE_BLK0, 47, 1, [] Represents whether the selection of a JTAG signal source through the strapping pin value is enabled when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are configured to 0. For more information; please refer to Chapter Placeholder. 1: Enabled 0: Disabled
102SOFT_DIS_JTAG, EFUSE_BLK0, 48, 3, [] Represents whether PAD JTAG is disabled in the soft way. It can be restarted via HMAC. Odd count of bits with a value of 1: Disabled Even count of bits with a value of 1: Enabled
103DIS_PAD_JTAG, EFUSE_BLK0, 51, 1, [] Represents whether PAD JTAG is disabled in the hard way (permanently). 1: Disabled 0: Enabled
104DIS_DOWNLOAD_MANUAL_ENCRYPT, EFUSE_BLK0, 52, 1, [] Represents whether flash encryption is disabled (except in SPI boot mode). 1: Disabled 0: Enabled
105USB_EXCHG_PINS, EFUSE_BLK0, 57, 1, [] Represents whether the D+ and D- pins is exchanged. 1: Exchanged 0: Not exchanged
106VDD_SPI_AS_GPIO, EFUSE_BLK0, 58, 1, [] Represents whether vdd spi pin is functioned as gpio. 1: Functioned 0: Not functioned
107ECDSA_CURVE_MODE, EFUSE_BLK0, 59, 2, [] Represents the configuration of the curve of ECDSA calculation. 0: Only enable P256 1: Only enable P192 2: Both enable P256 and P192 3: Only enable P256
108ECC_FORCE_CONST_TIME, EFUSE_BLK0, 61, 1, [] Represents whether to permanently turn on ECC const-time mode. 0: Disabled 1: Enabled
109XTS_DPA_PSEUDO_LEVEL, EFUSE_BLK0, 62, 2, [] Represents control method of xts pseudo-round anti-dpa attack function. 0: Controlled by register 1-3: The higher the value is; the more pseudo-rounds are inserted to the xts-aes calculation.
110IO_LDO_ADJUST, EFUSE_BLK0, 64, 8, [] Represents configuration of IO LDO mode and voltage.
111VDD_SPI_LDO_ADJUST, EFUSE_BLK0, 72, 8, [] Represents configuration of FLASH LDO mode and voltage.
112WDT_DELAY_SEL, EFUSE_BLK0, 80, 2, [] Represents RTC watchdog timeout threshold. 0: The originally configured STG0 threshold x 2 1: The originally configured STG0 threshold x 4 2: The originally configured STG0 threshold x 8 3: The originally configured STG0 threshold x 16
113SECURE_BOOT_KEY_REVOKE0, EFUSE_BLK0, 85, 1, [] Revoke 1st secure boot key
114SECURE_BOOT_KEY_REVOKE1, EFUSE_BLK0, 86, 1, [] Revoke 2nd secure boot key
115SECURE_BOOT_KEY_REVOKE2, EFUSE_BLK0, 87, 1, [] Revoke 3rd secure boot key
116KEY_PURPOSE_0, EFUSE_BLK0, 88, 4, [KEY0_PURPOSE] Represents the purpose of Key0. See Table tab:efuse-key-purpose.
117KEY_PURPOSE_1, EFUSE_BLK0, 92, 4, [KEY1_PURPOSE] Represents the purpose of Key1. See Table tab:efuse-key-purpose.
118KEY_PURPOSE_2, EFUSE_BLK0, 96, 4, [KEY2_PURPOSE] Represents the purpose of Key2. See Table tab:efuse-key-purpose.
119KEY_PURPOSE_3, EFUSE_BLK0, 100, 4, [KEY3_PURPOSE] Represents the purpose of Key3. See Table tab:efuse-key-purpose.
120KEY_PURPOSE_4, EFUSE_BLK0, 104, 4, [KEY4_PURPOSE] Represents the purpose of Key4. See Table tab:efuse-key-purpose.
121KEY_PURPOSE_5, EFUSE_BLK0, 108, 4, [KEY5_PURPOSE] Represents the purpose of Key5. See Table tab:efuse-key-purpose.
122SEC_DPA_LEVEL, EFUSE_BLK0, 112, 2, [] Represents the security level of anti-DPA attack. The level is adjusted by configuring the clock random frequency division mode. 0: Security level is SEC_DPA_OFF 1: Security level is SEC_DPA_LOW 2: Security level is SEC_DPA_MIDDLE 3: Security level is SEC_DPA_HIGH For more information; please refer to Chapter mod:sysreg > Section sec:sysreg-anti-dpa-attack-security-control.
123IO_LDO_1P8, EFUSE_BLK0, 114, 1, [] Represents select IO LDO voltage to 1.8V or 3.3V. 1: 1.8V 0: 3.3V
124CRYPT_DPA_ENABLE, EFUSE_BLK0, 115, 1, [] Represents whether defense against DPA attack is enabled. 1: Enabled 0: Disabled
125SECURE_BOOT_EN, EFUSE_BLK0, 116, 1, [] Represents whether Secure Boot is enabled. 1: Enabled 0: Disabled
126SECURE_BOOT_AGGRESSIVE_REVOKE, EFUSE_BLK0, 117, 1, [] Represents whether aggressive revocation of Secure Boot is enabled. 1: Enabled 0: Disabled
127POWERGLITCH_EN1, EFUSE_BLK0, 118, 5, [] Represents whether to enable power glitch function when chip power on.
128DCDC_CCM_EN, EFUSE_BLK0, 123, 1, [] Represents whether change DCDC to CCM mode
129FLASH_TPUW, EFUSE_BLK0, 124, 4, [] Represents the flash waiting time after power-up. Measurement unit: ms. When the value is less than 15; the waiting time is the programmed value. Otherwise; the waiting time is a fixed value; i.e. 30 ms.
130DIS_DOWNLOAD_MODE, EFUSE_BLK0, 128, 1, [] Represents whether all download modes are disabled. 1: Disabled 0: Enabled
131DIS_DIRECT_BOOT, EFUSE_BLK0, 129, 1, [] Represents whether direct boot mode is disabled. 1: Disabled 0: Enabled
132DIS_USB_SERIAL_JTAG_ROM_PRINT, EFUSE_BLK0, 130, 1, [] Represents whether print from USB-Serial-JTAG during ROM boot is disabled. 1: Disabled 0: Enabled
133FLASH_LDO_EFUSE_SEL, EFUSE_BLK0, 131, 1, [] Represents whether to select efuse control flash ldo default voltage. 1: efuse0: strapping
134DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE, EFUSE_BLK0, 132, 1, [] Represents whether the USB-Serial-JTAG download function is disabled. 1: Disabled 0: Enabled
135ENABLE_SECURITY_DOWNLOAD, EFUSE_BLK0, 133, 1, [] Represents whether security download is enabled. Only UART is supported for download. Reading/writing RAM or registers is not supported (i.e. Stub download is not supported). 1: Enabled 0: Disabled
136FORCE_SEND_RESUME, EFUSE_BLK0, 136, 1, [] Represents whether ROM code is forced to send a resume command during SPI boot. 1: Forced 0: Not forced
137SECURE_VERSION, EFUSE_BLK0, 137, 16, [] Represents the security version used by ESP-IDF anti-rollback feature.
138SECURE_BOOT_DISABLE_FAST_WAKE, EFUSE_BLK0, 153, 1, [] Represents whether FAST VERIFY ON WAKE is disabled when Secure Boot is enabled. 1: Disabled 0: Enabled
139HYS_EN_PAD0, EFUSE_BLK0, 154, 6, [] Represents whether to enable the hysteresis function of pad 0-5. 0: Disabled 1: Enabled
140HYS_EN_PAD1, EFUSE_BLK0, 160, 22, [] Represents whether to enable the hysteresis function of pad 6-27. 0: Disabled 1: Enabled
141FLASH_LDO_POWER_SEL, EFUSE_BLK0, 182, 1, [] Represents which flash LDO is selected. 0: FLASH LDO 1P8. 1: FLASH LDO 1P2.
142MAC, EFUSE_BLK1, 40, 8, [MAC_FACTORY] MAC address
143, EFUSE_BLK1, 32, 8, [MAC_FACTORY] MAC address
144, EFUSE_BLK1, 24, 8, [MAC_FACTORY] MAC address
145, EFUSE_BLK1, 16, 8, [MAC_FACTORY] MAC address
146, EFUSE_BLK1, 8, 8, [MAC_FACTORY] MAC address
147, EFUSE_BLK1, 0, 8, [MAC_FACTORY] MAC address
148MAC_EXT, EFUSE_BLK1, 48, 16, [] Represents the extended bits of MAC address
149PVT_CELL_SELECT, EFUSE_BLK1, 100, 7, [] Represents the selection of Power glitch monitor PVT cell.
150BLK_VERSION_MINOR, EFUSE_BLK1, 114, 3, [] Minor version of BLOCK2
151BLK_VERSION_MAJOR, EFUSE_BLK1, 117, 2, [] Major version of BLOCK2
152DISABLE_BLK_VERSION_MAJOR, EFUSE_BLK1, 119, 1, [] Disables check of blk version major
153FLASH_CAP, EFUSE_BLK1, 120, 3, [] Mark the capacity of in-package Flash
154FLASH_VENDOR, EFUSE_BLK1, 123, 3, [] Mark the vendor of in-package Flash
155TEMP, EFUSE_BLK1, 126, 2, [] Mark the specified maximum ambient temperature that ESP Chip can work properly
156PVT_LIMIT, EFUSE_BLK1, 133, 16, [] Represents the threshold of power glitch monitor.
157PVT_GLITCH_CHARGE_RESET, EFUSE_BLK1, 149, 1, [] Represents whether to trigger reset or charge pump when PVT power glitch happened. 1:Trigger charge pump. 0:Trigger reset
158PVT_GLITCH_MODE, EFUSE_BLK1, 150, 2, [] Represents the configuration of glitch mode.
159PVT_PUMP_LIMIT, EFUSE_BLK1, 152, 8, [] Represents the configuration voltage monitor limit for charge pump.
160PUMP_DRV, EFUSE_BLK1, 160, 4, [] Use to configure charge pump voltage gain.
161WAFER_VERSION_MINOR, EFUSE_BLK1, 164, 4, [] Minor chip version
162WAFER_VERSION_MAJOR, EFUSE_BLK1, 168, 2, [] Major chip version
163DISABLE_WAFER_VERSION_MAJOR, EFUSE_BLK1, 170, 1, [] Disables check of wafer version major
164PKG_VERSION, EFUSE_BLK1, 171, 3, [] Package version
165OPTIONAL_UNIQUE_ID, EFUSE_BLK2, 0, 128, [] Optional unique 128-bit ID
166USER_DATA, EFUSE_BLK3, 0, 256, [BLOCK_USR_DATA] User data
167USER_DATA.MAC_CUSTOM, EFUSE_BLK3, 200, 48, [MAC_CUSTOM CUSTOM_MAC] Custom MAC
168KEY0, EFUSE_BLK4, 0, 256, [BLOCK_KEY0] Key0 or user data
169KEY1, EFUSE_BLK5, 0, 256, [BLOCK_KEY1] Key1 or user data
170KEY2, EFUSE_BLK6, 0, 256, [BLOCK_KEY2] Key2 or user data
171KEY3, EFUSE_BLK7, 0, 256, [BLOCK_KEY3] Key3 or user data
172KEY4, EFUSE_BLK8, 0, 256, [BLOCK_KEY4] Key4 or user data
173KEY5, EFUSE_BLK9, 0, 256, [BLOCK_KEY5] Key5 or user data
174SYS_DATA_PART2, EFUSE_BLK10, 0, 256, [BLOCK_SYS_DATA2] System data part 2 (reserved)