Harshal Patil 938833c3b8 fix(esp_psram): clear the PSRAM ECC configuration when ECC is disabled ...

An ECC-enabled image sets the ECC attribute on MSPI PMS PSRAM region 0,
and that register survives a digital core reset (USB Serial/JTAG reset,
software reset). An ECC-disabled image never wrote it, so the controller
kept enforcing the 16 byte ECC access rules while the software reported
an MSPI alignment of 1. Program the ECC state on every boot instead.

2026-09-28 12:08:21 +05:30

..

include/esp_private

esp_psram: Downgrade "not found" to a warning if "ignore not found" set.

2026-06-10 15:15:47 +08:00

CMakeLists.txt

feat(psram): support psram device driver

2026-03-31 13:56:43 +08:00

esp_psram_impl_ap_hex.c

fix(esp_psram): clear the PSRAM ECC configuration when ECC is disabled

2026-09-28 12:08:21 +05:30

esp_psram_impl_ap_oct.c

fix(esp_psram): clear the PSRAM ECC configuration when ECC is disabled

2026-09-28 12:08:21 +05:30

esp_psram_impl_ap_quad.c

fix(esp_psram): clear the PSRAM ECC configuration when ECC is disabled

2026-09-28 12:08:21 +05:30

esp_quad_psram_defs_ap.h

fix(psram): fixed psram cross page issue

2025-08-21 09:57:07 +08:00