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40 lines
2.3 KiB
Markdown
40 lines
2.3 KiB
Markdown
# ESP Hardware Abstraction Layer for Cache and MMU
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> [!NOTE]
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> This component is currently in beta. Its API, behavior, and compatibility may change at any time and without notice; backward compatibility is not guaranteed. Use caution when integrating into production systems.
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## Overview
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The `esp_hal_cache` component provides a **Hardware Abstraction Layer** for the cache and the external-memory MMU across all ESP-IDF supported targets. It serves as a foundation for higher-level drivers (DMA drivers, `esp_mm`, `spi_flash`, etc.) by offering a consistent interface to cache maintenance and external-memory address translation, while hiding the complexities of chip-specific implementations.
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## Architecture
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The HAL architecture consists of two primary layers:
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1. **HAL Layer (Upper)**: Defines the operational sequences and data structures required to interact with the cache and MMU, including:
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- Cache initialization, enabling and disabling
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- Cache maintenance operations (writeback, invalidate, writeback + invalidate, sync)
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- Cache freezing and preloading on supported chips
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- MMU mapping operations (virtual-to-physical address translation for flash and PSRAM)
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2. **Low-Level Layer (Bottom)**: Acts as a translation layer between the HAL and the register definitions in the `soc` component, handling:
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- Register access abstractions (`<target>/include/hal/cache_ll.h` and `<target>/include/hal/mmu_ll.h`)
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- Chip-specific register configurations
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- Hardware feature compatibility
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Implementation notes:
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- `cache_hal.c` implements the target-independent HAL sequences; ESP32 uses its dedicated ROM-compatible implementation (`esp32/cache_hal_esp32.c`).
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- `<target>/cache_periph.c` contains target-specific cache peripheral data.
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## Usage
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This component is primarily used by ESP-IDF drivers and system components such as `esp_driver_dma`, `esp_mm`, `esp_mspi`, `spi_flash` and `esp_psram`, as well as by the bootloader.
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For advanced developers implementing custom DMA or memory-management solutions, the HAL functions can be used directly. However, please note that the interfaces provided by this component are internal to ESP-IDF and are subject to change.
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## Dependencies
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- `soc`: Provides cache and MMU register definitions and SoC capabilities
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- `hal`: Core hardware abstraction utilities and macros
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