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Author SHA1 Message Date
Jiang Jiang Jian
f409428bf3 Merge branch 'bugfix/esp32c5_encrypted_flash_write_v6.0' into 'release/v6.0' 
fix(spi_flash): Add CPU frequency switching during flash encrypted write (v6.0)

See merge request espressif/esp-idf!44304
 2025-12-21 15:28:33 +08:00
Jiang Jiang Jian
8c379b517f Merge branch 'feature/update-openocd-to-v0.12.0-esp32-20251215_v6.0' into 'release/v6.0' 
feat(tools): update openocd version to v0.12.0-esp32-20251215 (v6.0)

See merge request espressif/esp-idf!44310
 2025-12-21 15:27:47 +08:00
Jiang Jiang Jian
0997c899d8 Merge branch 'contrib/github_pr_17945_v6.0' into 'release/v6.0' 
fix(usb_serial_jtag_driver): tx_ring_buf not checked for successful allocation (backport v6.0)

See merge request espressif/esp-idf!44283
 2025-12-21 15:26:08 +08:00
Jiang Jiang Jian
ac1e81f980 Merge branch 'fix/esp32p4_eco5_multicore_wfi_autoclock_gating_v6.0' into 'release/v6.0' 
fix(esp_hw_support): enable core1 auto clock gating for esp32p4 rev3+ multicore (v6.0)

See merge request espressif/esp-idf!44255
 2025-12-21 15:22:15 +08:00
Jiang Jiang Jian
b6661b0775 Merge branch 'feat/usb_host_docs_suspend_resume_backport_v6.0' into 'release/v6.0' 
feat(usb_host): Add documentation about usb host suspend, resume backport v6.0

See merge request espressif/esp-idf!44242
 2025-12-21 15:21:05 +08:00
Jiang Jiang Jian
ff9d18afea Merge branch 'fix/p4_fixed_mdc_config_v6.0' into 'release/v6.0' 
fix(esp_eth): fixed ESP32P4 CSR clock range used to determine MDC (v6.0)

See merge request espressif/esp-idf!44224
 2025-12-21 15:19:34 +08:00
Jiang Jiang Jian
4ccd8f99b6 Merge branch 'fix/ot_used_wrong_nvs_open_api_v6.0' into 'release/v6.0' 
fix(openthread): open nvs from the configured partition (v6.0)

See merge request espressif/esp-idf!44026
 2025-12-21 15:14:42 +08:00
Jiang Jiang Jian
64c7148839 Merge branch 'fix/fix_bootloader_skip_validate_in_deep_sleep_v6.0' into 'release/v6.0' 
fix(bootloader): fix signature verification skip in deep sleep scenarios (v6.0)

See merge request espressif/esp-idf!43695
 2025-12-21 14:57:08 +08:00
Jiang Jiang Jian
bef4d8c5ae Merge branch 'feature/support_7.6.1_pvt_auto_dbias_v6.0' into 'release/v6.0' 
feat(esp32c6): auto adjust LDO voltage using pvt function (v6.0)

See merge request espressif/esp-idf!44103
 2025-12-21 14:55:30 +08:00
Jiang Jiang Jian
ef33092a29 Merge branch 'feat/esp_hal_rmt_v6.0' into 'release/v6.0' 
feat(hal): graudate the RMT hal driver into a new component (v6.0)

See merge request espressif/esp-idf!44036
 2025-12-21 14:53:50 +08:00
Jiang Jiang Jian
5d313adde5 Merge branch 'contrib/github_pr_17831_backport_v6.0' into 'release/v6.0' 
fix(hal): correct PHY selection logic in usb_wrap_ll.h (backport v6.0)

See merge request espressif/esp-idf!43305
 2025-12-21 14:51:47 +08:00
Jiang Jiang Jian
dcd23a436c Merge branch 'bugfix/fix_esp32_coex_cache_disable_crash_v6.0' into 'release/v6.0' 
fix(coex): fix esp32 coex crash issue v6.0

See merge request espressif/esp-idf!44286
 2025-12-19 19:10:56 +08:00
Island
25814db7b1 Merge branch 'bugfix/fix_bt_4205_v6.0' into 'release/v6.0' 
Fixed BLE assert lld_con.c 1479 on ESP32-C3 and ESP32-S3(5106725) (v6.0)

See merge request espressif/esp-idf!44329
 2025-12-18 11:31:41 +08:00
morris
d5ddb10d39 Merge branch 'fix/jpeg_com_marker_check_v6.0' into 'release/v6.0' 
feat(jpeg_decoder): Add decode to yuv420 since esp32p4 version3 (backport v6.0)

See merge request espressif/esp-idf!44269
 2025-12-18 10:59:08 +08:00
Island
4af7054b75 Merge branch 'bugfix/fix_ble_security_issue_2025_v6.0' into 'release/v6.0' 
Fix potential CVE-2024-0039 out-of-bounds write in attp_build_value_cmd (v6.0)

See merge request espressif/esp-idf!43808
 2025-12-18 10:57:44 +08:00
Island
b890d0870c Merge branch 'feat/show_how_to_use_smp_in_blufi_example_v6.0' into 'release/v6.0' 
feat(ble/blufi): Support setting BLE encryption for blufi (v6.0)

See merge request espressif/esp-idf!44145
 2025-12-18 10:55:22 +08:00
Island
14c6f73885 Merge branch 'bugfix/fix_reconnect_failed_with_extend_adv_v6.0' into 'release/v6.0' 
fix(ble/bluedroid): Fixed the issue that extend advertising might not restart if the connection fails (v6.0)

See merge request espressif/esp-idf!44252
 2025-12-18 10:50:36 +08:00
Martin Vychodil
4b919caa17 Merge branch 'feat/vfs_remove_old_api_v6.0' into 'release/v6.0' 
feat(storage/vfs): v6 API breaking changes (v6.0)

See merge request espressif/esp-idf!44315
 2025-12-18 05:02:41 +08:00
Martin Vychodil
6cd8b82d2a Merge branch 'feat/sdmmc_bdl_v6.0' into 'release/v6.0' 
feat(bdl): Add support for SDMMC (v6.0)

See merge request espressif/esp-idf!43811
 2025-12-18 00:26:58 +08:00
Erhan Kurubas
ccc99e9cd1 change(freertos): add task count and pointer width to OpenOCD debug table 2025-12-17 17:15:15 +01:00
Erhan Kurubas
754122a2a9 feat(tools): update openocd version to v0.12.0-esp32-20251215 2025-12-17 17:15:15 +01:00
Kapil Gupta
54a41e1b29 Merge branch 'feat/wpa_supplicant_rom_md5_tests_v6.0' into 'release/v6.0' 
fix(esp_rom): use hmac_md5 and hmac_md5_vector from ROM only if CONFIG_LIBC_NEWLIB (v6.0)

See merge request espressif/esp-idf!44330
 2025-12-17 21:19:34 +05:30
Chen Jichang
10c473fbbd feat(hal): graudate the RMT hal driver into a new component 2025-12-17 22:31:25 +08:00
Zhang Shuxian
b3e2ffeab8 docs: Update CN translation 2025-12-17 14:00:23 +01:00
Tomáš Rohlínek
1d754b7e79 docs(storage/vfs): Add migration guide for breaking changes 2025-12-17 14:00:23 +01:00
Tomáš Rohlínek
d2b9aad8de feat(storage/vfs): Deprecate legacy API 2025-12-17 14:00:22 +01:00
Tomáš Rohlínek
e3cb10835c feat(storage/vfs): Make lwip specific API private 2025-12-17 14:00:22 +01:00
Tomáš Rohlínek
1bf8b030e3 feat(storage/vfs): Remove old API usage 2025-12-17 14:00:22 +01:00
Tomáš Rohlínek
44d224c041 feat(storage/vfs): refactor VFS calls to multiple files 2025-12-17 13:58:20 +01:00
morris
c740652f3d Merge branch 'feat/esp_hal_isp_v6.0' into 'release/v6.0' 
isp: move isp hal to cam hal (v6.0)

See merge request espressif/esp-idf!44134
 2025-12-17 18:52:30 +08:00
Island
4d81e688bf Merge branch 'fix/ble_mesh_nimble_gap_event_v6.0' into 'release/v6.0' 
fix(ble_mesh): fix memory issue in nimble gap event forwarding (v6.0)

See merge request espressif/esp-idf!44240
 2025-12-17 17:34:53 +08:00
Alexey Gerenkov
6a1fef6088 Merge branch 'fix/picolib_mulitple_syscall_defs_v6.0' into 'release/v6.0' 
fix(newlib): Fixes multiple definitions of raise() when picolib used (v6.0)

See merge request espressif/esp-idf!44307
 2025-12-17 17:20:47 +08:00
Roland Dobai
f38faa9bc4 Merge branch 'feat/cmakev2_depgraph_v6.0' into 'release/v6.0' 
feat(cmakev2/build): add idf_build_generate_depgraph function (v6.0)

See merge request espressif/esp-idf!44194
 2025-12-17 09:11:05 +01:00
Rahul Tank
256f00fcdc Merge branch 'bugfix/fix_compile_tinycrypt_v6.0' into 'release/v6.0' 
fix(nimble): Add missing header file to fix compilation issue (v6.0)

See merge request espressif/esp-idf!43884
 2025-12-17 12:58:05 +05:30
morris
311bec8f82 Merge branch 'fix/spi_edma_and_hal_component_6.0' into 'release/v6.0' 
feat(driver_spi): split esp_hal_gpspi and support master driver edma (v6.0)

See merge request espressif/esp-idf!44222
 2025-12-17 14:54:05 +08:00
C.S.M
2025d1152e fix(jpeg): Fix jpeg color space check 2025-12-17 14:26:10 +08:00
Alexey Lapshin
5008666133 fix(esp_rom): use hmac_md5 and hmac_md5_vector from ROM only if CONFIG_LIBC_NEWLIB 2025-12-17 12:05:44 +07:00
Mahavir Jain
7b683c40f4 tests(wpa_supplicant): add hmac/md5 tests covering ROM APIs 2025-12-17 12:05:44 +07:00
Chen Jian Hua
4e5e712df8 fix(bt): Update bt lib for ESP32-C3 and ESP32-S3(5106725) 
- Fixed BLE assert lld_con.c 1479


(cherry picked from commit 22641241fa)

Co-authored-by: chenjianhua <chenjianhua@espressif.com>
 2025-12-17 12:53:57 +08:00
morris
30e864c17f Merge branch 'fix/twai_queue_remain_and_doc_v6.0' into 'release/v6.0' 
fix(driver_twai): improve error logging in _node_queue_tx function (v6.0)

See merge request espressif/esp-idf!44223
 2025-12-17 11:40:04 +08:00
morris
51769ab2c8 Merge branch 'fix/p4_eco5_enable_special_test_6.0' into 'release/v6.0' 
fix(ci)p4 eco5 enable special test (v6.0)

See merge request espressif/esp-idf!44127
 2025-12-17 11:36:35 +08:00
Wang Meng Yang
27f9cd6e8f Merge branch 'bugfix/l2c_fcr_clone_buf_v6.0' into 'release/v6.0' 
fix(bt/bluedroid): fixed possible access to NULL in l2c_fcr_clone_buf

See merge request espressif/esp-idf!44262
 2025-12-17 11:13:50 +08:00
morris
c961c24b80 Merge branch 'feat/rgb_lcd_memory_v6.0' into 'release/v6.0' 
feat(rgb_lcd): allow users to manage the lifecycle of the frame buffer (v6.0)

See merge request espressif/esp-idf!43051
 2025-12-17 10:08:41 +08:00
morris
60e129b8fc Merge branch 'fix/awb_subwindow_v6.0' into 'release/v6.0' 
fix(isp): Added subwindow configuration for AWB (v6.0)

See merge request espressif/esp-idf!44218
 2025-12-17 09:46:42 +08:00
Tinyu
f632aae9ee fix(hal): correct PHY selection logic in usb_wrap_ll.h 2025-12-17 05:42:35 +08:00
Xiao Xufeng
469953bd04 Revert "fix(esp_system): limit CPU clock to 160MHz in ESP32-C5 for flash encryption" 
This reverts commit 3c5d2e6b58.
 2025-12-17 01:21:46 +08:00
Xiao Xufeng
ae7124abe3 feat(spi_flash): implement dynamic CPU frequency switching workaround for encrypted writes 
This commit implements a workaround that allows ESP32-C5 to run at 240MHz CPU frequency
normally, while automatically reducing CPU frequency during encrypted flash writes to
ensure correct operation. The frequency limit is chip revision dependent:
- v1.2 and above: limited to 160MHz during encrypted writes
- v1.0 and below: limited to 80MHz during encrypted writes

Key implementation details:
- Frequency limiting is triggered automatically when esp_flash_write_encrypted() is called
- Uses start() flags (ESP_FLASH_START_FLAG_LIMIT_CPU_FREQ) to integrate with OS layer
- Works with both PM enabled and disabled configurations
- Frequency is automatically restored after encrypted write completes
- For ESP32-C5 with 120MHz flash, Flash clock and timing registers are adjusted when
  CPU frequency is reduced to 80MHz
- SPI1 timing registers are configured during frequency switching since encrypted writes
  use SPI1 and must work correctly at reduced CPU frequencies

Code improvements:
- Use SOC_MSPI_FREQ_AXI_CONSTRAINED capability macro instead of hardcoded chip checks
- Control workaround via Kconfig (CONFIG_PM_WORKAROUND_FREQ_LIMIT_ENABLED) instead of
  hardcoded macros
- Add comprehensive test cases covering various PM configurations and edge cases

This workaround enables ESP32-C5 applications to benefit from 240MHz CPU performance
while maintaining reliable encrypted flash write functionality.
 2025-12-17 01:21:45 +08:00
Mahavir Jain
86f159ec06 fix(spi_flash): limit CPU clock to 160MHz for encrypted flash writes 2025-12-17 01:21:45 +08:00
Alexey Gerenkov
445b76fe5e Merge branch 'fix/signal_h_pthread_declarations_v6.0' into 'release/v6.0' 
fix(esp_libc): add workaround for pthread_sigmask declaration in picolibc signal.h (v6.0)

See merge request espressif/esp-idf!44268
 2025-12-17 01:05:14 +08:00
Adam Múdry
6ab125fa16 fix(sdmmc): sdmmc_get_blockdev fix potential overflow before widen 2025-12-16 15:42:23 +01:00