The ``adc_digi_config_t`` struct is modified on esp32c3: configuration
of clock divider factors are not provided anymore. The SARADC sampling
frequency is provided instead. In this way, we can handle the frequency
limit better.
The ``adc_digi_config_t`` struct is modified on esp32c3: configuration
of clock divider factors are not provided anymore. The SARADC sampling
frequency is provided instead. In this way, we can handle the frequency
limit better.
Issue Description:
If master is in HD mode, if it sends data without receiving data,
it will still enable the RX DMA because of old version ESP32 silicon issue.
And because there is no correctly linked RX DMA descriptor,
an inlink_dscr_error intr will be seen, which will influence the following RX transactions.
This issue is only found on ESP32.
Issue Description:
If master is in HD mode, if it sends data without receiving data, it will
still enable the RX DMA because of old version ESP32 silicon issue. And
because there is no correctly linked RX DMA descriptor, an
``inlink_dscr_error`` intr will be seen, which will influence the
following RX transactions.
Solution:
Trigge this workaround only in FD mode.
TODO:
Add a test to check if this workaround related issue does exit. If so,
reporting to Digital Team is also needed.
- add lock for single read and continuous read APIs
- update onetime read start singal delay for hardware limitation[*]
- move adc_caps to soc_caps.h
- update license dates
[*] There is a hardware limitation. If the APB clock frequency is high, the
step of this reg signal: ``onetime_start`` may not be captured by the
ADC digital controller (when its clock frequency is too slow). A rough
estimate for this step should be at least 3 ADC digital controller
clock cycle.
On esp32 and esp32s2:
``spi_ll_dma_set_out_eof_generation`` is modified to
``spi_ll_dma_set_rx_eof_generation``.
``spi_dma_ll_set_rx_eof_generation`` is modified to
``spi_dma_ll_set_out_eof_generation``.
Because on ESP32S3, this bit ``out_eof_mode`` is moved to DMA related
registers.
Setting cs num to -1 means cs pin is not connected. But passing the value -1 to the
spicommon_cs_initialize() will lead to program crash caused by "array index out
of bounds". We expect the driver to execute well but the driver should not be in
charge of users' behaviour, so this commit prevents the crash.
https://github.com/espressif/esp-idf/issues/5784
This commit seperates the hal context into different configuration
structures based on their members' definitions. Through refactoring
spi_master.c, the device related configuration should be passed in and
set each time before a new transaction. The transaction related
configuration now is a local variable in case of the fact that error
occurs without any notice when user forgets to pass new transaction
configuration in (which means the old driver will use the trans_config
that is saved from last transaction).
Besides, via above refactor, this commit fixs a bug which leads to
wrong cs polarity setting.
Closes https://github.com/espressif/esp-idf/pull/5490
Moreover, via above refactor, this commit also fixs a bug about duplex
mode switching when multiple devices are added to the bus.
Closes https://github.com/espressif/esp-idf/issues/4641
Armando