Commit Graph
288 Commits
Author SHA1 Message Date
Chen Jichang 61dcb5b61f change(parlio_tx): use shift edge instead sample edge
Made-with: Cursor
2026-05-06 10:13:28 +08:00
gaoxu e9120b7572 fix(tsens): fix temp_sensor affect by adc reset 2026-04-22 14:53:57 +08:00
C.S.M fc3fa2dba5 fix(temperature_sensor): Fix the float calculation in temperature sensor isr 2026-04-01 16:05:39 +08:00
Jiang Jiang Jian 48b82d0690 Merge branch 'contrib/github_pr_16130_v5.4' into 'release/v5.4'
esp_adc: Release the peripheral after calibration (GitHub PR) (v5.4)

See merge request espressif/esp-idf!40002
2026-03-16 19:22:01 +08:00
Jiang Jiang Jian 165aff222d Merge branch 'fix/esp32_adc_continuous_loss_sample_v5.4' into 'release/v5.4'
Fix/esp32 adc continuous loss sample (v5.4)

See merge request espressif/esp-idf!42830
2026-03-16 19:19:42 +08:00
gaoxu f21cc28e3c fix(adc): fix ESP32 ADC continuous loss sample times 2026-03-15 12:53:34 +08:00
wanckl 53458fc6aa fix(driver_spi): added bit trans length check for master driver
Closes https://github.com/espressif/esp-idf/issues/16049

Closes https://github.com/espressif/esp-idf/issues/17725
2026-03-13 10:39:55 +08:00
wanckl 1a86c86702 fix(driver_spi): master set idle pin level for all data pin 2026-03-11 10:14:12 +08:00
wanckl 5213197284 fix(driver_i2s): fix pdm mode ll header file 2026-03-11 10:14:12 +08:00
liuning 11f962d8c7 feat(phy): add check for required clock bits during phy enable 2026-03-09 16:54:45 +08:00
zwx 3e17211431 feat(ieee802154): separated the 802.15.4 HAL codes from the HAL component 2026-03-02 09:44:16 +00:00
gaoxu 5e06c779b0 fix(adc): fix ESP32-P4 ADC2 oneshot error and refactor apb claim macor 2026-02-04 15:59:23 +08:00
morris a901fb1c00 Merge branch 'fix/fix_dma_fail_when_flash_enc_enabled_v5.4' into 'release/v5.4'
fix(dma): fix dma alignment when flash_enc enabled (v5.4)

See merge request espressif/esp-idf!45081
2026-01-21 16:08:32 +08:00
laokaiyao 5fc86507f3 fix(parlio_rx): fixed opposite sample edge issue
Closes https://github.com/espressif/esp-idf/issues/18012
2026-01-15 11:59:16 +08:00
Chen Jichang b26b78a5ea fix(dma): fix dma alignment when flash_enc enabled
Closes https://github.com/espressif/esp-idf/issues/17708
2026-01-14 14:23:13 +08:00
Chen Chen 851ffae394 fix(intr_alloc): Fix ISR allocate methods in several drivers 2025-12-25 15:02:16 +08:00
Chen Chen 8ad7d769aa fix(i2c_master): Add i2c master timeout range check
Closes https://github.com/espressif/esp-idf/issues/17930
2025-12-10 17:55:59 +08:00
Song Ruo Jing 222d81976a fix(gpio): oe control by register only take effect when func sel is GPIO 2025-11-24 11:38:07 +08:00
Jiang Jiang Jian 080cccfb5c Merge branch 'fix/fix_lightsleep_pd_modem_breaks_common_fe_clock_v5.4' into 'release/v5.4'
fix(esp_hw_support): fix lightsleep pd modem breaks common fe clock (v5.4)

See merge request espressif/esp-idf!41111
2025-08-20 14:23:28 +08:00
morris b8ea51b2aa Merge branch 'bugfix/ledc_update_duty_wait_v5.4' into 'release/v5.4'
fix(ledc): duty_start bit should wait for its self-clear before next set on esp32 (v5.4)

See merge request espressif/esp-idf!41273
2025-08-15 18:15:59 +08:00
Song Ruo Jing a194b02246 fix(ledc): duty_start bit should wait for its self-clear before next set on esp32 2025-08-14 19:07:06 +08:00
Song Ruo Jing 67a2dfa293 fix(lp_io): w1ts/w1tc register access performance is improved
by avoiding "read-modify-write" operation. The registers designed to be
write only.
2025-08-13 21:24:19 +08:00
wuzhenghui 40ba25aecd fix(esp_hw_support): fix MODEM_ADC_COMMON_FE destroyed by modem powerdown lightsleep 2025-08-08 11:53:30 +08:00
wanckl 5583e8d95e fix(driver_spi): master driver change esp32p4 default src to pll 2025-07-30 10:14:01 +08:00
nilesh.kale cebbedbac2 feat: enable support for deterministic mode for esp32h2 2025-07-09 13:05:56 +08:00
Jiang Jiang Jian 871aeae6ad Merge branch 'fix/lp_periph_use_int_raw_v5.4' into 'release/v5.4'
change(lp-core): Update LP I2C and LP UART drivers to use raw interrupt status (v5.4)

See merge request espressif/esp-idf!39249
2025-05-27 11:11:29 +08:00
Song Ruo Jing 8f231272f6 fix(gpio): fix IO output enable control
oen_sel and oen_inv_sel fields from func_out_sel_cfg register
2025-05-20 15:30:26 +08:00
Song Ruo Jing f61b453a25 fix(gpio): fix 8/16-bit gpio, rtc/lp_io register access 2025-05-20 15:30:26 +08:00
Song Ruo Jing 6cffc5c994 fix(gpio): fix pu, pd, drv value incorrect from gpio_dump_io_configuration on esp32
Closes https://github.com/espressif/esp-idf/issues/14931
2025-05-20 15:30:14 +08:00
Sudeep Mohanty 6b75576db2 change(lp-core): Update LP I2C and LP UART drivers to use raw interrupt status
This commit updates the LP I2C and LP UART drivers to use the raw
interrupt status without enabling the interrupts.
2025-05-19 10:33:21 +02:00
C.S.M 94cbc9bbac fix(i2c): Fix that fsm reset cause i2c scl frequency changed on esp32s2 2025-04-29 16:58:36 +08:00
morris 7e1238de97 Merge branch 'fix/parlio_add_gdma_fifo_reset_v5.4' into 'release/v5.4'
fix(parlio_tx): add clock and fifo reset in disable function (v5.4)

See merge request espressif/esp-idf!36273
2025-04-03 10:27:04 +08:00
morris ff8c836be3 Merge branch 'feat/allow_setting_rmt_group_prescale_v5.4' into 'release/v5.4'
refactor(rmt): set group clock prescale dynamically (v5.4)

See merge request espressif/esp-idf!36737
2025-04-02 10:15:16 +08:00
morris 57a83359d5 Merge branch 'bugfix/clear_ledc_gamma_ram_v5.4' into 'release/v5.4'
fix(ledc): left-off gamma ram registers should be cleared (v5.4)

See merge request espressif/esp-idf!37572
2025-04-01 11:13:32 +08:00
Chen Jichang 4e7c593098 fix(parlio): fix rempty interrupt during resetting fifo
Move the fifo reset to after disabling the tx core clock.
And add external non-free running clock src test.
2025-04-01 11:11:44 +08:00
Chen Jichang 21792d572e fix(parlio_tx): add clock and fifo reset in disable function 2025-04-01 11:11:44 +08:00
morris 8bce1430ee Merge branch 'bugfix/lp_uart_baudrate_limitation_v5.4' into 'release/v5.4'
fix(uart): LP UART does not have the pre-divider for its clock source (v5.4)

See merge request espressif/esp-idf!37594
2025-04-01 10:35:29 +08:00
Song Ruo Jing e774dbfd0f fix(uart): LP UART does not have the pre-divider for its clock source
Closes https://github.com/espressif/esp-idf/issues/15427
2025-03-10 15:29:09 +08:00
Armando 419e8b2e20 fix(mspi): fixed cpu and mspi freq mismatch issue when in dfs/sleep on p4 2025-03-08 14:06:09 +08:00
Song Ruo Jing 9aaa4f9e9c fix(ledc): overflowed integer argument in ledc_hal_clear_left_off_fade_param 2025-03-07 20:33:01 +08:00
Chen Jichang fc5d2e1bae refactor(rmt): set group clock prescale dynamically
Closes https://github.com/espressif/esp-idf/issues/14760
2025-02-26 14:17:12 +08:00
laokaiyao b18506da8b fix(i2s): fixed the pdm2pcm capability on c5 and c61 2025-02-20 21:41:33 +08:00
morris cf392937b6 Merge branch 'feature/flash_software_resume_v5.4' into 'release/v5.4'
feat(spi_flash): Add config for adding auto check status after suspend to improve performance (backport v5.4)

See merge request espressif/esp-idf!36525
2025-02-20 10:52:17 +08:00
Armando a387ec0123 fix(adc): fixed adc function register not reset issue 2025-02-18 10:33:25 +08:00
Li Shuai c74a5e3e8e change(esp_hw_support): fix wifi mac rx buffer link exception caused by pll clock 2025-01-26 14:54:33 +08:00
Mahavir Jain 649f9a72ae Merge branch 'feat/support_aes_pseudo_round_func_in_esp32h2_eco5_v5.4' into 'release/v5.4'
Support AES and XTS-AES's pseudo round function in ESP32H2-ECO5 (v5.4)

See merge request espressif/esp-idf!36463
2025-01-23 13:20:20 +08:00
harshal.patil b06a4c198a feat(bootloader_support): Permanently enable XTS-AES pseudo rounds when FE release mode is enabled 2025-01-21 12:28:23 +05:30
C.S.M 82b3f5413c feat(spi_flash): Add config for adding auto check status after suspend to improve performance 2025-01-21 14:50:23 +08:00
wanckl 6c6454357c feat(driver_spi): support using SPI_DEVICE_STD_TIMING to adjust master rx in standard timing 2025-01-17 10:51:47 +08:00
Jiang Jiang Jian 7cd2a1483e Merge branch 'fix/fix_p4_deepsleep_io_leakage_v5.4' into 'release/v5.4'
fix(esp_hw_support): fix esp32p4 JTAG pad deepsleep current leakage (v5.4)

See merge request espressif/esp-idf!36008
2025-01-07 10:53:13 +08:00