fix(tsens): fix temp_sensor affect by adc reset

components/esp_adc/adc_continuous.c

@@ -270,7 +270,7 @@ esp_err_t adc_continuous_start(adc_continuous_handle_t handle)
 
     //reset ADC digital part to reset ADC sampling EOF counter
     ADC_BUS_CLK_ATOMIC() {
-        adc_ll_reset_register();
+        sar_periph_ctrl_adc_reset();
     }
 
     if (handle->pm_lock) {

components/esp_hw_support/adc_share_hw_ctrl.c

@@ -210,7 +210,7 @@ void adc_apb_periph_claim(void)
 #if SOC_RCC_IS_INDEPENDENT
             adc_ll_enable_func_clock(true);
 #endif
-            adc_ll_reset_register();
+            sar_periph_ctrl_adc_reset();
         }
     }
 

components/esp_hw_support/include/esp_private/sar_periph_ctrl.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -102,6 +102,34 @@ void sar_periph_ctrl_power_enable(void);
  */
 void sar_periph_ctrl_power_disable(void);
 
+/*------------------------------------------------------------------------------
+* ADC Reset
+*----------------------------------------------------------------------------*/
+
+/**
+* @note For chips that temperature sensor uses part of ADC registers,
+*       ADC reset will reset these temperature sensor registers.
+*       So we need to backup and restore these temperature sensor registers when ADC reset.
+*       And in case temperature sensor result error during ADC reset,
+*       we need to acquire a lock to prevent temperature sensor readings during ADC reset.
+*/
+
+/**
+ * @brief Acquire ADC reset lock
+ */
+void adc_reset_lock_acquire(void);
+
+/**
+ * @brief Release ADC reset lock
+ */
+void adc_reset_lock_release(void);
+
+/**
+ * @brief Reset ADC module
+ *
+ */
+void sar_periph_ctrl_adc_reset(void);
+
 #ifdef __cplusplus
 }
 #endif

components/esp_hw_support/port/esp32/sar_periph_ctrl.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -18,7 +18,11 @@
 #include "esp_log.h"
 #include "freertos/FreeRTOS.h"
 #include "esp_private/sar_periph_ctrl.h"
+#include "esp_private/critical_section.h"
+#include "esp_private/adc_share_hw_ctrl.h"
+#include "esp_private/periph_ctrl.h"
 #include "hal/sar_ctrl_ll.h"
+#include "hal/adc_ll.h"
 
 static const char *TAG = "sar_periph_ctrl";
 extern portMUX_TYPE rtc_spinlock;
@@ -115,3 +119,23 @@ void sar_periph_ctrl_adc_continuous_power_release(void)
 {
     s_sar_power_release();
 }
+
+/*------------------------------------------------------------------------------
+* ADC Reset
+*----------------------------------------------------------------------------*/
+void sar_periph_ctrl_adc_reset(void)
+{
+    ADC_BUS_CLK_ATOMIC() {
+        adc_ll_reset_register();
+    }
+}
+
+void adc_reset_lock_acquire(void)
+{
+    // Empty implementation
+}
+
+void adc_reset_lock_release(void)
+{
+    // Empty implementation
+}

components/esp_hw_support/port/esp32c2/sar_periph_ctrl.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -19,6 +19,9 @@
 #include "esp_log.h"
 #include "freertos/FreeRTOS.h"
 #include "esp_private/sar_periph_ctrl.h"
+#include "esp_private/critical_section.h"
+#include "esp_private/adc_share_hw_ctrl.h"
+#include "esp_private/periph_ctrl.h"
 #include "hal/sar_ctrl_ll.h"
 #include "hal/adc_ll.h"
 
@@ -128,3 +131,23 @@ void sar_periph_ctrl_adc_continuous_power_release(void)
 {
     abort();  //c2 not supported, should never reach here
 }
+
+/*------------------------------------------------------------------------------
+* ADC Reset
+*----------------------------------------------------------------------------*/
+void sar_periph_ctrl_adc_reset(void)
+{
+    ADC_BUS_CLK_ATOMIC() {
+        adc_ll_reset_register();
+    }
+}
+
+void adc_reset_lock_acquire(void)
+{
+    // Empty implementation
+}
+
+void adc_reset_lock_release(void)
+{
+    // Empty implementation
+}

components/esp_hw_support/port/esp32c3/sar_periph_ctrl.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -15,15 +15,21 @@
  * - Temp Sensor
  */
 
+#include <sys/lock.h>
 #include "sdkconfig.h"
 #include "esp_log.h"
 #include "freertos/FreeRTOS.h"
 #include "esp_private/sar_periph_ctrl.h"
+#include "esp_private/critical_section.h"
+#include "esp_private/adc_share_hw_ctrl.h"
+#include "esp_private/periph_ctrl.h"
 #include "hal/sar_ctrl_ll.h"
 #include "hal/adc_ll.h"
+#include "hal/temperature_sensor_ll.h"
 
 static const char *TAG = "sar_periph_ctrl";
 extern portMUX_TYPE rtc_spinlock;
+static _lock_t adc_reset_lock;
 
 
 void sar_periph_ctrl_init(void)
@@ -128,3 +134,35 @@ void sar_periph_ctrl_adc_continuous_power_release(void)
 {
     s_sar_adc_power_release();
 }
+
+/*------------------------------------------------------------------------------
+* ADC Reset
+*----------------------------------------------------------------------------*/
+void sar_periph_ctrl_adc_reset(void)
+{
+    // Acquire ADC reset lock to prevent temperature sensor readings during ADC reset
+    adc_reset_lock_acquire();
+
+    ADC_BUS_CLK_ATOMIC() {
+        // Save temperature sensor related register values before ADC reset
+        tsens_ll_reg_values_t saved_tsens_regs = {};
+        tsens_ll_backup_registers(&saved_tsens_regs);
+        adc_ll_reset_register();
+        // Restore temperature sensor related register values after ADC reset
+        temperature_sensor_ll_reset_module();
+        tsens_ll_restore_registers(&saved_tsens_regs);
+    }
+
+    // Release ADC reset lock after ADC reset is complete
+    adc_reset_lock_release();
+}
+
+void adc_reset_lock_acquire(void)
+{
+    _lock_acquire(&adc_reset_lock);
+}
+
+void adc_reset_lock_release(void)
+{
+    _lock_release(&adc_reset_lock);
+}

components/esp_hw_support/port/esp32c5/sar_periph_ctrl.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -19,10 +19,15 @@
 #include "freertos/FreeRTOS.h"
 #include "esp_private/sar_periph_ctrl.h"
 #include "esp_private/esp_modem_clock.h"
+#include "esp_private/critical_section.h"
+#include "esp_private/adc_share_hw_ctrl.h"
 #include "hal/sar_ctrl_ll.h"
+#include "hal/adc_ll.h"
+#include "hal/temperature_sensor_ll.h"
 
 static const char *TAG = "sar_periph_ctrl";
 extern portMUX_TYPE rtc_spinlock;
+static _lock_t adc_reset_lock;
 
 void sar_periph_ctrl_init(void)
 {
@@ -116,3 +121,35 @@ void sar_periph_ctrl_adc_continuous_power_release(void)
 {
     s_sar_power_release();
 }
+
+/*------------------------------------------------------------------------------
+* ADC Reset
+*----------------------------------------------------------------------------*/
+void sar_periph_ctrl_adc_reset(void)
+{
+    // Acquire ADC reset lock to prevent temperature sensor readings during ADC reset
+    adc_reset_lock_acquire();
+
+    ADC_BUS_CLK_ATOMIC() {
+        // Save temperature sensor related register values before ADC reset
+        tsens_ll_reg_values_t saved_tsens_regs = {};
+        tsens_ll_backup_registers(&saved_tsens_regs);
+        adc_ll_reset_register();
+        // Restore temperature sensor related register values after ADC reset
+        temperature_sensor_ll_reset_module();
+        tsens_ll_restore_registers(&saved_tsens_regs);
+    }
+
+    // Release ADC reset lock after ADC reset is complete
+    adc_reset_lock_release();
+}
+
+void adc_reset_lock_acquire(void)
+{
+    _lock_acquire(&adc_reset_lock);
+}
+
+void adc_reset_lock_release(void)
+{
+    _lock_release(&adc_reset_lock);
+}

components/esp_hw_support/port/esp32c6/sar_periph_ctrl.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -19,11 +19,15 @@
 #include "freertos/FreeRTOS.h"
 #include "esp_private/sar_periph_ctrl.h"
 #include "esp_private/esp_modem_clock.h"
+#include "esp_private/critical_section.h"
+#include "esp_private/adc_share_hw_ctrl.h"
 #include "hal/sar_ctrl_ll.h"
+#include "hal/adc_ll.h"
+#include "hal/temperature_sensor_ll.h"
 
 static const char *TAG = "sar_periph_ctrl";
 extern portMUX_TYPE rtc_spinlock;
-
+static _lock_t adc_reset_lock;
 
 void sar_periph_ctrl_init(void)
 {
@@ -117,3 +121,35 @@ void sar_periph_ctrl_adc_continuous_power_release(void)
 {
     s_sar_power_release();
 }
+
+/*------------------------------------------------------------------------------
+* ADC Reset
+*----------------------------------------------------------------------------*/
+void sar_periph_ctrl_adc_reset(void)
+{
+    // Acquire ADC reset lock to prevent temperature sensor readings during ADC reset
+    adc_reset_lock_acquire();
+
+    ADC_BUS_CLK_ATOMIC() {
+        // Save temperature sensor related register values before ADC reset
+        tsens_ll_reg_values_t saved_tsens_regs = {};
+        tsens_ll_backup_registers(&saved_tsens_regs);
+        adc_ll_reset_register();
+        // Restore temperature sensor related register values after ADC reset
+        temperature_sensor_ll_reset_module();
+        tsens_ll_restore_registers(&saved_tsens_regs);
+    }
+
+    // Release ADC reset lock after ADC reset is complete
+    adc_reset_lock_release();
+}
+
+void adc_reset_lock_acquire(void)
+{
+    _lock_acquire(&adc_reset_lock);
+}
+
+void adc_reset_lock_release(void)
+{
+    _lock_release(&adc_reset_lock);
+}

components/esp_hw_support/port/esp32h2/sar_periph_ctrl.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -18,10 +18,15 @@
 #include "freertos/FreeRTOS.h"
 #include "esp_private/sar_periph_ctrl.h"
 #include "esp_private/esp_modem_clock.h"
+#include "esp_private/critical_section.h"
+#include "esp_private/adc_share_hw_ctrl.h"
 #include "hal/sar_ctrl_ll.h"
+#include "hal/adc_ll.h"
+#include "hal/temperature_sensor_ll.h"
 
 static const char *TAG = "sar_periph_ctrl";
 extern portMUX_TYPE rtc_spinlock;
+static _lock_t adc_reset_lock;
 
 
 void sar_periph_ctrl_init(void)
@@ -116,3 +121,36 @@ void sar_periph_ctrl_adc_continuous_power_release(void)
 {
     s_sar_power_release();
 }
+
+
+/*------------------------------------------------------------------------------
+* ADC Reset
+*----------------------------------------------------------------------------*/
+void sar_periph_ctrl_adc_reset(void)
+{
+    // Acquire ADC reset lock to prevent temperature sensor readings during ADC reset
+    adc_reset_lock_acquire();
+
+    ADC_BUS_CLK_ATOMIC() {
+        // Save temperature sensor related register values before ADC reset
+        tsens_ll_reg_values_t saved_tsens_regs = {};
+        tsens_ll_backup_registers(&saved_tsens_regs);
+        adc_ll_reset_register();
+        // Restore temperature sensor related register values after ADC reset
+        temperature_sensor_ll_reset_module();
+        tsens_ll_restore_registers(&saved_tsens_regs);
+    }
+
+    // Release ADC reset lock after ADC reset is complete
+    adc_reset_lock_release();
+}
+
+void adc_reset_lock_acquire(void)
+{
+    _lock_acquire(&adc_reset_lock);
+}
+
+void adc_reset_lock_release(void)
+{
+    _lock_release(&adc_reset_lock);
+}

components/esp_hw_support/port/esp32p4/sar_periph_ctrl.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -18,8 +18,13 @@
 #include "esp_log.h"
 #include "freertos/FreeRTOS.h"
 #include "esp_private/sar_periph_ctrl.h"
+#include "esp_private/regi2c_ctrl.h"
 #include "esp_private/esp_modem_clock.h"
+#include "esp_private/critical_section.h"
+#include "esp_private/adc_share_hw_ctrl.h"
+#include "esp_private/periph_ctrl.h"
 #include "hal/sar_ctrl_ll.h"
+#include "hal/adc_ll.h"
 
 static const char *TAG = "sar_periph_ctrl";
 extern portMUX_TYPE rtc_spinlock;
@@ -48,7 +53,7 @@ void sar_periph_ctrl_power_disable(void)
 /**
  * This gets incremented when s_sar_power_acquire() is called,
  * and decremented when s_sar_power_release() is called.
- * PWDET is powered down when the value reaches zero.
+ * PWDET and REG_I2C are powered down when the value reaches zero.
  * Should be modified within critical section.
  */
 static int s_sar_power_on_cnt;
@@ -56,6 +61,7 @@ static int s_sar_power_on_cnt;
 static void s_sar_power_acquire(void)
 {
     portENTER_CRITICAL_SAFE(&rtc_spinlock);
+    regi2c_saradc_enable();
     s_sar_power_on_cnt++;
     if (s_sar_power_on_cnt == 1) {
         sar_ctrl_ll_set_power_mode(SAR_CTRL_LL_POWER_ON);
@@ -74,6 +80,7 @@ static void s_sar_power_release(void)
     } else if (s_sar_power_on_cnt == 0) {
         sar_ctrl_ll_set_power_mode(SAR_CTRL_LL_POWER_FSM);
     }
+    regi2c_saradc_disable();
     portEXIT_CRITICAL_SAFE(&rtc_spinlock);
 }
 
@@ -114,3 +121,23 @@ void sar_periph_ctrl_adc_continuous_power_release(void)
 {
     s_sar_power_release();
 }
+
+/*------------------------------------------------------------------------------
+* ADC Reset
+*----------------------------------------------------------------------------*/
+void sar_periph_ctrl_adc_reset(void)
+{
+    ADC_BUS_CLK_ATOMIC() {
+        adc_ll_reset_register();
+    }
+}
+
+void adc_reset_lock_acquire(void)
+{
+    // Empty implementation
+}
+
+void adc_reset_lock_release(void)
+{
+    // Empty implementation
+}

components/esp_hw_support/port/esp32s2/sar_periph_ctrl.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -19,6 +19,10 @@
 #include "esp_log.h"
 #include "freertos/FreeRTOS.h"
 #include "esp_private/sar_periph_ctrl.h"
+#include "esp_private/regi2c_ctrl.h"
+#include "esp_private/critical_section.h"
+#include "esp_private/adc_share_hw_ctrl.h"
+#include "esp_private/periph_ctrl.h"
 #include "hal/sar_ctrl_ll.h"
 #include "hal/adc_ll.h"
 
@@ -52,34 +56,48 @@ void sar_periph_ctrl_power_disable(void)
 /*------------------------------------------------------------------------------
 * PWDET Power
 *----------------------------------------------------------------------------*/
-static int s_pwdet_power_on_cnt;
+static int s_sar_power_on_cnt;
 
-void sar_periph_ctrl_pwdet_power_acquire(void)
+void s_sar_power_acquire(void)
 {
     portENTER_CRITICAL_SAFE(&rtc_spinlock);
-    s_pwdet_power_on_cnt++;
-    if (s_pwdet_power_on_cnt == 1) {
+    s_sar_power_on_cnt++;
+    if (s_sar_power_on_cnt == 1) {
         sar_ctrl_ll_set_power_mode_from_pwdet(SAR_CTRL_LL_POWER_ON);
+        regi2c_saradc_enable();
     }
     portEXIT_CRITICAL_SAFE(&rtc_spinlock);
 }
 
+void s_sar_power_release(void)
+{
+    portENTER_CRITICAL_SAFE(&rtc_spinlock);
+    s_sar_power_on_cnt--;
+    /* Sanity check */
+    if (s_sar_power_on_cnt < 0) {
+        portEXIT_CRITICAL(&rtc_spinlock);
+        ESP_LOGE(TAG, "%s called, but s_sar_power_on_cnt == 0", __func__);
+        abort();
+    } else if (s_sar_power_on_cnt == 0) {
+        sar_ctrl_ll_set_power_mode_from_pwdet(SAR_CTRL_LL_POWER_FSM);
+    }
+    regi2c_saradc_disable();
+    portEXIT_CRITICAL_SAFE(&rtc_spinlock);
+}
+
+/*------------------------------------------------------------------------------
+* PWDET Power
+*----------------------------------------------------------------------------*/
+void sar_periph_ctrl_pwdet_power_acquire(void)
+{
+    s_sar_power_acquire();
+}
+
 void sar_periph_ctrl_pwdet_power_release(void)
 {
-    portENTER_CRITICAL_SAFE(&rtc_spinlock);
-    s_pwdet_power_on_cnt--;
-    /* Sanity check */
-    if (s_pwdet_power_on_cnt < 0) {
-        portEXIT_CRITICAL(&rtc_spinlock);
-        ESP_LOGE(TAG, "%s called, but s_pwdet_power_on_cnt == 0", __func__);
-        abort();
-    } else if (s_pwdet_power_on_cnt == 0) {
-        sar_ctrl_ll_set_power_mode_from_pwdet(SAR_CTRL_LL_POWER_FSM);
-    }
-    portEXIT_CRITICAL_SAFE(&rtc_spinlock);
+    s_sar_power_release();
 }
 
-
 /*------------------------------------------------------------------------------
 * ADC Power
 *----------------------------------------------------------------------------*/
@@ -102,3 +120,23 @@ void sar_periph_ctrl_adc_continuous_power_release(void)
 {
     adc_ll_digi_set_power_manage(ADC_LL_POWER_BY_FSM);
 }
+
+/*------------------------------------------------------------------------------
+* ADC Reset
+*----------------------------------------------------------------------------*/
+void sar_periph_ctrl_adc_reset(void)
+{
+    ADC_BUS_CLK_ATOMIC() {
+        adc_ll_reset_register();
+    }
+}
+
+void adc_reset_lock_acquire(void)
+{
+    // Empty implementation
+}
+
+void adc_reset_lock_release(void)
+{
+    // Empty implementation
+}

components/esp_hw_support/port/esp32s3/sar_periph_ctrl.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -19,6 +19,10 @@
 #include "esp_log.h"
 #include "freertos/FreeRTOS.h"
 #include "esp_private/sar_periph_ctrl.h"
+#include "esp_private/regi2c_ctrl.h"
+#include "esp_private/critical_section.h"
+#include "esp_private/adc_share_hw_ctrl.h"
+#include "esp_private/periph_ctrl.h"
 #include "hal/sar_ctrl_ll.h"
 #include "hal/adc_ll.h"
 
@@ -51,7 +55,7 @@ void sar_periph_ctrl_power_disable(void)
 /**
  * This gets incremented when s_sar_power_acquire() is called,
  * and decremented when s_sar_power_release() is called.
- * PWDET is powered down when the value reaches zero.
+ * PWDET and REG_I2C are powered down when the value reaches zero.
  * Should be modified within critical section.
  */
 static int s_sar_power_on_cnt;
@@ -59,6 +63,7 @@ static int s_sar_power_on_cnt;
 static void s_sar_power_acquire(void)
 {
     portENTER_CRITICAL_SAFE(&rtc_spinlock);
+    regi2c_saradc_enable();
     s_sar_power_on_cnt++;
     if (s_sar_power_on_cnt == 1) {
         sar_ctrl_ll_set_power_mode(SAR_CTRL_LL_POWER_ON);
@@ -77,6 +82,7 @@ static void s_sar_power_release(void)
     } else if (s_sar_power_on_cnt == 0) {
         sar_ctrl_ll_set_power_mode(SAR_CTRL_LL_POWER_FSM);
     }
+    regi2c_saradc_disable();
     portEXIT_CRITICAL_SAFE(&rtc_spinlock);
 }
 
@@ -117,3 +123,23 @@ void sar_periph_ctrl_adc_continuous_power_release(void)
 {
     s_sar_power_release();
 }
+
+/*------------------------------------------------------------------------------
+* ADC Reset
+*----------------------------------------------------------------------------*/
+void sar_periph_ctrl_adc_reset(void)
+{
+    ADC_BUS_CLK_ATOMIC() {
+        adc_ll_reset_register();
+    }
+}
+
+void adc_reset_lock_acquire(void)
+{
+    // Empty implementation
+}
+
+void adc_reset_lock_release(void)
+{
+    // Empty implementation
+}

components/hal/esp32c3/include/hal/temperature_sensor_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -155,6 +155,36 @@ static inline void temperature_sensor_ll_set_clk_div(uint8_t clk_div)
     HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.apb_tsens_ctrl, tsens_clk_div, clk_div);
 }
 
+/**
+ * @brief Structure for temperature sensor related register values
+ */
+typedef struct {
+    uint32_t tsens_ctrl;      // Temperature sensor control register (APB_SARADC_APB_TSENS_CTRL_REG)
+    uint32_t tsens_ctrl2;     // Temperature sensor control register 2 (APB_SARADC_THRES1_HIGH_INT_ST_M)
+} tsens_ll_reg_values_t;
+
+/**
+ * @brief Read temperature sensor related ADC register values for backup
+ *
+ * @param reg_values Output parameter, pointer to structure for storing register values
+ */
+static inline void tsens_ll_backup_registers(tsens_ll_reg_values_t *reg_values)
+{
+    reg_values->tsens_ctrl = APB_SARADC.apb_tsens_ctrl.val;
+    reg_values->tsens_ctrl2 = APB_SARADC.apb_tsens_ctrl2.val;
+}
+
+/**
+ * @brief Restore temperature sensor related ADC register values from backup
+ *
+ * @param reg_values Input parameter, pointer to structure containing register values to restore
+ */
+static inline void tsens_ll_restore_registers(const tsens_ll_reg_values_t *reg_values)
+{
+    APB_SARADC.apb_tsens_ctrl.val = reg_values->tsens_ctrl;
+    APB_SARADC.apb_tsens_ctrl2.val = reg_values->tsens_ctrl2;
+}
+
 #ifdef __cplusplus
 }
 #endif

components/hal/esp32c5/include/hal/temperature_sensor_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -270,6 +270,42 @@ static inline void temperature_sensor_ll_set_sample_rate(uint16_t rate)
     HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.tsens_sample, saradc_tsens_sample_rate, rate);
 }
 
+/**
+ * @brief Structure for temperature sensor related register values
+ */
+typedef struct {
+    uint32_t tsens_ctrl;      // Temperature sensor control register (APB_SARADC_APB_TSENS_CTRL_REG)
+    uint32_t tsens_ctrl2;     // Temperature sensor control register 2 (APB_SARADC_TSENS_CTRL2_REG)
+    uint32_t tsens_wake;      // Temperature sensor wake register (APB_TSENS_WAKE_REG)
+    uint32_t tsens_sample;    // Temperature sensor sample register (APB_TSENS_SAMPLE_REG)
+} tsens_ll_reg_values_t;
+
+/**
+ * @brief Read temperature sensor related ADC register values for backup
+ *
+ * @param reg_values Output parameter, pointer to structure for storing register values
+ */
+static inline void tsens_ll_backup_registers(tsens_ll_reg_values_t *reg_values)
+{
+    reg_values->tsens_ctrl = APB_SARADC.saradc_apb_tsens_ctrl.val;
+    reg_values->tsens_ctrl2 = APB_SARADC.saradc_tsens_ctrl2.val;
+    reg_values->tsens_wake = APB_SARADC.tsens_wake.val;
+    reg_values->tsens_sample = APB_SARADC.tsens_sample.val;
+}
+
+/**
+ * @brief Restore temperature sensor related ADC register values from backup
+ *
+ * @param reg_values Input parameter, pointer to structure containing register values to restore
+ */
+static inline void tsens_ll_restore_registers(const tsens_ll_reg_values_t *reg_values)
+{
+    APB_SARADC.saradc_apb_tsens_ctrl.val = reg_values->tsens_ctrl;
+    APB_SARADC.saradc_tsens_ctrl2.val = reg_values->tsens_ctrl2;
+    APB_SARADC.tsens_wake.val = reg_values->tsens_wake;
+    APB_SARADC.tsens_sample.val = reg_values->tsens_sample;
+}
+
 #ifdef __cplusplus
 }
 #endif

components/hal/esp32c6/include/hal/temperature_sensor_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -270,6 +270,60 @@ static inline void temperature_sensor_ll_set_sample_rate(uint16_t rate)
     HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.tsens_sample, saradc_tsens_sample_rate, rate);
 }
 
+/**
+ * @brief Structure for temperature sensor related register values
+ */
+typedef struct {
+    uint32_t tsens_ctrl;      // Temperature sensor control register (APB_SARADC_APB_TSENS_CTRL_REG)
+    uint32_t tsens_ctrl2;     // Temperature sensor control register 2 (APB_SARADC_TSENS_CTRL2_REG)
+    uint32_t tsens_wake;      // Temperature sensor wake register (APB_TSENS_WAKE_REG)
+    uint32_t tsens_sample;    // Temperature sensor sample register (APB_TSENS_SAMPLE_REG)
+    uint32_t cali;            // ADC calibration register
+    uint32_t clkm_conf;       // ADC clock configuration register
+    uint32_t int_ena;         // ADC interrupt enable register
+    uint32_t int_raw;         // ADC interrupt raw status register
+    uint32_t int_st;          // ADC interrupt status register
+    uint32_t int_clr;         // ADC interrupt clear register
+} tsens_ll_reg_values_t;
+
+/**
+ * @brief Read temperature sensor related ADC register values for backup
+ *
+ * @param reg_values Output parameter, pointer to structure for storing register values
+ */
+static inline void tsens_ll_backup_registers(tsens_ll_reg_values_t *reg_values)
+{
+    reg_values->tsens_ctrl = APB_SARADC.saradc_apb_tsens_ctrl.val;
+    reg_values->tsens_ctrl2 = APB_SARADC.saradc_tsens_ctrl2.val;
+    reg_values->tsens_wake = APB_SARADC.tsens_wake.val;
+    reg_values->tsens_sample = APB_SARADC.tsens_sample.val;
+    reg_values->cali = APB_SARADC.saradc_cali.val;
+    reg_values->clkm_conf = APB_SARADC.saradc_clkm_conf.val;
+    reg_values->int_ena = APB_SARADC.saradc_int_ena.val;
+    reg_values->int_raw = APB_SARADC.saradc_int_raw.val;
+    reg_values->int_st = APB_SARADC.saradc_int_st.val;
+    reg_values->int_clr = APB_SARADC.saradc_int_clr.val;
+}
+
+/**
+ * @brief Restore temperature sensor related ADC register values from backup
+ *
+ * @param reg_values Input parameter, pointer to structure containing register values to restore
+ */
+static inline void tsens_ll_restore_registers(const tsens_ll_reg_values_t *reg_values)
+{
+    APB_SARADC.saradc_apb_tsens_ctrl.val = reg_values->tsens_ctrl;
+    APB_SARADC.saradc_tsens_ctrl2.val = reg_values->tsens_ctrl2;
+    APB_SARADC.tsens_wake.val = reg_values->tsens_wake;
+    APB_SARADC.tsens_sample.val = reg_values->tsens_sample;
+    APB_SARADC.saradc_cali.val = reg_values->cali;
+    APB_SARADC.saradc_clkm_conf.val = reg_values->clkm_conf;
+    APB_SARADC.saradc_int_ena.val = reg_values->int_ena;
+    APB_SARADC.saradc_int_raw.val = reg_values->int_raw;
+    APB_SARADC.saradc_int_st.val = reg_values->int_st;
+    APB_SARADC.saradc_int_clr.val = reg_values->int_clr;
+}
+
 #ifdef __cplusplus
 }
 #endif

components/hal/esp32h2/include/hal/temperature_sensor_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -269,6 +269,42 @@ static inline void temperature_sensor_ll_set_sample_rate(uint16_t rate)
     HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.tsens_sample, saradc_tsens_sample_rate, rate);
 }
 
+/**
+ * @brief Structure for temperature sensor related register values
+ */
+typedef struct {
+    uint32_t tsens_ctrl;      // Temperature sensor control register (APB_SARADC_APB_TSENS_CTRL_REG)
+    uint32_t tsens_ctrl2;     // Temperature sensor control register 2 (APB_SARADC_TSENS_CTRL2_REG)
+    uint32_t tsens_wake;      // Temperature sensor wake register (APB_TSENS_WAKE_REG)
+    uint32_t tsens_sample;    // Temperature sensor sample register (APB_TSENS_SAMPLE_REG)
+} tsens_ll_reg_values_t;
+
+/**
+ * @brief Read temperature sensor related ADC register values for backup
+ *
+ * @param reg_values Output parameter, pointer to structure for storing register values
+ */
+static inline void tsens_ll_backup_registers(tsens_ll_reg_values_t *reg_values)
+{
+    reg_values->tsens_ctrl = APB_SARADC.saradc_apb_tsens_ctrl.val;
+    reg_values->tsens_ctrl2 = APB_SARADC.saradc_tsens_ctrl2.val;
+    reg_values->tsens_wake = APB_SARADC.tsens_wake.val;
+    reg_values->tsens_sample = APB_SARADC.tsens_sample.val;
+}
+
+/**
+ * @brief Restore temperature sensor related ADC register values from backup
+ *
+ * @param reg_values Input parameter, pointer to structure containing register values to restore
+ */
+static inline void tsens_ll_restore_registers(const tsens_ll_reg_values_t *reg_values)
+{
+    APB_SARADC.saradc_apb_tsens_ctrl.val = reg_values->tsens_ctrl;
+    APB_SARADC.saradc_tsens_ctrl2.val = reg_values->tsens_ctrl2;
+    APB_SARADC.tsens_wake.val = reg_values->tsens_wake;
+    APB_SARADC.tsens_sample.val = reg_values->tsens_sample;
+}
+
 #ifdef __cplusplus
 }
 #endif