Commit Graph
57 Commits
Author SHA1 Message Date
harshal.patil de3a510a18 fix(esp_security): cover the crypto reset coupling in the driver locks
A peripheral's reset also resets the ones it occupies, so a lock has to cover
both. Gate the ECDSA MPI lock on SOC_ECDSA_USES_MPI rather than the runtime
ecdsa_ll_is_mpi_required() and set that capability on C5, lock the Key Manager
path in esp_key_mgr.c, clean HMAC after its reset, and enable DS before the
primitives its reset covers.
2026-09-08 14:03:50 +05:30
Aditya Patwardhan b10ae7f167 Merge branch 'fix/s31_nist_rng_error' into 'master'
RNG: initialize TRNG NIST path and complete RNG registers for ESP32-S31

Closes IDF-16088

See merge request espressif/esp-idf!51931
2026-09-08 12:39:03 +05:30
Ashish Sharma 62db6dd513 test(sha): add test cases for the esp_sm3 API 2026-09-04 14:26:23 +08:00
Ashish Sharma 8956f3b86c feat(sha): add sha_hal_is_sm3_supported()
Report whether the SHA peripheral can run the SM3 mode. The LL function
sha_ll_is_sm3_supported() exists on every chip. ESP32-S31 reads the
DIS_SM_CRYPT eFuse, which disables SM2 and SM3 permanently. ESP32-C5 and
ESP32-H4 have SM3 but no such eFuse. All other chips have no SM3.
2026-09-04 14:26:23 +08:00
nilesh.kale 7f413c914d feat(sha): add SM3 hardware support
Enable hardware SM3 digest support on ESP32-H4, ESP32-S31 and ESP32-C5
via the SHA peripheral (mode 14).
2026-09-04 11:24:39 +08:00
gaoxu b2f50ca225 fix(rng): fix NIST hanged beacuse RNG health test uncompleted 2026-08-24 17:10:04 +08:00
harshal.patil 6fe4f4f174 fix(mbedtls/aes): fix ESP32-S2 Crypto DMA stall on PSRAM output with partial blocks
The ESP32-S2 Crypto DMA in-channel stalls silently when a receive
descriptor list transitions from external to internal RAM. The AES
driver hits this when a PSRAM-output operation has a trailing partial
block, as the internal stream descriptor is linked after the external
RAM data descriptors.

- esp_aes_process_dma(): process the block-aligned part and the partial
  block as two separate DMA operations, keeping each descriptor list
  uniform
- crypto_dma_ll_reset(): also reset the in-channel (per the TRM receive
  reset sequence), otherwise stale state from a preceding external-RAM
  operation corrupts the next operation's output

The GCM DMA path is unaffected; it never operates on PSRAM buffers.
2026-08-19 11:27:42 +05:30
Renz Bagaporo a91a316449 ci(ulp): re-enable legacy ULP buildv2 jobs 2026-07-29 13:08:22 +09:00
Alexey Lapshin 77420a6f78 Merge branch 'feature/use_zcmp_by_default' into 'master'
feat(build): add ZCMP workaround post-build check

See merge request espressif/esp-idf!49764
2026-07-28 14:00:37 +04:00
Wu Zheng Hui aac7f7ea47 Merge branch 'feat/support_esp32s31_clock_tree_management' into 'master'
feat: support esp32s31 clock tree management

Closes PM-630

See merge request espressif/esp-idf!48934
2026-07-24 20:11:45 +08:00
harshal.patil a7b29bfda9 change(security): disable Key Manager support on ESP32-C5/P4/S31
The Key Manager hardware peripheral in its current form needs further
design changes before it can be offered as a production feature.
Until a revised peripheral design is available, withdraw ESP-IDF
support for it on all Key Manager capable targets.
2026-07-22 19:58:23 +05:30
wuzhenghui a04dc898db feat(esp_security): support s31 security clock management 2026-07-22 16:32:45 +08:00
Alexey Lapshin 631ad9033c feat(build): add RISC-V ZCMP post-link workaround check
Validate linked RISC-V executables when
CONFIG_COMPILER_ENABLE_RISCV_ZCMP is enabled on affected chips.
Disassemble each function and reject mstatus.MIE clears that lack an
earlier mintthresh write of 0xff.

Handle csrrci, csrrw, and register-mask csrrc patterns while ignoring
csrrs. Add build-only coverage for valid and invalid sequences with
CMake v1 and v2.

Stop the hardware stack guard before switching stacks during restart,
and keep ZCMP disabled for TEE test apps that still require the
workaround.
2026-07-22 13:04:20 +07:00
Renz Bagaporo 5b67ff37cd ci(ulp): temporarily disable legacy ULP apps for buildv2
Keep legacy ULP apps on the CMake v1 build path while buildv2 coverage
is limited to full_subproject ULP apps.

Also add the missing esp_driver_gpio dependency to the esp_pm test app
so buildv2 dependency checks see driver/rtc_io.h explicitly.
2026-07-15 10:17:52 +09:00
Laukik Hase 5dce8db8fe ci(hal): Extend the PMS HAL test app to verify the MSPI PMS (flash) protection 2026-07-10 13:13:10 +05:30
nilesh.kale ec6921b9df feat: enable AES GCM support for ESP32-S31 2026-07-06 11:51:05 +05:30
Ashish Sharma 440dd3b52a fix(esp_hal_security): clamp tag_len in aes_hal_gcm_read_tag to prevent OOB 2026-07-03 17:19:05 +08:00
harshal.patil f68bc1ba9f fix(secure_boot): range-check ECDSA r,s in bootloader before ROM verify 2026-06-12 14:38:47 +05:30
Harshal Patil a5591852c5 Merge branch 'fix/remove_nonexistent_crypto_registers_c61' into 'master'
Remove non-existent crypto registers (ESP32-C61)

See merge request espressif/esp-idf!49241
2026-06-09 18:16:01 +05:30
harshal.patil 81ffe04323 fix(soc): Remove non-existent crypto registers (ESP32-C61) 2026-06-09 13:33:25 +05:30
harshal.patil f9642ccad4 test(esp_hal_security): warm up ECC const-time loop before measuring 2026-06-09 10:59:12 +05:30
harshal.patil 554cce6937 fix(mbedtls): validate ECDSA signature range and harden ECC memory power-down 2026-06-09 10:59:11 +05:30
Konstantin Kondrashov 7dab1d313e Merge branch 'feature/efuse_esp32h21' into 'master'
feat(efuse): Update efuse table for ESP32H21

Closes IDF-11556

See merge request espressif/esp-idf!48762
2026-05-22 09:39:18 +03:00
Konstantin Kondrashov f870ed9d61 feat(efuse): Update efuse table for ESP32H21 2026-05-21 16:29:09 +03:00
Laukik Hase 4c39f0d006 ci(hal): Extend support for ESP32-P4 for the PMS HAL test-app 2026-05-21 13:42:18 +05:30
Laukik Hase 3acb4a3e0c refactor(hal): Refactor and update the ESP32-P4 APM LL/HAL APIs 2026-05-21 12:15:50 +05:30
nilesh.kale 34e24e1ed3 fix: disable Key Manager and ECDSA TRNG tests for S31 temporarily 2026-05-20 10:17:34 +05:30
nilesh.kale a530aab0a6 feat: enable key manager and HUK support for S31 2026-05-20 10:17:34 +05:30
Aditya PatwardhanandNilesh Kale e1d429ba30 feat(hal): add ECDSA low-level driver for esp32s31
Co-authored-by: Nilesh Kale <nilesh.kale@espressif.com>
2026-05-20 10:17:34 +05:30
Aditya PatwardhanandNilesh Kale e9a9091b59 feat(hal): add HMAC and Digital Signature support for esp32s31
Co-authored-by: Nilesh Kale <nilesh.kale@espressif.com>
2026-05-20 10:17:34 +05:30
nilesh.kale f400c78d42 feat(hal): enable ecdsa support in esp32h4 2026-05-12 15:26:17 +05:30
nilesh.kale b9a394e75e feat(hal): enabled ecc p-384 support for esp32h4 2026-05-12 15:19:32 +05:30
muhaidong 14e964c0fa fix(esp_security): fix ECDH1 key manager multi-stage helper 2026-05-11 12:03:17 +05:30
Mahavir Jain bc8db060f1 Merge branch 'feat/key_manager_ecdh1_key_deployment_mode' into 'master'
Key Manager ECDH1 key deployment mode

Closes IDF-15582

See merge request espressif/esp-idf!47988
2026-05-11 09:03:10 +05:30
harshal.patil 9aba184c43 feat(esp_security): add ECDH1 deployment mode to Key Manager driver 2026-04-30 09:29:40 +05:30
harshal.patil 8ce8d8919b fix(esp_security): Enable ECC clock while using the Key Manager's ECDH key deployment mode 2026-04-30 09:17:31 +05:30
harshal.patil 8bfc4f7255 fix(esp_security): guard key manager APIs against unsupported chip revs
On ESP32-P4 rev < 3.0, Key Manager is software-disabled, but the public
esp_key_mgr.h APIs had no runtime check.
Calls using HMAC/DS/PSRAM key types fell through to
HAL_ASSERT("Unsupported ...") paths in key_mgr_ll.h. Gate
each public API with key_mgr_ll_is_supported() and return
ESP_ERR_NOT_SUPPORTED cleanly instead.
2026-04-27 15:18:34 +05:30
Mahavir Jain 80116d4e07 Merge branch 'feat/add_hmac_support_for_esp32h4' into 'master'
feat: added support for HMAC in ESP32H4

Closes IDF-12257

See merge request espressif/esp-idf!44647
2026-04-15 15:18:03 +05:30
Aditya PatwardhanandNilesh Kale bfd3e191bc feat: enable AES, SHA, RSA and ECC support for ESP32S31
Co-authored-by: Nilesh Kale <nilesh.kale@espressif.com>
2026-04-13 10:20:44 +05:30
nilesh.kale b3243dc6de feat: enable HMAC peripheral support for ESP32-H4 2026-04-09 14:29:57 +05:30
harshal.patil ccc48c3980 fix(esp_security): Fixes incorrect key manager configuration for ESP32-P4 rev < 3 2026-03-24 15:23:23 +05:30
Ashish Sharma dc7843b954 fix(esp_hal_security): fixes failing hmac_hal_configure with efuse_key for p4 rev < 3
Closes https://github.com/espressif/esp-idf/issues/18370
2026-03-24 15:23:23 +05:30
Chen Jichang f3feaeabb6 fix(lp_dma): add lp dma clk ctrl on s31 2026-03-23 16:40:47 +08:00
harshal.patil 0db717b9ec feat(esp_ds): Support using the AES key used by DS peripheral for encrypting params 2026-03-20 11:15:23 +05:30
harshal.patil 5f647c0ba3 docs(key-manager): Add Key-Manager peripheral related documentation 2026-03-18 16:27:39 +05:30
Evgeny Torbin d0f062c018 ci: remove unused test cases 2026-03-12 12:02:10 +01:00
Laukik Hase 99f6d7cd56 ci(hal): Enable the TEE-based interrupt test-cases for ESP32-P4 2026-02-18 11:46:15 +05:30
Chen Chen eeb24057c4 refactor(hal): graduate systimer hal driver into esp_hal_systimer 2026-02-06 18:08:57 +08:00
Ashish Sharma e06a7dd791 feat: adds new Kconfig variable for DS peripheral 2026-02-05 10:12:25 +08:00
Ashish Sharma 1d185a6548 feat: adds PSA DS driver support 2026-02-05 10:12:25 +08:00