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Author SHA1 Message Date
Omar Chebib 35ec172eaf fix(esp_system): fix a typo in the comments 2026-04-27 10:43:53 +08:00
Omar Chebib 3fa48d628a fix(esp_system): prevent .eh_frame-based unwinding from looping indefinitely 2026-01-26 11:51:32 +08:00
Omar Chebib c4c458447b fix(esp_system): fix potential warnings related to array size in .eh_frame parser 2025-11-05 13:52:30 +08:00
Omar Chebib 59eae71414 fix(esp_hw_support): fix a bug in the interrupt allocator related to shared interrupts 
On RISC-V targets, when allocating a shared interrupt, the provided level would
override the current level of the allocated interrupt. As such, a medium level
interrupt could become a low level one and vice versa.
 2025-07-01 13:49:26 +08:00
Omar Chebib 9a3fa8be12 fix(esp_hw_support): clear the memory protection interrupt status on boot 
Fixes https://github.com/espressif/esp-idf/issues/15359
 2025-06-17 16:50:21 +08:00
Omar Chebib 67b64ce555 fix(esp_system): fix RTC reserved area alignment in the linker script 
Make sure the size of the RTC reserved area complies with the alignment requirement.

Closes https://github.com/espressif/esp-idf/issues/13082
 2025-06-17 16:50:10 +08:00
Omar Chebib 8943314799 fix(freertos): optimize HWLP context switch by disabling it when unused 2025-05-15 15:48:45 +08:00
Omar Chebib acd976161f fix(freertos): workaround a hardware bug related to HWLP coprocessor 
This commit manually sets the HWLP context to dirty when a Task that needs it is scheduled it.
 2025-05-15 15:48:45 +08:00
Omar Chebib 7721dd5d5d fix(ulp): fix ULP RISC-V interrupt handler corrupting the stack 
* Closes https://github.com/espressif/esp-idf/issues/14930
 2025-03-10 18:07:26 +08:00
Omar Chebib 105588b113 fix(esp_system): add missing arrays attribute in the ESP32-P4 linker script 2025-03-03 14:21:17 +08:00
Omar Chebib 9b0b5b4613 fix(examples): fix NMI interrupt example to work on ESP32-S3 2025-02-26 10:06:44 +08:00
Omar Chebib 209cfa313b fix(esp_hw_support): make the NMI interrupts available for the main application 
Closes https://github.com/espressif/esp-idf/issues/13629

NMI interrupt level has been freed for all the Xtensa targets, making it possible
for the main application to use it. An example has been added to show how to
proceed.
 2025-02-26 10:06:44 +08:00
Omar Chebib 24fd631d97 fix(freertos): fix a bug in prvTaskDeleteWithCaps related to coprocessors 
When a coprocessor is used, the stack pointer is altered. It must be restored
before freeing the memory allocated to the task.
 2025-02-20 15:40:01 +08:00
Omar Chebib d902ed146c fix(esp_psram): fix a bug in PSRAM heap registration 
This commit fixes a bug in the PSRAM heap initialization that didn't take into
account the reserved himem area when registering the PSRAM virtual space as a heap.
 2024-11-14 19:11:20 +08:00
Omar Chebib 9d0c888bec fix(esp_hw_support): allow allocating interrupts with handlers in ROM with IRAM attribute 
The interrupt allocator now allows allocating an interrupt with a handler in ROM
and flags set to ESP_INTR_FLAG_IRAM
 2024-10-16 09:36:09 +08:00
Omar Chebib 99b30023f8 fix(ldgen): fix linker script generation from a single-entry fragment file 2024-08-27 11:41:07 +08:00
Omar Chebib dce5170cdb fix(riscv): fix a that affected mintstatus CSR value in the CLIC 2024-07-26 13:57:14 +08:00
Omar Chebib 0928ff027b fix(riscv): make HWLP feature use direct saving of lazy saving 2024-05-22 16:58:31 +08:00
Omar Chebib 6eba7a536a feat(riscv): add support for PIE coprocessor and HWLP feature 
FreeRTOS tasks may now freely use the PIE coprocessor and HWLP feature.
Just like the FPU, usiing these coprocessors result in the task being pinned
to the core it is currently running on.
 2024-05-22 16:58:31 +08:00
Omar Chebib faf0ea8702 Merge branch 'fix/interrupt_source_c5_beta3' into 'master' 
fix(esp32c5): fix interrupt sources number for the Beta3 version

See merge request espressif/esp-idf!30271
 2024-04-17 10:11:15 +08:00
Omar Chebib f39b3099f6 fix(esp32c5): fix interrupt sources number for the Beta3 version 2024-04-16 18:17:00 +08:00
Omar Chebib 007a626049 Merge branch 'fix/esp32c5_interrupt_support' into 'master' 
fix(esp32c5): add CLIC interrupt controller support for the ESP32-C5 (Beta3 & MP)

Closes IDF-8654 and IDF-8655

See merge request espressif/esp-idf!30017
 2024-04-16 16:35:49 +08:00
Omar Chebib f6e935e013 fix(esp32c5): add CLIC interrupt controller support for the ESP32-C5 2024-04-16 10:38:14 +08:00
Omar Chebib 91bdbc1708 Merge branch 'fix/esp32p4_l2_cache_configured_from_flash' into 'master' 
fix(spi_flash): fix a bug where L2 cache was configured from flash on the ESP32-P4

Closes IDF-9681

See merge request espressif/esp-idf!30189
 2024-04-15 16:32:22 +08:00
Omar Chebib 6f888390ab fix(spi_flash): fix a bug where l2 cache was configured from flash 2024-04-15 13:55:38 +08:00
Omar Chebib 1683e9a92c Merge branch 'fix/unused_interrupts' into 'master' 
fix(esp_hw_ ‎support): clear reserved interrupts that are unused or not applicable anymore

Closes IDF-7821 and IDF-9428

See merge request espressif/esp-idf!29639
 2024-03-28 11:27:20 +08:00
Omar Chebib a79c6f7f67 fix(esp_hw_support): clear reserved interrupts that are not applicable for each target 2024-03-27 16:21:25 +08:00
Omar Chebib 793ca6d7a4 fix(i2c): fix issues related to timeout and alive interval tick 
Fixes https://github.com/espressif/esp-idf/issues/4999

Former usage of I2C_CMD_ALIVE_INTERVAL_TICK macro overrode the ticks_to_wait
parameter when the latter was too big
 2024-03-14 16:39:10 +08:00
Omar Chebib 67a2d48940 Merge branch 'bugfix/coredump_switch_stack' into 'master' 
fix(espcoredump): Reconfigure the stack guard when using custom coredump stack

See merge request espressif/esp-idf!29355
 2024-03-08 19:30:42 +08:00
Omar Chebib 9046bf1645 fix(espcoredump): Reconfigure the stack guard when using custom coredump stack 2024-03-08 17:25:42 +08:00
Omar Chebib eeb5e2f080 Merge branch 'refactor/cpu_interrupt_table' into 'master' 
refactor(Core System/Interrupts): changed reserved interrupt functions to be now defined per SoC

Closes IDF-5728

See merge request espressif/esp-idf!29020
 2024-03-06 11:26:17 +08:00
Omar Chebib c1849df791 refactor(esp_hw_support): changed reserved interrupt functions to be now defined per SoC 2024-02-28 15:21:10 +08:00
Omar Chebib 345bf79b4e Merge branch 'bugfix/esp32p4_remove_fence' into 'master' 
fix(riscv): Remove the memory barrier when changing interrupt threshold

Closes IDF-7898

See merge request espressif/esp-idf!29119
 2024-02-21 10:49:18 +08:00
Omar Chebib 2217854092 fix(riscv): Remove the memory barrier when changing interrupt threshold 2024-02-20 12:19:08 +08:00
Omar Chebib 6d045937d3 Merge branch 'feat/ulp_add_cycle_function' into 'master' 
feat(lp_core): add a public function to get the timer cycle count

Closes IDFGH-12036

See merge request espressif/esp-idf!28910
 2024-02-12 14:19:17 +08:00
Omar Chebib 5a32ca10ad feat(lp_core): add a public function to get the timer cycle count 
Closes https://github.com/espressif/esp-idf/issues/13101
 2024-02-09 16:50:02 +08:00
Omar Chebib 75eb489105 fix(bootloader): add legacy retained memory CRC calculation 
* Closes https://github.com/espressif/esp-idf/issues/12849

In former versions of ESP-IDF, the user custom memory data in the retained memory
was taken into account during the CRC calculation. This was changed in a later
commit, the custom memory was ignored, therefore this can seen as a breaking change.
This commit gives the possibility to choose between the former (legacy) or
new way of calculating the CRC.
 2024-02-09 16:49:56 +08:00
Omar Chebib 0db3268713 Merge branch 'bugfix/soft_uart_send_dummy_byte' into 'master' 
fix(Peripheral Drivers/Dedicated GPIO): Remove dummy byte from the emulate_uart_send routine

See merge request espressif/esp-idf!28627
 2024-01-24 10:38:12 +08:00
Omar Chebib 8ad898c8ab fix(peripheral_drivers/dedicated_gpio): Remove dummy byte from the emulate_uart_send routine 
Let the user application decide for when to send the dummy byte instead of
hardcoding it from the assembly routine.
 2024-01-23 15:59:13 +08:00
Omar Chebib cdde05335e Merge branch 'refactor/riscv_interrupt' into 'master' 
refactor(riscv): Refactor crosscore interrupts and core interrupt code

Closes IDF-5720, DOC-5177, and IDF-7899

See merge request espressif/esp-idf!27845
 2024-01-19 10:51:04 +08:00
Omar Chebib 0d9d004d00 Merge branch 'doc/esp32p4_intr_alloc' into 'master' 
docs(soc): add a few details in the `intr_alloc` documentation for the ESP32-P4

Closes IDF-8781

See merge request espressif/esp-idf!28249
 2024-01-19 10:50:42 +08:00
Omar Chebib 71e7f175ff Merge branch 'bugfix/stack_watermark_fpu_esp32p4' into 'master' 
fix(riscv): adjust TCBs lowest stack address when the FPU is used

Closes IDF-8995 and IDF-8423

See merge request espressif/esp-idf!28429
 2024-01-19 10:04:29 +08:00
Omar Chebib 102d5bbf72 refactor(riscv): added a new API for the interrupts 2024-01-18 16:36:53 +08:00
Omar Chebib 5cdf145f55 refactor(riscv): refactor crosscore interrupt 2024-01-18 16:27:36 +08:00
Omar Chebib c7e63078b7 fix(riscv): adjust TCBs lowest stack address when the FPU is used 2024-01-18 13:06:29 +08:00
Omar Chebib 9a6791b79d docs(soc): add a few details in the intr_alloc documentation for the ESP32-P4 2024-01-04 11:21:56 +08:00
Omar Chebib 227c5d2cb7 Merge branch 'bugfix/freertos_task_noaffinity_print' into 'master' 
fix(freertos): display tasks with no affinity as -1 during tracing

Closes IDFGH-11759

See merge request espressif/esp-idf!28073
 2023-12-26 10:11:31 +08:00
Omar Chebib 1472343439 fix(freertos): display tasks with no affinity as -1 during tracing 
Closes https://github.com/espressif/esp-idf/issues/12858
 2023-12-22 12:11:30 +08:00
Omar Chebib f27d65c7bc Merge branch 'contrib/github_pr_12852' into 'master' 
cmake: correct the parameter annotation of idf_build_set_property (GitHub PR)

Closes IDFGH-11752

See merge request espressif/esp-idf!28067
 2023-12-22 10:41:24 +08:00
Omar Chebib dc8fdae31b docs(freertos): revert usage of hidden option CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE when :ref: is used 2023-11-30 16:33:28 +08:00
Omar Chebib ca1a0bdc59 Merge branch 'bugfix/esp32p4_fpu_check' into 'master' 
fix(riscv): fix a bug in FPU exception handling

See merge request espressif/esp-idf!27045
 2023-11-15 17:19:55 +08:00
Omar Chebib e56f5b15cc fix(riscv): fix a bug in FPU exception handling 
On the ESP32-P4, it is possible to have an exception because of an FPU instruction
while EXT_ILL CSR is not zero and its FPU bit is not set.
 2023-11-14 06:55:08 +00:00
Omar Chebib ff2a492002 Merge branch 'staging/espcoredump_move_strings_flash' into 'master' 
change(espcoredump): save RAM space by placing constants in flash

See merge request espressif/esp-idf!26872
 2023-11-03 12:20:25 +08:00
Omar Chebib 342535f47c Merge branch 'contrib/github_pr_12105' into 'master' 
feat(espcoredump): Support for not overwriting existing core dump in flash (GitHub PR)

Closes IDFGH-10907

See merge request espressif/esp-idf!26865
 2023-11-03 10:51:39 +08:00
Omar Chebib 8ac4b48b2f change(espcoredump): save RAM space by placing constants in flash 
All the log messages of espcoredump component used to be in DRAM, which would
lower the available RAM space for the user application. Since the cache is always
enabled after an exception, constants can be put in flash.
 2023-11-02 19:09:57 +08:00
Omar Chebib 51434a8367 Merge branch 'feature/esp32p4_fpu_support' into 'master' 
feat(riscv): implement FPU support for RISC-V targets

Closes IDF-7770

See merge request espressif/esp-idf!25871
 2023-10-23 16:50:36 +08:00
Omar Chebib a8b1475fe7 feat(riscv): implement coprocessors save area and FPU support 
This commit mainly targets the ESP32-P4. It adds supports for coprocessors on
RISC-V based targets. The coprocessor save area, describing the used coprocessors
is stored at the end of the stack of each task (highest address) whereas each
coprocessor save area is allocated at the beginning of the task (lowest address).
The context of each coprocessor is saved lazily, by the task that want to use it.
 2023-10-23 11:10:28 +08:00
Omar Chebib d3afca3020 Merge branch 'fix/esp32p4_supports_interrupts' into 'master' 
feat(riscv): Add support to ESP32-P4's CLIC interrupt controller

Closes IDF-7795 and IDF-7793

See merge request espressif/esp-idf!25383
 2023-09-01 11:48:39 +08:00
Omar Chebib 8ca191e4c1 fix(esp32p4): Fixed interrupt handling to use the CLIC controller 2023-08-31 12:16:08 +08:00
Omar Chebib 3bf829a157 Merge branch 'feature/esp32c3_opencores_ethernet_support' into 'master' 
feat(esp_eth): add opencores ethernet support for ESP32-C3 (QEMU) target

See merge request espressif/esp-idf!25487
 2023-08-28 11:16:26 +08:00
Omar Chebib 3e9d2155eb feat(esp_eth): add opencores ethernet support for ESP32-C3 (QEMU) target 2023-08-24 10:32:46 +08:00
Omar Chebib 0368aa5257 Merge branch 'feature/bootloader_ignore_extra_component' into 'master' 
bootloader: add the possibility to ignore extra components

Closes IDF-7825

See merge request espressif/esp-idf!24806
 2023-08-02 10:28:41 +08:00
Omar Chebib 7b5c0fb96b ci(build_system): add a test case for bootloader override 2023-07-28 15:04:21 +08:00
Omar Chebib c98d1f1619 feat(bootloader): add the possibility to ignore extra components 2023-07-28 15:04:21 +08:00
Omar Chebib d2471b11e7 Merge branch 'bugfix/fpu_registers_overwritten' into 'master' 
Xtensa: fix a bug that altered CPU registers in FPU exception handlers

Closes IDFGH-10439

See merge request espressif/esp-idf!24518
 2023-07-05 17:28:53 +08:00
Omar Chebib 2aee63a773 freertos: add a unit test for FPU context switch 2023-07-04 02:45:56 +00:00
Omar Chebib b03c8912c7 Xtensa: fix a bug that altered CPU registers in FPU exception handlers 
* Fixes https://github.com/espressif/esp-idf/issues/11690
 2023-07-04 02:45:56 +00:00
Omar Chebib eeaa40f71d System: implement libunwind library for RISC-V backtracing 
Closes https://github.com/espressif/esp-idf/issues/7866

A minimal x86 implementation has also been added, it is used to perform a host test.
 2023-05-15 11:19:03 +08:00
Omar Chebib 74d87aef0c Merge branch 'feature/dedicated_gpios_xtensa' into 'master' 
Dedicated GPIO: add software UART implementation for Xtensa targets

See merge request espressif/esp-idf!21918
 2023-05-04 12:49:27 +08:00
Omar Chebib 3bc3f87209 Merge branch 'bugfix/i2c_timing_wrong' into 'master' 
i2c: fix a bug in sda sample timing

Closes IDFGH-8295

See merge request espressif/esp-idf!23185
 2023-04-17 15:00:42 +08:00
Omar Chebib 801f934ac9 Dedicated GPIO: add software UART implementation for Xtensa targets 
The software UART example is now compatible with Xtensa targets that have dedicated GPIOs. In other words, this example is now compatible with ESP32-S2 and ESP32-S3.
 2023-04-14 15:31:34 +08:00
Omar Chebib a0f8434f93 i2c: fix a bug in sda sample timing 
* Closes https://github.com/espressif/esp-idf/issues/9777

This bug prevented SCL line to work properly after a NACK was received in master mode.
 2023-04-13 14:37:44 +08:00
Omar Chebib 2f4c32afac Apply 1 suggestion(s) to 1 file(s) 2023-03-13 14:47:09 +08:00
Omar Chebib 0fa63be9d1 Merge branch 'bugfix/fix_psram_kconfig_help' into 'master' 
psram: removed deprecated statement about coredump and external BSS

See merge request espressif/esp-idf!22561
 2023-03-08 13:31:53 +08:00
Omar Chebib 9852cb49f7 psram: removed deprecated statement about coredump and external BSS 2023-03-07 05:59:08 +00:00
Omar Chebib d55060d184 Merge branch 'staging/rename_twdt_config_examples' into 'master' 
TWDT: Use the new TWDT Kconfig options in the examples and tests

See merge request espressif/esp-idf!20363
 2023-02-20 10:42:23 +08:00
Omar Chebib 5e5343d429 TWDT: Use the new TWDT Kconfig options in the examples and tests 2023-02-17 11:22:25 +08:00
Omar Chebib 5eb8defb30 Merge branch 'staging/coredump_extram_support' into 'master' 
coredump: enable support for stacks in external RAM

Closes IDF-5497 and IDF-2391

See merge request espressif/esp-idf!21067
 2022-12-26 17:52:41 +08:00
Omar Chebib 835263e50a Coredump: add a test to check that coredump supports stacks in SPIRAM 2022-12-22 12:47:22 +01:00
Omar Chebib 42b2169542 coredump: add support for stacks in external RAM 
Tasks having their stacks in SPIRAM can now be part of the coredump written to flash
 2022-12-22 12:47:22 +01:00
Omar Chebib 1ff8a68c21 Merge branch 'bugfix/support_coredump_stack_xtensa' into 'master' 
coredump: custom core dump stack is now supported on Xtensa targets

See merge request espressif/esp-idf!21335
 2022-12-19 18:02:15 +08:00
Omar Chebib 301cb74890 coredump: custom core dump stack is now supported on Xtensa targets 2022-12-02 12:01:19 +08:00
Omar Chebib 7baa63cbc2 Merge branch 'staging/asm_dedic_gpio_example' into 'master' 
Dedicated/Fast GPIO: add examples implementing software I2C, UART and SPI on RISC-V targets

Closes IDF-5936

See merge request espressif/esp-idf!20921
 2022-11-23 14:19:01 +08:00
Omar Chebib d965b7fdec Merge branch 'staging/esp_static_assert' into 'master' 
C/Cxx: Static assertions are now unified

Closes IDFGH-8479

See merge request espressif/esp-idf!20569
 2022-11-22 17:04:02 +08:00
Omar Chebib 623bffaab8 Dedicated GPIO: add examples implementing software I2C, UART and SPI on RISC-V targets. 
Use dedicated GPIOs in examples to show how to emulate a UART, I2C and SPI bus.
(Using assembly and C)
 2022-11-22 14:17:40 +08:00
Omar Chebib 43c03d95a4 CI: check_public_headers script will detect the use of static asserts in headers 
When a public header contains _Static_assert or static_assert, check_public_headers.py script will detect it and report it as an issue.
Indeed, public headers shall now use ESP_STATIC_ASSERT.
 2022-11-21 16:18:13 +08:00
Omar Chebib cd21058097 C/Cxx: unify static assertions with the macro ESP_STATIC_ASSERT 
Closes https://github.com/espressif/esp-idf/issues/9938
 2022-11-21 16:18:08 +08:00
Omar Chebib 54954518b1 Merge branch 'staging/riscv_wrapper_freertos_tasks' into 'master' 
RISC-V: Create a wrapper around FreeRTOS Tasks to detect the ones returning

Closes IDF-4662

See merge request espressif/esp-idf!20845
 2022-11-21 12:14:34 +08:00
Omar Chebib 6fe563163c RISC-V: fix PC not saved when using backtrace 2022-11-18 15:07:38 +08:00
Omar Chebib d580f6b076 RISC-V: Create a wrapper around FreeRTOS Tasks to detect the ones returning 2022-11-18 15:07:32 +08:00
Omar Chebib 69d80b200c Merge branch 'bugfix/xtensa_freertos_16B_aligned' into 'master' 
FreeRTOS: Make the default stack alignment 16 for Xtensa

Closes IDF-3604

See merge request espressif/esp-idf!21040
 2022-11-14 10:53:10 +08:00
Omar Chebib bcb8516744 FreeRTOS: Make the default stack alignment 16 for Xtensa 2022-11-11 19:31:20 +08:00
Omar Chebib 65ecbb1b9b Merge branch 'contrib/github_pr_10027' into 'master' 
[Panic] also print to secondary USB Serial/JTAG Console (GitHub PR)

Closes IDFGH-8578

See merge request espressif/esp-idf!20827
 2022-10-28 12:04:36 +08:00
Omar Chebib 009d15e59d Merge branch 'staging/esp_timer_restart' into 'master' 
esp_timer: add a function to restart timers

See merge request espressif/esp-idf!20386
 2022-10-26 16:37:33 +08:00
Omar Chebib 8e9b1e8a7a Merge branch 'bugfix/bt_bss_wrong_address' into 'master' 
Bluetooth: fix BSS placement in the linker script generated by ldgen

Closes BT-2883

See merge request espressif/esp-idf!20749
 2022-10-25 16:34:30 +08:00
Omar Chebib 950981906b Bluetooth: fix BSS placement in the linker script generated by ldgen 2022-10-24 16:37:30 +08:00
Omar Chebib c8614a0dbf esp_timer: add a function to restart timer 
Timers, periodic or not, can now be restarted thanks to esp_timer_restart function.
This is done atomically, which can be used to feed a periodic timer, or simply change the period.
 2022-10-18 04:42:27 +00:00
Omar Chebib dd7fde8799 Merge branch 'contrib/github_pr_9095' into 'master' 
Update uart_events_example_main.c (GitHub PR)

Closes IDFGH-7532

See merge request espressif/esp-idf!18391
 2022-09-21 19:51:37 +08:00
Omar Chebib 4f1a9e436e Merge branch 'feature/add_int_task_wdt_esp32c2' into 'master' 
WDT: implement interrupt wdt and task wdt for ESP32-C2

Closes IDF-4035, IDF-4205, and IDF-5055

See merge request espressif/esp-idf!18918
 2022-09-16 10:43:34 +08:00
Omar Chebib 79598b1db7 Flash: fix flash_suspend example to include worst case 
flash_suspend example will now test the worst case in order to be able
to detect real regression:
- shorter response time is acceptable, as the tested function may be in the cache already
- response time longer than 120us will be considered a potential regression
 2022-09-15 14:37:59 +08:00