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55,259 Commits 25 Branches 192 Tags
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359 Commits
Author SHA1 Message Date
Alexey Lapshin 913d38ba14 fix(newlib): fix CONFIG_LIBC_OPTIMIZED_MISALIGNED_ACCESS for c2/c3/c6/h2/h21 
PMP configurations for load and store addresses may
have different permissions (e.g., "R" vs. "RW").

Due to the timing alignment of internal signals, the address
permission check may be incorrectly applied during the second
part of a misaligned access transaction.

As a workaround, insert two instructions (e.g. ADDI/NOP) between
accessing to different memory regions. This spacing avoids the
false permission check caused by signal timing overlap.
 2025-08-22 13:46:43 +08:00
morris 83512e3e7c feat(sdm): enhance the thread safety 2025-08-11 10:13:57 +08:00
Song Ruo Jing 6bfdc93593 feat(uart): add DTR and DSR signals support for UART 2025-08-05 16:45:46 +08:00
Gao Xu 819970f439 Merge branch 'fix/correct_adc_periph_num_on_c2' into 'master' 
fix(adc): fix ESP32-C2/P4 wrong adc periph num

See merge request espressif/esp-idf!40542
 2025-08-03 14:45:23 +08:00
Song Ruo Jing 48233e0e7e refactor(ledc): remove deprecated LEDC_USE_RTC8M_CLK macro for v6.0 2025-07-30 20:01:47 +08:00
Song Ruo Jing f61e780f60 refactor(clk): deprecate rtc_cal_sel_t enum 2025-07-30 20:01:46 +08:00
Song Ruo Jing 2b01b7c6f8 refactor(clk): add soc_clk_calibration_clk_src_t for all targets 
Cleaned up RTC calibration clock selection code
 2025-07-30 20:01:46 +08:00
morris 0296c30908 feat(soc): introduce the soc_caps_full.h for internal use only 2025-07-17 10:33:08 +08:00
gaoxu bc84e7fc99 fix(adc): fix wrong adc periph num on C2/P4 2025-07-14 08:33:18 +08:00
Song Ruo Jing 28df79aee8 feat(clk): Add basic clock support for esp32h4 2025-07-10 16:35:53 +08:00
Armando (Dou Yiwen) 02be119399 Merge branch 'fix/fix_c3_c2_cache_freeze_soc_caps_issue' into 'master' 
cache: fixed SOC_CACHE_FREEZE_SUPPORTED not defined on C3 / C2 issue

See merge request espressif/esp-idf!39881
 2025-06-17 03:15:07 +00:00
Song Ruo Jing 6d293c8582 feat(clk): Add basic clock support for esp32h21 2025-06-16 15:05:32 +08:00
armando 1c5cadea13 fix(cache): fixed SOC_CACHE_FREEZE_SUPPORTED not defined on c3/c2 issue 2025-06-16 13:13:22 +08:00
Song Ruo Jing 8262915e28 refactor(regi2c): remove regi2c_defs.h from some targets 2025-05-19 21:46:40 +08:00
Yuan Yu 9a109ca17c fix(peripherals): Correct typo in periph_inttrput_t 
Corrected the typo in the type name from 'periph_inttrput_t' to 'periph_interrupt_t'.
 2025-05-15 18:40:57 +08:00
wanckl 51873d46aa feat(driver_spi): add h21 spi drivers supports 2025-04-03 11:27:29 +08:00
wuzhenghui dc93eb533a fix(esp_hw_support): add timer wakeup sleep duration check 
Closes https://github.com/espressif/esp-idf/issues/15255
 2025-02-07 19:43:54 +08:00
Igor Udot 5f37de2889 Merge branch 'feat/lp-uart-wakeup-mode3' into 'master' 
Added support for UART wakeup modes

Closes IDF-10202

See merge request espressif/esp-idf!31965
 2025-02-06 11:15:37 +08:00
igor.udot f742a05b28 feat: supports lp uart wakeup 2025-02-05 14:54:48 +08:00
Mahavir Jain c97b63db32 Merge branch 'fix/rng_register_prefix_discrepency_older_targets' into 'master' 
fix(soc): Add the unavailable TRM mentioned RNG_DATA_REG register for C2 and C3

Closes DOC-5138 and DOC-5135

See merge request espressif/esp-idf!36602
 2025-01-29 12:51:54 +08:00
harshal.patil 21c11caf70 fix(soc): Add the unavailable TRM mentioned RNG_DATA_REG register for C2 and C3 2025-01-24 10:50:05 +05:30
Brett Regnier 01abdcbe43 change(soc): Fix spelling mistake in soc/interrupts.h 
Merges https://github.com/espressif/esp-idf/pull/15273
Closes https://github.com/espressif/esp-idf/issues/15272
 2025-01-24 10:46:47 +08:00
Marius Vikhammer 267a8776a0 feat(intr): clean up and support interrupts on H21 2025-01-20 15:10:30 +08:00
morris 24272610b2 refactor(soc): reformat code with astyle 2024-11-22 11:09:38 +08:00
Song Ruo Jing 92ed77933b refactor(clk): deprecate SOC_RTC_FAST_CLK_SRC_XTAL_DIV 2024-11-04 12:37:17 +08:00
Song Ruo Jing 4a90deb227 feat(ledc): support ledc sleep mode selection 
Support LEDC sleep retention on C6/H2/P4
 2024-10-22 17:54:32 +08:00
laokaiyao fa8d73861b refactor(soc): sort esp32c2 soc headers 2024-10-12 09:43:41 +08:00
wanckl 19c6e77a31 fix(mspi): collect mspi iomux pin macro from iomux_reg.h to spi_pins.h 2024-09-03 13:55:00 +08:00
wanckl 473f39c31f fix(driver_spi): move macro GPIO_MATRIX_DELAY_NS out from soc.h 2024-09-03 13:55:00 +08:00
Song Ruo Jing 706935f468 fix(gpio): esp32p4 IOs cannot keep being held in the entire deep sleep process 2024-08-15 21:54:21 +08:00
nilesh.kale e74dcb1fab feat: remove support for aes and rsa peripherals in esp32c61 2024-08-06 15:06:16 +05:30
wuzhenghui da4c55fdbb feat(esp_hw_support): support esp32p4 gpio wakeup deepsleep 2024-07-16 17:55:07 +08:00
gaoxu cbef285352 feat(pm): add SOC_PM_SUPPORTED in soc caps 2024-05-11 10:51:17 +08:00
wuzhenghui 309725fcd0 feat(esp_hw_support): support esp32p4 clock output 2024-04-17 15:09:49 +08:00
wuzhenghui 101f1abbf1 refactor(esp_hw_support): add hal layer for clock output feature 2024-04-17 14:25:29 +08:00
Konstantin Kondrashov 06c28f0ee9 feat(hal): Adds hal funcs for cpu.c 2024-04-11 13:07:04 +03:00
Cao Sen Miao 0985bfbe27 feat(i2c_master): Add lp_i2c support in i2c master driver 2024-04-03 11:39:04 +08:00
wanlei 20c18ac52b feat(esp32c61): final introduce helloworld support 2024-04-02 10:50:52 +08:00
xiehang f3c5047638 feat(extconn): Supports external WiFi connections for ESP32p4 and other espressf chips 2024-04-01 11:44:52 +08:00
xiehang 9d7bd6a8dd change(esp_phy): Add SOC_PHY_SUPPORTED to control phy mode 2024-04-01 11:36:55 +08:00
Song Ruo Jing 3da77e2d1b fix(uart): correct C2 UART_BITRATE_MAX value 2024-03-22 16:24:24 +08:00
wanlei 1e6c61daa6 spi_master: sct mode support set line mode, transaction interval time 
support line mode 1-2-4-8 depend on targets.
fix sct mode dma descriptor counter compute issue.
add conf_bits_len setting API to control interval time.
 2024-03-20 15:42:03 +08:00
Armando b303e4b7a6 spi_master: new segmented-configure-transfer mode 2024-03-20 15:42:03 +08:00
Tomas Rezucha c5dd4a827c Merge branch 'fix/bbpll_usb_link_error' into 'master' 
fix(esp_phy): Allow "Enable USB when phy init" option only on supported targets

Closes IDFGH-10996 and IDFGH-11554

See merge request espressif/esp-idf!27364
 2024-03-07 19:43:01 +08:00
Guillaume Souchere 0b9f01ac20 feat(soc): Add soc_caps macros for sleep support 
- modify console example to use the new SOC_LIGHT_SLEEP_SUPPORTED
and SOC_DEEP_SLEEP_SUPPORTED macros when registering sleep commands

- remove exclusion of esp32p4 in basic and advanced example in
.build-test-rules.yml

- replace exclusion of esp32p4 for deep and light sleep tests with newly introduced macro

- remove the temporary disable check for esp32p4 and uses the
SOC_LIGHT_SLEEP_SUPPORTED maccro instead.
 2024-03-05 07:05:40 +01:00
Tomas Rezucha ea086840a4 fix(esp_phy): Allow WiFi/USB interference workaround option only on supported targets 
"Enable USB when phy init" Kconfig option would call esp_phy function
`phy_bbpll_en_usb()` that is not implemented for all targets.
Selecting this option for unsupported target results in linking error.

The necessity of this workaround is now defined soc_caps.h rather than
in the Kconfig.

Closes https://github.com/espressif/esp-idf/issues/12185
 2024-03-04 16:35:51 +01:00
linruihao 1d34bb5e8a fix(esp_coex): add support_coexistence soc_caps for esp32c2 and esp32h2 2024-02-21 16:38:46 +08:00
Song Ruo Jing 5276cd4f1d refactor(uart): add support to be able to test LP_UART port 
Increase LP_UART_EMPTY_THRESH_DEFAULT value to 4. The original value
could cause the FIFO become empty before filling next data into the FIFO
when the buadrate is high. TX_DONE interrupt would raise before actual
transmission complete in such case.
 2024-02-07 14:37:48 +08:00
Song Ruo Jing cf93777077 refactor(rtc): move soc/rtc.h from soc to esp_hw_support component 
Deprecated rtc_xtal_freq_t, replaced with soc_xtal_freq_t defined in
clk_tree_defs.h in soc component.
 2024-01-25 19:15:33 +08:00
Omar Chebib 102d5bbf72 refactor(riscv): added a new API for the interrupts 2024-01-18 16:36:53 +08:00