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10 Commits
Author SHA1 Message Date
Ashish Sharma 8956f3b86c feat(sha): add sha_hal_is_sm3_supported() 
Report whether the SHA peripheral can run the SM3 mode. The LL function
sha_ll_is_sm3_supported() exists on every chip. ESP32-S31 reads the
DIS_SM_CRYPT eFuse, which disables SM2 and SM3 permanently. ESP32-C5 and
ESP32-H4 have SM3 but no such eFuse. All other chips have no SM3.
 2026-09-04 14:26:23 +08:00
Wu Zheng Hui aac7f7ea47 Merge branch 'feat/support_esp32s31_clock_tree_management' into 'master' 
feat: support esp32s31 clock tree management

Closes PM-630

See merge request espressif/esp-idf!48934
 2026-07-24 20:11:45 +08:00
harshal.patil a7b29bfda9 change(security): disable Key Manager support on ESP32-C5/P4/S31 
The Key Manager hardware peripheral in its current form needs further
design changes before it can be offered as a production feature.
Until a revised peripheral design is available, withdraw ESP-IDF
support for it on all Key Manager capable targets.
 2026-07-22 19:58:23 +05:30
wuzhenghui a04dc898db feat(esp_security): support s31 security clock management 2026-07-22 16:32:45 +08:00
nilesh.kale ec6921b9df feat: enable AES GCM support for ESP32-S31 2026-07-06 11:51:05 +05:30
harshal.patil 554cce6937 fix(mbedtls): validate ECDSA signature range and harden ECC memory power-down 2026-06-09 10:59:11 +05:30
nilesh.kale a530aab0a6 feat: enable key manager and HUK support for S31 2026-05-20 10:17:34 +05:30
Aditya PatwardhanandNilesh Kale e1d429ba30 feat(hal): add ECDSA low-level driver for esp32s31 
Co-authored-by: Nilesh Kale <nilesh.kale@espressif.com>
 2026-05-20 10:17:34 +05:30
Aditya PatwardhanandNilesh Kale e9a9091b59 feat(hal): add HMAC and Digital Signature support for esp32s31 
Co-authored-by: Nilesh Kale <nilesh.kale@espressif.com>
 2026-05-20 10:17:34 +05:30
Aditya PatwardhanandNilesh Kale bfd3e191bc feat: enable AES, SHA, RSA and ECC support for ESP32S31 
Co-authored-by: Nilesh Kale <nilesh.kale@espressif.com>
 2026-04-13 10:20:44 +05:30