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Author SHA1 Message Date
Jin Chen 00ae58b047 fix(ble): fix conn recycle assertion at halt on ESP32-C2 
(cherry picked from commit 5483aeedb6)

Co-authored-by: cjin <jinchen@espressif.com>
 2026-06-03 17:54:07 +08:00
cjin fcaa68aca9 fix(pm): expand the number of skip light sleep number 2026-03-30 09:36:14 +08:00
Jin Chen 3994d5351f fix(ble): use apb max state for bt and enable should skip on ESP32-H2 
(cherry picked from commit ac8fe378a0)

Co-authored-by: cjin <jinchen@espressif.com>
 2026-03-30 09:36:14 +08:00
Jin Chen 5304090fd9 fix(ble): use apb max state for bt and enable should skip on ESP32-C6 
(cherry picked from commit 73191cb5f9)

Co-authored-by: cjin <jinchen@espressif.com>
 2026-03-30 09:36:14 +08:00
Jin Chen ad2b8c7d4f fix(ble): use apb max state for bt and enable should skip on ESP32-C5 
(cherry picked from commit 8365eb324f)

Co-authored-by: cjin <jinchen@espressif.com>
 2026-03-30 09:36:14 +08:00
Jin Chen 669c7bb80f fix(ble): use apb max state for bt and enable should skip on ESP32-C2 
(cherry picked from commit 9de0235a9f)

Co-authored-by: cjin <jinchen@espressif.com>
 2026-03-30 09:36:14 +08:00
cjin d8d616bbc0 feat(ble): supported ble mempool run time allocation for esp ip chips 2026-03-23 15:10:14 +08:00
Jin Chen 15765b9df6 feat(ble): make env init function cuttable on ESP32-C2 
(cherry picked from commit 5ec82368ba)

Co-authored-by: cjin <jinchen@espressif.com>
 2026-03-23 15:08:15 +08:00
Jin Chenandzhaoweiliang 5ef7dff97f change(ble): [AUTO_MR] Update lib_esp32h2 to 913c704d 
(cherry picked from commit a8d705ff7a)

Co-authored-by: zhaoweiliang <zhaoweiliang@espressif.com>
 2026-03-23 15:07:39 +08:00
Jin Chenandzhaoweiliang 9c6405881e change(ble): [AUTO_MR] Update lib_esp32c6 to 913c704d 
(cherry picked from commit 06010a8b79)

Co-authored-by: zhaoweiliang <zhaoweiliang@espressif.com>
 2026-03-23 15:07:39 +08:00
Jin Chenandzhaoweiliang 7d7ff14866 change(ble): [AUTO_MR] Update lib_esp32c5 to 913c704d 
(cherry picked from commit 739cb8e00d)

Co-authored-by: zhaoweiliang <zhaoweiliang@espressif.com>
 2026-03-23 15:07:39 +08:00
cjin 0ccd2d53bf fix(ble): fix conn timeout after phy update on ESP32-C2 2026-03-19 09:52:29 +08:00
cjin e4677d83da fix(ble): fix phy update ctrl process unexpectedly trimmed on ESP32C2 2026-03-12 09:32:56 +08:00
cjin 8b620d2070 fix(ble): fix ble reset randomly assertion on ESP32-C2 2026-03-11 11:17:46 +08:00
Jin Chen 2f2e16f977 fix(ble): fix ble scan assertion when coex with wifi on ESP32-C2 
(cherry picked from commit 974682d169)

Co-authored-by: cjin <jinchen@espressif.com>
 2026-03-04 14:26:06 +08:00
Jin Chen 48a7006e54 feat(ble): apply new method for rom code logic change on ESP32-C2 
(cherry picked from commit 2a0df334e3)

Co-authored-by: cjin <jinchen@espressif.com>
 2026-02-09 20:13:19 +08:00
Jin Chen 7ca42c4400 feat(ble): support for ble module stripping on ESP32-C2 
(cherry picked from commit b90840a570)

Co-authored-by: cjin <jinchen@espressif.com>
 2026-02-09 20:13:19 +08:00
cjin dcebe6bbac feat(ble): support sid filter feature on ESP32C6 2026-01-21 16:14:26 +05:30
cjin 9c88164406 feat(ble): add config to enable sid filter feat 2026-01-21 16:14:26 +05:30
Jin Chen 6d0e282513 fix(ble): fix hci log malloc failure crash 
(cherry picked from commit 734031311ad8554b600718bf8add68836121f72b)

Co-authored-by: cjin <jinchen@espressif.com>
 2025-12-30 12:53:07 +05:30
Jin Chen 7887b65d02 fix(ble): fix pawr set subevent data length error 
(cherry picked from commit 17462a379bb3931285f6886b7554a7959bd7dcd4)

Co-authored-by: cjin <jinchen@espressif.com>
 2025-12-30 12:53:07 +05:30
Jin Chen df9e35edb3 fix(ble): remove target dependency on power control config on ESP32C5 
(cherry picked from commit 82da79224e)

Co-authored-by: cjin <jinchen@espressif.com>
 2025-12-11 16:23:17 +08:00
Jin Chen b84629814a fix(ble): remove target dependency on power control config on ESP32C6 
(cherry picked from commit f29f500ac8)

Co-authored-by: cjin <jinchen@espressif.com>
 2025-12-11 16:23:16 +08:00
Jin Chen 7569042a61 fix(ble): add soc caps config for pawr feat on ESP32C61 
(cherry picked from commit d667a41826)

Co-authored-by: cjin <jinchen@espressif.com>
 2025-12-11 16:23:10 +08:00
Jin Chen 0cce37f934 fix(ble): add soc caps config for pawr feat on ESP32C5 
(cherry picked from commit 19130df4f3)

Co-authored-by: cjin <jinchen@espressif.com>
 2025-12-11 16:23:09 +08:00
Jin Chen a6aa9bf7f5 fix(ble): add soc caps config for pawr feat on ESP32H2 
(cherry picked from commit 2eb79c71f1)

Co-authored-by: cjin <jinchen@espressif.com>
 2025-12-11 16:23:08 +08:00
Jin Chen b0b2130475 fix(ble): add soc caps config for pawr feat on ESP32C6 
(cherry picked from commit 4e4b863299)

Co-authored-by: cjin <jinchen@espressif.com>
 2025-12-11 16:23:07 +08:00
cjin 535927f46c fix(ble): fix ble wakeup causes error on ESP32-H2 2025-10-23 16:36:51 +08:00
cjin 23a90fd2c0 fix(ble): fix ble wakeup causes error on ESP32-C6 2025-10-23 16:36:40 +08:00
cjin 7c8d916f79 fix(ble): fix ble wakeup causes error on ESP32-C5 2025-10-23 16:36:28 +08:00
cjin e691150640 fix(ble): fix ble wakeup causes error on ESP32-C2 2025-10-23 16:35:48 +08:00
Jin Chen 60f9038d12 feat(ble): allow a larger sca limit on ESP32-H2 
(cherry picked from commit abfc2d766e)

Co-authored-by: cjin <jinchen@espressif.com>
 2025-10-16 20:14:13 +08:00
Jin Chen 604639c889 feat(ble): allow a larger sca limit on ESP32-C6 
(cherry picked from commit b3c608f2cf)

Co-authored-by: cjin <jinchen@espressif.com>
 2025-10-16 20:14:11 +08:00
Jin Chen baccea8919 feat(ble): allow a larger sca limit on ESP32-C5 
(cherry picked from commit f012fafe51)

Co-authored-by: cjin <jinchen@espressif.com>
 2025-10-16 20:14:08 +08:00
Jin Chen 5884475b4d feat(ble): allow a larger sca limit on ESP32-C2 
(cherry picked from commit 9ecf67b230)

Co-authored-by: cjin <jinchen@espressif.com>
 2025-10-16 20:14:06 +08:00
Jin Chen d1298525a9 fix(ble): update the example docs for pawr 
(cherry picked from commit 164fec9e74)

Co-authored-by: cjin <jinchen@espressif.com>
 2025-10-16 20:14:03 +08:00
Jin Chen a2c86361ed fix: change the api to enable rc32k on ESP32-H2 
(cherry picked from commit 9c3bcab65c)

Co-authored-by: cjin <jinchen@espressif.com>
 2025-10-13 09:54:48 +08:00
cjin fa5203de21 feat(ble): get wakeup cause when wake up on ESP32-C5 2025-10-11 11:12:45 +08:00
cjin 7d342d49f7 feat(ble): get wakeup cause when wake up on ESP32-H2 2025-10-11 11:12:45 +08:00
cjin c96d41d436 feat(ble): get wakeup cause when wake up on ESP32-C6 2025-10-11 11:12:45 +08:00
cjin ce66ed4309 feat(ble): get wakeup cause when wake up on ESP32-C2 2025-10-11 11:12:45 +08:00
cjin ff7830f45b feat(ble): enable broker initialization on ESP32-C6 2025-07-25 00:01:44 +08:00
cjin 947e79f03d feat(ble): enable broker initialization on ESP32-C5 2025-07-25 00:01:39 +08:00
cjin 6f4ec5f3a6 feat(ble): enable broker initialization on ESP32-H2 2025-07-25 00:01:32 +08:00
cjin e70bf20bba feat(ble): support memory allocation check debug feature on ESP32-H2 2025-07-25 00:01:26 +08:00
cjin 4b347bc75a feat(ble): support memory allocation check debug feature on ESP32-C6 2025-07-25 00:01:22 +08:00
cjin dbb5069423 feat(ble): support memory allocation check debug feature on ESP32-C5 2025-07-25 00:01:17 +08:00
cjin e313f56b30 feat(ble): support memory allocation check debug feature on ESP32-C2 2025-07-25 00:01:11 +08:00
cjin 9e1b2d1741 feat(ble): add sm count reserve cnt setting on ESP32-H2 2025-06-26 15:06:13 +08:00
cjin dc5b3de0ea feat(ble): add sm count reserve cnt setting on ESP32-C6 and ESP32-C61 2025-06-26 15:06:13 +08:00
cjin f77271e701 feat(ble): add sm count reserve cnt setting on ESP32-C5 2025-06-26 15:06:13 +08:00
cjin 58b5a76153 change(ble): update lib_esp32c6 and esp32c61 to ea6c58c7 2025-06-26 15:06:13 +08:00
cjin 51c803915e change(ble): update lib_esp32h2 to ea6c58c7 2025-06-26 15:06:13 +08:00
cjin 43232d25d8 change(ble): update lib_esp32c5 to ea6c58c7 2025-06-26 15:06:13 +08:00
Jin Chen 3d09da9251 fix(phy): update phy lib to fix phy errors on ESP32-C5 
(cherry picked from commit 4a18a67898)

Co-authored-by: cjin <jinchen@espressif.com>
 2025-05-29 14:18:18 +08:00
cjin 6a80deac03 fix(ble): fix rtc freq set too high on ESP32-C2 2025-05-06 19:19:11 +08:00
cjin 6c8ee69151 feat(ble): support ble sleep using 136 kHz RC on ESP32-H2 2025-04-22 10:02:57 +08:00
cjin 718dd7a87a feat(ble): support ble sleep using 136 kHz RC on ESP32-C6 2025-04-22 10:02:49 +08:00
cjin cb8ea7951c feat(ble): support ble sleep using 136 kHz RC on ESP32-C5 2025-04-18 11:10:51 +08:00
cjin 73f1084bf8 feat(ble): support ble sleep using 136 kHz RC on ESP32-C2 2025-04-18 11:10:18 +08:00
cjin a5c32a5fb7 feat(ble): support configurable rxbuf opt feat on ESP32-C5 2025-04-16 14:36:48 +08:00
cjin 5fbbec8655 feat(ble): support configurable rxbuf opt feat on ESP32-C6 2025-04-16 14:36:48 +08:00
cjin 4937d3c883 feat(ble): support configurable rxbuf opt feat on ESP32-H2 2025-04-16 14:36:48 +08:00
cjin ce4e012c8b feat(ble): use new section for ble sleep on ESP32-C2 2025-04-16 14:36:43 +08:00
cjin b62f094ed5 fix(ble): remove macro in lpclk src get api on ESP32-C6 2025-03-17 10:44:21 +08:00
cjin b62736b764 fix(ble): remove macro in lpclk src get api on ESP32-C5 2025-03-17 10:44:21 +08:00
cjin 3df8f30816 change(ble): update esp32c6 lib to 7ead2d29 2025-02-19 12:07:26 +08:00
cjin 5c3829cebc change(ble): update esp32c5 lib to 7ead2d29 2025-02-19 12:07:26 +08:00
cjin 93fd1d91cb change(ble): update esp32h2 lib to 7ead2d29 2025-02-19 12:07:26 +08:00
cjin b7571dd711 fix(ble): fix rtc freq div error on esp32c61 2024-12-31 14:06:08 +08:00
cjin dd499d7b2e fix(ble): change ld for ble scan coex issue 2024-11-19 14:50:48 +08:00
cjin 23f7e33a97 fix(ble): fix ble light sleep error on esp32c2 2024-11-19 14:19:23 +08:00
cjin ce85e113a9 fix(ble): fix btbb retention register size on esp32c61 2024-11-14 19:04:23 +08:00
cjin a011ac0587 fix(ble): do not assert if ble sleep init failed 2024-10-23 19:03:17 +08:00
cjin b56418147a feat(ble): support ble light sleep on esp32c61 2024-09-26 10:10:26 +08:00
cjin 50d410e1c8 feat(ble): support ble light sleep on esp32c5 2024-09-10 15:19:22 +08:00
cjin 3aac7d2a58 feat(ble): add internal api to change ble slow clock source 2024-08-27 12:49:32 +08:00
cjin 8b1e4d8437 fix(ble): remove ble wakeup before entering light sleep 2024-08-27 12:49:32 +08:00
cjin b4ded34fd8 fix(ble): added c6 config check for ble light sleep 2024-06-21 14:58:39 +08:00
cjin 21ad1b393f bugfix(ble): workaround to avoid ble rtc not work when power up 2024-04-07 10:53:00 +08:00
cjin 2f60e19696 feat(ble): add cca related config in c6, h2 and c2 2024-04-01 15:57:06 +08:00
cjin edb3f70562 change(ble): support ble light sleep using ext 32k xtal on C2 2024-04-01 15:57:06 +08:00
cjin af94db4934 fix(ble): fix ci ble powe save test addresss error 2024-03-20 14:12:59 +08:00
cjin 9533df5c39 feat(ble): added pytest for ble power save example 2024-01-19 17:23:35 +08:00
cjin 71901499b9 change(ble): added ble cca en and thresh option 2023-12-19 14:38:44 +08:00
cjin 797edb54fa fix(pm): place extra link opt in iram 2023-12-04 14:46:42 +08:00
cjin e98e291601 fix(pm): switch root clk src to PLL for modem reg opt and added callback 2023-11-21 10:18:32 +08:00
cjin c1798adac6 change(pm): add pm lock count check before reg backup 2023-11-21 10:18:16 +08:00
cjin ff69928064 feat(pm): change power down prepare position 2023-11-21 10:18:03 +08:00
cjin 15e1c8d3ca feat(ble): remove software regdma opt in bt 2023-11-21 10:18:03 +08:00
cjin 43b53a1885 change(ble): added option for msys buffer source 2023-10-27 16:03:05 +08:00
cjin c9cf190847 change(ble): update ble lib on c6 h2 and c2 chip 2023-10-18 17:08:51 +08:00
cjin 6503d1327b feat(ble): added modem reset on c2 h2 and c6 2023-10-13 11:39:29 +08:00
cjin 40996f804a change: remove has clock bug macro for esp32h2 2023-09-21 11:31:53 +08:00
cjin 7b176501e3 feat(ble): update ble sleep logic for esp32h2 2023-09-21 11:30:49 +08:00
cjin 7fc9c0ad62 ble: support esp32c2 wakeup overhead 2023-09-08 15:50:28 +08:00
cjin 926695b000 change: changed ble msys init for controller 2023-09-05 20:40:04 +08:00
cjin 574800b50a feat: added ble wake up overhead support 2023-09-05 20:40:04 +08:00
cjin fd22414fba feat: Support esp32c2 BLE power save example 2023-09-05 20:40:04 +08:00
cjin 5a8e51f24c ble: move phy enabled/disable to controller enable/disable 2023-08-10 10:14:29 +08:00