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Author SHA1 Message Date
Sachin Parekh f8d2c0894c Merge branch 'fix/ecdsa_hal' into 'master' 
ecdsa: Support multiple ECDSA keys

Closes IDF-7027 and IDF-7176

See merge request espressif/esp-idf!23023
 2023-04-07 21:51:45 +08:00
Sachin Parekh 109afcb311 ci: Add patterns and target-tests for ecdsa_efuse runner 2023-04-07 14:56:37 +05:30
Sachin Parekh 39a5604c29 mbedtls/ecdsa: Add ECDSA signature generation test 2023-04-07 14:55:21 +05:30
Sachin Parekh d634970ed1 ecdsa: Support multiple ECDSA keys 
Add provision to choose which efuse block should be used as ECDSA
private key
 2023-04-07 14:55:21 +05:30
Sachin Parekh aa7660c9b4 ecdsa_hal.c: Add missing configuration for signature generation 2023-04-07 14:55:21 +05:30
Sachin Parekh 089b11c989 Merge branch 'h2/support-ecdsa' into 'master' 
H2: Add support for ECDSA peripheral

Closes IDF-6287

See merge request espressif/esp-idf!22663
 2023-03-24 17:11:36 +08:00
Sachin Parekh e26018d8ee h2/clk_gate: Clear reset signal of ECDSA peripheral before enabling SHA, RSA or ECC 2023-03-24 10:43:48 +05:30
Sachin Parekh d2940c5ff3 mbedtls: Add port layer for ECDSA peripheral 2023-03-24 10:43:40 +05:30
Sachin Parekh d345c684ba esp32h2: Add support for ECDSA peripheral 2023-03-24 10:43:40 +05:30
Sachin Parekh 0342bb8eab esp32c6/ecc: Remove inverse multiplication mode 
On C6, inverse multiplication mode is reserved and not available
 2023-03-13 16:39:46 +05:30
Sachin Parekh bbc99e5532 esp32c2/ecc: Remove support for inverse multiplication 
On C2, inverse multiplication (division) mode uses the modular base P
instead of N making it impractical for ECC crypto calculation
 2023-03-13 16:39:46 +05:30
Sachin Parekh 413fa38a45 hal/test_apps: Add no-os ecc test app 2023-03-13 16:39:46 +05:30
Sachin Parekh a485b1cb67 esp32h2: Add support for ECC hardware accelerator 2023-03-13 16:39:46 +05:30
Sachin Parekh ed0a1f7b52 esp32c6: Fix incorrect PMP configuration 
- Enable pytest memprot tests for C6
 2023-03-09 11:37:29 +05:30
Sachin Parekh 7bd5d93905 esp_hw_support: Move cpu protection in port files 2023-03-09 11:37:29 +05:30
Sachin Parekh 774f0ef636 Merge branch 'esp32c6/ecdsa_secure_boot_support' into 'master' 
ESP32C6: Enable ECDSA secure boot

Closes IDF-5357 and IDF-5931

See merge request espressif/esp-idf!21058
 2023-02-15 16:03:35 +08:00
Sachin Parekh 2bb9499a7e esp32c6: Enable ECDSA based secure boot 
- Updated documentation for C6
 2023-02-13 13:02:11 +05:30
Sachin Parekh a3c341384f esp32c6: Remove assert check on len for SHA calculation 2023-02-13 09:45:55 +05:30
Sachin Parekh d9ac69362a wpa_supplicant: Enable ECC test case 2023-01-18 14:25:53 +05:30
Sachin Parekh b060179400 mbedtls/ecp: Fix incorrect ECP parameter value 
- Add sanity checks in mbedtls port
- Add ECP test cases covering shorter scalar values
 2023-01-18 14:24:57 +05:30
Sachin Parekh e997038ab4 Merge branch 'esp32c6/bootloader_region_protection' into 'master' 
esp32c6: Enable IRAM-DRAM split using PMP

Closes IDF-5642 and IDF-5684

See merge request espressif/esp-idf!21199
 2022-12-07 13:45:46 +08:00
Sachin Parekh 7af998d23f esp32c6: Enable IRAM-DRAM split using PMP 2022-12-06 14:50:55 +00:00
Sachin Parekh 97709b899f esp32s3/memprot: Fix DRAM fault address calculation 2022-11-30 13:46:53 +00:00
Sachin Parekh 90d40b96e2 esp32s3/memprot: Fix SRAM region high addresses 2022-11-30 13:46:53 +00:00
Sachin Parekh 2a01e66b25 esp32s3/memprot: Set permission for Icache region 2022-11-30 13:46:53 +00:00
Sachin Parekh 69c8df5e49 esp32c6: Add support for ECC peripheral 2022-11-07 10:42:33 +05:30
Sachin Parekh 130ada60ec mbedtls: Added performance tests for ECP and ECDSA operations 2022-10-13 10:01:06 +05:30
Sachin Parekh aa4437d3d3 mbedtls: Override ecp_mul_restartable_internal 
ECDSA verification uses ecp_mul_restartable_internal instead
of the public API mbedtls_ecp_mul_restartable
 2022-08-24 11:59:35 +05:30
Sachin Parekh 3a050cde26 Merge branch 'fix/s3_world_controller_headers' into 'master' 
esp32s3: Update world controller headers

Closes IDF-5648

See merge request espressif/esp-idf!19219
 2022-08-11 13:38:53 +08:00
Sachin Parekh 41c5359703 esp32s3: Update world controller headers 2022-08-10 07:22:02 +00:00
Sachin Parekh 6cfc9c365f esp32h2: Enable ECC accelerator 2022-06-23 12:59:13 +05:30
Sachin Parekh 8ad3f2ba57 esp32c2: Add support for RNG 2022-06-02 11:36:23 +08:00
Sachin Parekh 9a763f4ff2 esp32c2: Enable IRAM/DRAM split using PMP 2022-05-24 21:36:06 +05:30
Sachin Parekh 7dd62bb044 esp32c2: Remove assert check on len for SHA calculation 2022-05-11 18:00:07 +05:30
Sachin Parekh 2c725264f7 esp32c2: Support Secure Boot V2 based on ECDSA scheme 2022-05-11 18:00:03 +05:30
Sachin Parekh 32a6550e87 mbedtls: Added ECC hardware accelerator support on ESP32C2 
ESP32C2 has a ECC hardware accelerator capable of performing point
multiplication and point verification with a significant performance
boost
 2022-03-08 14:05:23 +00:00
Sachin Parekh bc1d35a14e esp32c2/hal: Added ECC HAL layer 2022-03-08 14:05:23 +00:00
Sachin Parekh 724fdbc9f1 secure_boot: Do not allow key revocation in bootloader 2021-10-22 12:20:14 +05:30
Sachin Parekh 8ff3dbc05d secure_boot: Added Kconfig option for aggressive key revoke 
Applicable to S2, C3, and S3
 2021-10-22 12:20:14 +05:30
Sachin Parekh 735b2e8089 Merge branch 'fix/no_stub_secure_boot' into 'master' 
secure_boot: Enable --no-stub if secure boot enabled

Closes IDF-3784

See merge request espressif/esp-idf!15288
 2021-09-23 07:15:21 +00:00
Sachin Parekh c4e445b6f3 secure_boot: Enable --no-stub if secure boot enabled 
ROM code doesn't allow loader stub to be executed in case secure boot in
enabled. Providing --no-stub flag to esptool allows user to flash new
firmware, given download mode hasn't been disabled
 2021-09-22 12:45:46 +05:30
Sachin Parekh 0e6b03f343 esp32s2/hmac: Release HMAC lock in downstream mode incase of failure 2021-09-06 11:21:39 +05:30
Sachin Parekh fd5a7df404 esp32h2: Replicated HMAC JTAG downstream enable mode implementation 2021-09-06 11:06:50 +05:30
Sachin Parekh fa2707f1f3 hmac: Added Downstream JTAG enable mode for esp32c3 and esp32s3 
If JTAG is disabled temporarily by burning SOFT_DIS_JTAG, it can be
re-enabled temporarily through esp_hmac_jtag_enable API
 2021-09-06 11:06:50 +05:30
Sachin Parekh bf1dde7233 bootloader: Enable clock glitch detection 
Reset the device when clock glitch detected. Clock glitch detection is
only active in bootloader
 2021-09-02 12:25:12 +05:30
Sachin Parekh cfcb893289 ttfw_idf: Added ESP32-S3 FPGA support 
Provision to burn and reset efuses of ESP32S3 on FPGA

test_app: Enabled automated test cases for ESP32S3
 2021-08-27 10:41:31 +05:30
Sachin Parekh 3f7fed7872 test_app: Added automated test cases for secure_boot 2021-08-27 10:41:31 +05:30
Sachin Parekh 65db2d3d80 ttfw_idf: Added IDFFPGADUT class 
Provision to burn and reset efuses of ESP32C3 chip on FPGA
 2021-08-27 09:58:26 +05:30
Sachin Parekh 2d82560ed5 bootloader: Enable Secure boot V2 for ESP32-S3 2021-08-19 14:08:12 +05:30
Sachin Parekh f430e86c0f secure_boot/esp32(s2,c3): Disable read protecting of efuses 
When secure boot is enabled, disable the ability to read protect
efuses that contain the digest.
 2021-08-13 13:41:59 +05:30
Sachin Parekh 6582f7070e Update tests for assert and abort 
- Place panic_abort in IRAM
- Added abort, assert test case in case of cache disabled
- Expect assert instead of abort in a freertos_mutex test
 2021-08-05 11:09:22 +05:30
Sachin Parekh 41973b761e newlib: Override __assert and __assert_func 
Default assert implementation calls fiprintf, which tries to acquire a
lock and fails if it is executing in critical section or ISR
 2021-08-05 11:09:22 +05:30
Sachin Parekh 201c6cc70f Merge branch 'doc/fix_secure_boot_v2' into 'master' 
doc/secure_boot_v2: Fix the steps mentioned for enabling secure boot

Closes IDF-2580

See merge request espressif/esp-idf!14483
 2021-07-30 13:39:55 +00:00
Sachin Parekh 082cc36532 doc/secure_boot_v2: Fix the steps mentioned for enabling secure boot 2021-07-30 14:40:32 +08:00
Sachin Parekh fed4c4c313 Merge branch 'fix/esp32c3_memprot_split_line' into 'master' 
esp32c3/memprot: Fix incorrect calculations and register access

Closes IDF-3510 and IDF-3514

See merge request espressif/esp-idf!14201
 2021-07-15 05:08:14 +00:00
Sachin Parekh 1e17b1d843 esp32c3/memprot: Correct the split line address calculation 2021-07-09 09:33:52 +05:30
Sachin Parekh 29a308e614 esp32c3/memprot: Fix incorrect access to DRAM0 split line registers 
memprot_ll_set_dram0_split_line_* and memprot_ll_get_dram0_split_line_* APIs were accessing
incorrect configuration register
 2021-07-09 09:33:52 +05:30
Sachin Parekh 46dc36233a coredump: Parse backtrace info for RISCV 
For RISCV, backtrace generation on device is not possible without
including and parsing DWARF sections. We extract the crash task stack
and let the host generate the backtrace
 2021-05-17 11:43:25 +05:30
Sachin Parekh b1eacc24f2 stdatomic: Implemented legacy __sync APIs and __atomic_exchange_n 
These APIs are used when the architecture doesn't have atomic
instruction support

Closes https://github.com/espressif/esp-idf/issues/6463
 2021-04-23 11:18:58 +05:30
Sachin Parekh e6ccb812b2 esp_pm: Label each column of lock dump 2021-02-11 18:44:51 +05:30
Sachin Parekh 296d10e675 esp_timer: Label each column of timer dump 2021-02-11 18:40:51 +05:30
Sachin Parekh 6e1f53bce3 i2c: Acquire PM lock after acquiring mutex 2020-12-22 00:50:19 +05:30
Sachin Parekh be5563207d esp32: Provision to redirect .bss to external ram through linker fragments 
Include external ram section in the linker template to process it
through linker script generation mechanism. This enables redirection of .bss section to external memory using linker fragments

libnet80211, libpp, libbt, liblwip: Redirect .bss through fragments
 2020-12-04 06:32:38 +00:00
Sachin Parekh c0a33487b1 gdbstub_xtensa.c: Replace with cpu_ll_pc_to_ptr macro 
Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
 2020-05-08 18:35:48 +05:30
Sachin Parekh 46d914ff45 gdb: Modify PC in case of invalid PC 
Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
 2020-05-08 18:34:52 +05:30
Sachin Parekh 1e6c25992e esp32: IRAM_DATA_ATTR and IRAM_BSS_ATTR introduced 
Using these attributes, .data and .bss can be placed in IRAM

Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
 2020-04-17 19:35:23 +05:30
Sachin Parekh 301dacfb33 Exception handlers for LoadStoreError and LoadStoreAlignmentError 
Configurable option to use IRAM as byte accessible memory (in single core mode) using
load-store (non-word aligned and non-word size IRAM access specific) exception handlers.
This allows to use IRAM for use-cases where certain performance penalty
(upto 170 cpu cycles per load or store operation) is acceptable. Additional configuration
option has been provided to redirect mbedTLS specific in-out content length buffers to
IRAM (in single core mode), allows to save 20KB per TLS connection.
 2020-02-26 20:21:59 +08:00
Sachin Parekh ae675973be optimize: IGMP and MLD6 timers on demand config added 
Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
 2019-06-12 05:10:32 +00:00
Sachin Parekh e6a714480d unit-test-app: freertos_compliance config added 
Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
 2019-05-13 16:39:19 +05:30
Sachin Parekh d803465ec6 ref_clock: port*_CRITICAL vanilla FreeRTOS compliance 
Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
 2019-05-13 16:39:19 +05:30
Sachin Parekh a190b527ac power_management: port*_CRITICAL vanilla FreeRTOS compliance 
Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
 2019-05-13 16:39:19 +05:30
Sachin Parekh db8041a67f intr_alloc: port*_CRITICAL vanilla FreeRTOS compliance 
Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
 2019-05-13 16:39:19 +05:30
Sachin Parekh f3db0b5a4a crosscore_init: port*_CRITICAL vanilla FreeRTOS compliance 
Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
 2019-05-13 16:39:19 +05:30
Sachin Parekh 5979086379 timer: port*_CRITICAL vanilla FreeRTOS compliance 
Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
 2019-05-13 16:39:19 +05:30
Sachin Parekh 7f37824eb7 rtc_module: port*_CRITICAL vanilla FreeRTOS compliance 
Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
 2019-05-13 16:39:19 +05:30
Sachin Parekh da41885e85 rmt: port*_CRITICAL vanilla FreeRTOS compliance 
Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
 2019-05-13 16:39:19 +05:30
Sachin Parekh e9898b1280 periph_ctrl: port*_CRITICAL vanilla FreeRTOS compliance 
Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
 2019-05-13 16:39:19 +05:30
Sachin Parekh 5c6b9adf11 freertos: port*_CRITICAL_SAFE API added 
port*_CRITICAL_SAFE API calls port*_CRITICAL or port*_CRITICAL_ISR
depending on the context (Non-ISR or ISR respectively).

FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE Kconfig option added

Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
 2019-05-13 16:39:19 +05:30
Sachin Parekh 4de5ae7468 PM: I2S and I2C added in the Power Management docs 
Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
 2019-03-18 08:21:21 +00:00
Sachin Parekh 7fc6445035 I2S: Enable Power Management locks 
Acquires PM_APB_FREQ_MAX lock when carrying any transaction on I2S if
Power Management Framework is enabled.

Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
 2019-03-18 08:21:21 +00:00
Sachin Parekh d0234ad24a I2C: Enable Power Management locks 
Acquires PM_APB_FREQ_MAX lock when carrying any transaction on I2C if
Power Management Framework is enabled.

Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
 2019-03-18 08:21:21 +00:00
Sachin Parekh 7a5400ce77 make dump_otadata: Displays app ota_seq and crc on console 2018-08-22 16:51:36 +08:00
Sachin Parekh e5049021ed smartconfig_ack.c : Fixed the declaration of remote_ip in sc_ack_send_task() 
remote_ip was declared to be a pointer to an address that was
overwritten in later stage thus changing the address pointed by remote_ip

esp_smartconfig.h : Fixed a typo. station_config to wifi_config_t

Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
 2018-07-03 16:28:24 +05:30