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release/v6.1
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1841 Commits

Author SHA1 Message Date
Jiang Jiang Jian
97def67a17 Merge branch 'tracing_test_fixes_v6.1' into 'release/v6.1' 
Tracing test fixes (v6.1)

See merge request espressif/esp-idf!52327
 2026-09-09 10:54:21 +08:00
Erhan Kurubas
d469e0ef66 fix(esp_system): break into the debugger only on the first panic entry 2026-09-07 16:41:37 +08:00
Chen Jichang
8cb3743b7c ci(esp32h4): disable h4 build and target test on unsupported release branch 2026-09-07 15:48:11 +08:00
Jiang Jiang Jian
6d6facef39 Merge branch 'stub_bins_for_more_targets_v6.1' into 'release/v6.1' 
Increase OCD stub memory reservation from 8K to 12K and extend this feature to more targets (v6.1)

See merge request espressif/esp-idf!51534
 2026-09-04 15:55:25 +08:00
wuzhenghui
0f5ec4d261 feat(esp_security): support s31 security clock management 2026-09-02 19:20:15 +08:00
Ashish Sharma
7e808c82ea fix(spi_flash): disable branch prediction on the parked core during flash ops 2026-09-01 02:42:19 +00:00
Erhan Kurubas
ae0c69d9d8 feat(system): add OCD stub bin support for more targets 
Add SOC_DEBUG_HAVE_OCD_STUB_BINS for esp32c5, esp32c61, esp32h4,
esp32h21, esp32p4, and esp32s31. Update TEE linker scripts with
correct esp_tee_app_config offsets for the 0x3000 stub reservation
 2026-08-31 11:35:49 +08:00
Erhan Kurubas
0ee0684fd2 change(system): increase OCD stub memory reservation from 8K to 12K 2026-08-31 11:35:49 +08:00
Jiang Jiang Jian
40feb79578 Merge branch 'feat/support_esp32s31_xtal_fosc_force_pu_v6.1' into 'release/v6.1' 
feat: update XTAL sleep FPU parameters to save power (v6.1)

See merge request espressif/esp-idf!51896
 2026-08-31 10:54:55 +08:00
morris
d5e9370617 Merge branch 'fix/fix_image_header_check_v6.1' into 'release/v6.1' 
image header: fixed image header segment count check (v6.1)

See merge request espressif/esp-idf!50934
 2026-08-27 18:01:25 +08:00
morris
d293b6b6c9 Merge branch 'fix/cache_panic_reset_reason_v6.1' into 'release/v6.1' 
fix: changed the expected axi reset reason for S31 (v6.1)

See merge request espressif/esp-idf!52107
 2026-08-27 17:54:16 +08:00
Fu Hanxi
7eaf5f1b4e Merge branch 'feat/apply-common-scripts-6.1' into 'release/v6.1' 
ci: apply common-scripts CI refactor (v6.1)

See merge request espressif/esp-idf!50988
 2026-08-27 10:39:58 +02:00
Marius Vikhammer
bdb2e96103 Merge branch 'feature/adds_ipc_isr_safe_api_v6.1' into 'release/v6.1' 
feat(ipc_isr): Adds IPC ISR safe API to stall other CPU (v6.1)

See merge request espressif/esp-idf!50963
 2026-08-27 16:27:54 +08:00
Fu Hanxi
321dda29ff ci: apply common-scripts CI refactor (v6.1) 2026-08-27 09:14:23 +02:00
Roland Dobai
138482998d Merge branch 'feature/use_zcmp_by_default_v6.1' into 'release/v6.1' 
feat(build): add ZCMP workaround post-build check (v6.1)

See merge request espressif/esp-idf!51325
 2026-08-27 08:24:39 +02:00
Roland Dobai
d569196686 Merge branch 'fix/fix_esp32s31_xip_bss_psram_build_failure_v6.1' into 'release/v6.1' 
fix(esp_system): fix backwards location-counter move in `.ext_ram.dummy` on same-region targets (v6.1)

See merge request espressif/esp-idf!51179
 2026-08-27 08:18:46 +02:00
Chen Chen
6556accf6e fix: changed the expected axi reset reason for S31 2026-08-26 17:46:04 +08:00
wuzhenghui
b4cd651f0a feat(esp_system): support XTAL as RTC fast clock source 2026-08-20 10:42:14 +08:00
Alexey Lapshin
a494009a0c feat(build): add RISC-V ZCMP post-link workaround check 
Validate linked RISC-V executables when
CONFIG_COMPILER_ENABLE_RISCV_ZCMP is enabled on affected chips.
Disassemble each function and reject mstatus.MIE clears that lack an
earlier mintthresh write of 0xff.

Handle csrrci, csrrw, and register-mask csrrc patterns while ignoring
csrrs. Add build-only coverage for valid and invalid sequences with
CMake v1 and v2.

Stop the hardware stack guard before switching stacks during restart,
and keep ZCMP disabled for TEE test apps that still require the
workaround.
 2026-08-03 14:10:00 +08:00
Jiang Jiang Jian
14784e6054 Merge branch 'fix/fix_esp32s31_secureboot_fastwake_v6.1' into 'release/v6.1' 
fix(esp_system): support rom secure boot fast wake feature for esp32s31 (v6.1)

See merge request espressif/esp-idf!51266
 2026-07-31 18:00:06 +08:00
harshal.patil
db7147f15a refactor(esp_system): deduplicate ROM fast wake RTC digest reservation 
The digest length and the condition that reserves it at the end of RTC RAM were
duplicated in seven places. Hold the reservation in a hidden Kconfig value that
is zero when the feature does not apply, so every consumer subtracts it
unconditionally, and derive ESP_SECURE_BOOT_DIGEST_LEN from it.
 2026-07-31 10:52:52 +08:00
wuzhenghui
708f34bd16 fix(esp_system): support rom secure boot fast wake feature for esp32s31 2026-07-28 21:46:24 +08:00
Mahavir Jain
22cc8d41c8 fix(esp_system): fixes build failure with XIP PSRAM + BSS/NoInit in external memory 
Declare ext_ram_xip_seg as a distinct region overlapping drom_seg at the
same origin (the esp32s3/c5/c61/h4 pattern) instead of aliasing drom_seg,
so .ext_ram.dummy has its own location counter and .ext_ram.bss reclaims
the VMA space of NOLOAD rodata (.rodata_wlog_*), saving up to one MMU
page of PSRAM on esp32s31. No layout change on esp32p4.

Closes https://github.com/espressif/esp-idf/issues/18791
Related https://github.com/espressif/esp-idf/issues/14992
 2026-07-27 11:12:37 +05:30
Konstantin Kondrashov
337d289e7a feat(ipc_isr): adds IPC ISR safe API for other CPU stall API 2026-07-20 11:19:32 +03:00
Armando (Dou Yiwen)
96349ed26d fix: fixed image header segment count check 
Signed-off-by: Armando (Dou Yiwen) <douyiwen@espressif.com>
 2026-07-20 10:20:33 +08:00
Song Ruo Jing
d5a3169ee5 fix(stdio): add console input ability when selects ESP_CONSOLE_UART_CUSTOM_NUM_1 2026-07-15 16:45:39 +08:00
Jiang Jiang Jian
85ce16bed7 Merge branch 'feat/optimize_esp32s31_active_power_v6.1' into 'release/v6.1' 
feat: optimize esp32s31 active power  (v6.1)

See merge request espressif/esp-idf!49618
 2026-06-30 14:11:00 +08:00
Mahavir Jain
7a2bb09375 Merge branch 'fix/secure_boot_bootloader_ecdsa_range_gate_v6.1' into 'release/v6.1' 
Add ECDSA signature bounds check in bootloader before Secure Boot verify (v6.1)

See merge request espressif/esp-idf!49632
 2026-06-30 07:15:59 +05:30
Laukik Hase
081d27cbd2 fix(esp_tee): Avoid crypto peripherals reset with esp_restart() from REE 
- Reset the crypto peripherals during TEE initialization
 2026-06-26 15:06:13 +05:30
harshal.patil
3e246a64a3 fix(esp_common/esp_fault): make ESP_FAULT_ASSERT survive optimization 
ESP_FAULT_ASSERT(C) was silently deleted by the optimizer when C is a cached
flag/status already proven by a preceding `if (!C) return/goto`: the compiler
folds C to a constant and drops all three checks, removing the fault-injection
protection with no warning.
 2026-06-18 17:00:42 +05:30
wuzhenghui
964511ca30 feat(soc): disable esp32s31 WFE feature at startup 2026-06-15 10:31:06 +08:00
wuzhenghui
ce0fcbaa9a feat(esp_system): support esp32s31 esp_perip_clk_init 2026-06-15 10:31:06 +08:00
Jiang Jiang Jian
e4f18caa91 Merge branch 'bugfix/int_wdt_default_psram_v6.1' into 'release/v6.1' 
fix(iwdt): increased default timeout if using PSRAM (v6.1)

See merge request espressif/esp-idf!49480
 2026-06-13 15:28:33 +08:00
Mahavir Jain
d460486ab4 Merge branch 'fix/ecdsa_ecc_hw_input_validation_v6.1' into 'release/v6.1' 
Validate ECDSA signature range and harden ECC memory power-down (v6.1)

See merge request espressif/esp-idf!49427
 2026-06-10 14:39:49 +05:30
Marius Vikhammer
1db2e04c21 fix(iwdt): increased default timeout if using PSRAM 
Default timeout for interrupt WDT was increased by default
on ESP32, due to some heap integrity check APIs taking a long
time on large PSRAMs and causing timeouts.

But this adjustment was only done for ESP32, not later chips,
even though they may experience the same issue.

Adjusted to have the same behavior on all chips with PSRAM
enabled, making it consistant with the docs.

Closes https://github.com/espressif/esp-idf/issues/18360
 2026-06-10 10:20:50 +08:00
harshal.patil
6bdaf2a293 fix(soc): Remove non-existent crypto registers (ESP32-C61) 2026-06-09 18:16:33 +05:30
harshal.patil
beb13babca fix(mbedtls): validate ECDSA signature range and harden ECC memory power-down 2026-06-09 14:58:59 +05:30
Song Ruo Jing
c9f52c7ca7 feat(spi_flash): Add exclusive support for ESP32H4 
Add 32bit addr support for esp32s31 as well
 2026-06-09 15:27:41 +08:00
wuzhenghui
f34f07ba07 fix(esp_system): update cache livelock workaround bind to interrupt WDT configuration 2026-06-02 17:31:11 +08:00
Peter Dragun
05faa941c2 fix(esp32c5): Do not disable UART0 sclk when USB Serial/JTAG is primary console 
This is a workaround for rom code issue, which can cause the chip to end in infinite loop
when reset is triggered from esptool/idf-monitor. This is only applicable to ESP32-C5 rev <= 1.0.

Closes https://github.com/espressif/esp-idf/issues/18089
 2026-05-25 08:35:15 +02:00
Wu Zheng Hui
2fcaddb700 Merge branch 'fix/fix_psram_data_corrupt_after_lightsleep' into 'master' 
fix(esp_hw_support):fix psram data corrupt after lightsleep

Closes PM-941

See merge request espressif/esp-idf!48322
 2026-05-22 15:11:41 +08:00
hebinglin
5710783a89 feat(esp_hw_support): support entry 2 xtalx2 power pu in esp32h4 2026-05-21 19:55:37 +08:00
Li Shuai
ec1705c362 change(esp_system): support system minimum digital peripherals retention runtime attach and detach 2026-05-21 11:46:16 +08:00
wuzhenghui
858ecf6f70 feat(esp_hw_support): check psram data is not corrupted after lightsleep 2026-05-19 21:01:21 +08:00
wuzhenghui
4876a7ad94 fix(esp_system): fix build err if int_wdt is not enabled on esp32 2026-05-19 11:32:42 +08:00
wuzhenghui
11a8a16639 fix(esp_system): remove intwdt config critical area for chips except esp32 2026-05-19 11:28:48 +08:00
Gao Xu
b66f6bcc86 Merge branch 'feat/cam_support_s31' into 'master' 
Support dvp cam on ESP32-S31

Closes IDF-14722

See merge request espressif/esp-idf!47850
 2026-05-15 10:03:53 +08:00
gaoxu
4e3751b32e feat(cam): support dvp cam on ESP32-S31 2026-05-14 17:09:49 +08:00
Alexey Gerenkov
edb75262a1 Merge branch 'feature/update-esp-clang-to-esp-21.1.3_20260304' into 'master' 
feat(tools): update esp-clang version to esp-21.1.3_20260408

Closes IDF-14965, LLVM-501, and LLVM-531

See merge request espressif/esp-idf!46361
 2026-05-13 22:54:10 +08:00
Marius Vikhammer
8f6ea2a1ba test(ci): re-enable ESP32-H4 in core system test apps 
Co-authored-by: Cursor <cursoragent@cursor.com>
 2026-05-13 09:00:12 +08:00