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Merge branch 'refactor/lp_periph_io_for_lp_core' into 'master'

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refactor(ulp): use lp_gpio_matrix_* for LP core peripheral IO on matrix targets

See merge request espressif/esp-idf!48114
This commit is contained in:
Sudeep Mohanty
2026-05-12 14:02:08 +02:00
parent fc27941619 6f044e6e81
commit fbd587f10d
3 changed files with 20 additions and 29 deletions
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19
components/ulp/lp_core/lp_core_i2c.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -89,17 +89,18 @@ static esp_err_t lp_i2c_set_pin(const lp_core_i2c_cfg_t *cfg)
ESP_RETURN_ON_ERROR(lp_i2c_configure_io(sda_io_num, sda_pullup_en), LPI2C_TAG, "LP I2C SDA pin config failed");
#if !SOC_LP_GPIO_MATRIX_SUPPORTED
/* On targets that do not support the LP IO Matrix: assign SDA and SCL to the LP I2C
* RTC IOMUX function. lp_i2c_configure_io() already initialized the pads and open-drain direction. */
const i2c_signal_conn_t *p_i2c_pin = &i2c_periph_signal[LP_I2C_NUM_0];
ret = rtc_gpio_iomux_func_sel(sda_io_num, p_i2c_pin->iomux_func);
ret = rtc_gpio_iomux_func_sel(scl_io_num, p_i2c_pin->iomux_func);
ret = rtc_gpio_iomux_output(sda_io_num, p_i2c_pin->iomux_func);
ret = rtc_gpio_iomux_output(scl_io_num, p_i2c_pin->iomux_func);
#else
/* Connect the SDA pin of the LP_I2C peripheral to the LP_IO Matrix */
ret = lp_gpio_connect_out_signal(sda_io_num, LP_I2C_SDA_PAD_OUT_IDX, 0, 0);
ret = lp_gpio_connect_in_signal(sda_io_num, LP_I2C_SDA_PAD_IN_IDX, 0);
/* On targets with the LP IO Matrix: route SDA and SCL to the LP I2C pad signals. */
ret = lp_gpio_matrix_output(sda_io_num, LP_I2C_SDA_PAD_OUT_IDX, false, false);
ret = lp_gpio_matrix_input(sda_io_num, LP_I2C_SDA_PAD_IN_IDX, false);
/* Connect the SCL pin of the LP_I2C peripheral to the LP_IO Matrix */
ret = lp_gpio_connect_out_signal(scl_io_num, LP_I2C_SCL_PAD_OUT_IDX, 0, 0);
ret = lp_gpio_connect_in_signal(scl_io_num, LP_I2C_SCL_PAD_IN_IDX, 0);
ret = lp_gpio_matrix_output(scl_io_num, LP_I2C_SCL_PAD_OUT_IDX, false, false);
ret = lp_gpio_matrix_input(scl_io_num, LP_I2C_SCL_PAD_IN_IDX, false);
#endif /* !SOC_LP_GPIO_MATRIX_SUPPORTED */
return ret;

9
components/ulp/lp_core/lp_core_spi.c
View File

@@ -32,12 +32,9 @@ static esp_err_t lp_spi_config_io(gpio_num_t pin, rtc_gpio_mode_t direction, uin
/* Initialize LP_IO */
ESP_RETURN_ON_ERROR(rtc_gpio_init(pin), LP_SPI_TAG, "LP IO Init failed for GPIO %d", pin);
/* Set LP_IO direction */
ESP_RETURN_ON_ERROR(rtc_gpio_set_direction(pin, direction), LP_SPI_TAG, "LP IO Set direction failed for %d", pin);
/* Connect the LP SPI signals to the LP_IO Matrix */
ESP_RETURN_ON_ERROR(lp_gpio_connect_out_signal(pin, out_pad_idx, 0, 0), LP_SPI_TAG, "LP IO Matrix connect out signal failed for %d", pin);
ESP_RETURN_ON_ERROR(lp_gpio_connect_in_signal(pin, in_pad_idx, 0), LP_SPI_TAG, "LP IO Matrix connect in signal failed for %d", pin);
/* Connect this LP_IO to the LP SPI pad-out and pad-in indices on the LP IO Matrix. */
ESP_RETURN_ON_ERROR(lp_gpio_matrix_output(pin, out_pad_idx, false, false), LP_SPI_TAG, "LP IO matrix output failed for %d", pin);
ESP_RETURN_ON_ERROR(lp_gpio_matrix_input(pin, in_pad_idx, false), LP_SPI_TAG, "LP IO matrix input failed for %d", pin);
return ret;
}

21
components/ulp/lp_core/lp_core_uart.c
View File

@@ -94,35 +94,28 @@ static esp_err_t lp_uart_config_io(gpio_num_t pin, rtc_gpio_mode_t direction, ui
/* Connect pins */
const uart_periph_sig_t *upin = &uart_periph_signal[LP_UART_PORT_NUM].pins[idx];
#if !SOC_LP_GPIO_MATRIX_SUPPORTED
/* On non-matrix chips, LP UART pins are always the default IOMUX pins.
* Use the all-in-one rtc_gpio_iomux APIs which handle func sel and direction. */
/* On targets that do not support the LP IO Matrix, LP UART uses fixed pads.
* rtc_gpio_iomux_output / rtc_gpio_iomux_input select the UART RTC IOMUX function and direction. */
if (direction == RTC_GPIO_MODE_OUTPUT_ONLY) {
ret = rtc_gpio_iomux_output(pin, upin->iomux_func);
} else {
ret = rtc_gpio_iomux_input(pin, upin->iomux_func, UART_PERIPH_SIGNAL(LP_UART_PORT_NUM, idx));
}
#else
/* If the configured pin is the default LP_IO Mux pin for LP UART, then set the LP_IO MUX function */
/* Default LP UART pin: same RTC IOMUX path as on targets that do not support the LP IO Matrix. */
if (upin->default_gpio == pin) {
/* rtc_gpio_iomux_input/output are all-in-one APIs that handle func sel,
* direction, and LP GPIO Matrix bypass in a single call. */
/* Select LP UART on this pin including direction and LP IO Matrix bypass. */
if (direction == RTC_GPIO_MODE_OUTPUT_ONLY) {
ret = rtc_gpio_iomux_output(pin, upin->iomux_func);
} else {
ret = rtc_gpio_iomux_input(pin, upin->iomux_func, UART_PERIPH_SIGNAL(LP_UART_PORT_NUM, idx));
}
} else {
ret = rtc_gpio_set_direction(pin, direction);
if (ret != ESP_OK) {
return ESP_FAIL;
}
/* Select FUNC1 for LP_IO Matrix */
ret = rtc_gpio_iomux_func_sel(pin, 1);
/* Connect the LP_IO to the LP UART peripheral signal */
/* Non-default pin: route LP UART TX/RX through the LP IO Matrix. */
if (direction == RTC_GPIO_MODE_OUTPUT_ONLY) {
ret = lp_gpio_connect_out_signal(pin, UART_PERIPH_SIGNAL(LP_UART_PORT_NUM, idx), 0, 0);
ret = lp_gpio_matrix_output(pin, UART_PERIPH_SIGNAL(LP_UART_PORT_NUM, idx), false, false);
} else {
ret = lp_gpio_connect_in_signal(pin, UART_PERIPH_SIGNAL(LP_UART_PORT_NUM, idx), 0);
ret = lp_gpio_matrix_input(pin, UART_PERIPH_SIGNAL(LP_UART_PORT_NUM, idx), false);
}
}
#endif /* SOC_LP_GPIO_MATRIX_SUPPORTED */