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fix(esp_eth): fixed Ethernet PHY HW reset timing in common PHY code

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This commit is contained in:
Ondrej Kosta
2026-08-11 13:57:08 +02:00
committed by Euripedes Rocha
parent de07da4a74
commit ed6d83b3af
1 changed files with 16 additions and 6 deletions
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22
components/esp_eth/src/phy/esp_eth_phy_802_3.c
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@@ -435,6 +435,20 @@ esp_err_t esp_eth_phy_802_3_del(phy_802_3_t *phy_802_3)
return ESP_OK;
}
/* Delays for at least delay_us. Anything shorter than a FreeRTOS tick has to be busy waited since
the scheduler cannot express it. Longer delays are slept off by a single vTaskDelay which returns
after n-1 to n tick periods, because the call is placed somewhere inside an already running tick,
hence one extra tick is requested to not undershoot the delay. */
static void phy_802_3_delay_us(uint32_t delay_us)
{
uint32_t tick_period_us = portTICK_PERIOD_MS * 1000;
if (delay_us < tick_period_us) {
esp_rom_delay_us(delay_us);
} else {
vTaskDelay((delay_us + tick_period_us - 1) / tick_period_us + 1);
}
}
esp_err_t esp_eth_phy_802_3_reset_hw(phy_802_3_t *phy_802_3)
{
esp_err_t ret = ESP_OK;
@@ -442,14 +456,10 @@ esp_err_t esp_eth_phy_802_3_reset_hw(phy_802_3_t *phy_802_3)
gpio_func_sel(phy_802_3->reset_gpio_num, PIN_FUNC_GPIO);
gpio_set_level(phy_802_3->reset_gpio_num, 0);
gpio_output_enable(phy_802_3->reset_gpio_num);
if (phy_802_3->hw_reset_assert_time_us < 10000) {
esp_rom_delay_us(phy_802_3->hw_reset_assert_time_us);
} else {
vTaskDelay(pdMS_TO_TICKS(phy_802_3->hw_reset_assert_time_us/1000));
}
phy_802_3_delay_us(phy_802_3->hw_reset_assert_time_us);
gpio_set_level(phy_802_3->reset_gpio_num, 1);
if (phy_802_3->post_hw_reset_delay_ms > 0) {
vTaskDelay(pdMS_TO_TICKS(phy_802_3->post_hw_reset_delay_ms));
phy_802_3_delay_us((uint32_t)phy_802_3->post_hw_reset_delay_ms * 1000);
}
return ESP_OK;
}