fix(test_rtc_wdt): Fixed CI test failures for RTC WDT by increasing margin

The CI tests for RTC WDT test app were failing because we allowed only
20% margin between configured vs actual timeout of wdt. However, the
RC oscillator accuracy on some boards is very poor and it results in
almost 25% difference between configured and actual timeout. Hence,
increased the failure margin from 20% to 30%. Also some boards like
ESP32P4 have known problem and gives timeout after twice the configured
time. Hence, increased the wdt interrupt wait time to three times the
configured value, so we don't miss the interrupts for such boards.

components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/test_rtc_wdt.c

@@ -22,7 +22,7 @@
  * the timing accuracy is not very precise, and may vary from chip to chip.
  * So, using some margin for the timeout checks.
  */
-#define WDT_TIMEOUT_MARGIN_MS(X) (X * 20 / 100)  // 20% margin
+#define WDT_TIMEOUT_MARGIN_MS(X) (X * 30 / 100)  // 30% margin
 
 static const uint32_t wdt_stage_timeout_ms[] = {
     100,  // Stage-0 timeout in ms
@@ -113,7 +113,7 @@ TEST_CASE("RTC WDT triggers interrupt at expected time for all stages", "[rtc_wd
         /* Mark the start time afresh for each stage */
         wdt_start_time[stage] = esp_timer_get_time();
         wdt_int_triggered = false;
-        wait_for_interrupt(wdt_stage_timeout_ms[stage] * 2); // Wait for twice the stage timeout
+        wait_for_interrupt(wdt_stage_timeout_ms[stage] * 3); // Wait for three times the stage timeout at max
         printf("Stage-%d interrupt received for RTC WDT\n", stage);
         TEST_ASSERT_TRUE_MESSAGE(wdt_int_triggered, "RTC WDT interrupt did not trigger!");
     }