mirror of
https://github.com/espressif/esp-idf.git
synced 2026-09-22 13:01:16 +03:00
test(aes): add aes psram ecc test
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@@ -44,10 +44,6 @@
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#include "aes/esp_aes_gcm.h"
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#endif
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#ifdef SOC_GDMA_EXT_MEM_ENC_ALIGNMENT
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#include "hal/efuse_hal.h"
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#endif /* SOC_GDMA_EXT_MEM_ENC_ALIGNMENT */
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/* Max size of each chunk to process when output buffer is in unaligned external ram
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must be a multiple of block size
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*/
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@@ -5,6 +5,7 @@ components/mbedtls/test_apps/mbedtls_ut:
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- if: CONFIG_NAME == "aes_no_hw" and SOC_AES_SUPPORTED != 1
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- if: CONFIG_NAME == "psram" and SOC_SPIRAM_SUPPORTED != 1
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- if: CONFIG_NAME == "psram_all_ext" and SOC_SPIRAM_SUPPORTED != 1
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- if: CONFIG_NAME == "psram_ecc" and (SOC_SPIRAM_SUPPORTED != 1 or SOC_PSRAM_DMA_CAPABLE != 1 or SOC_AES_SUPPORT_DMA != 1 or IDF_TARGET == "esp32s2")
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- if: CONFIG_NAME == "psram_all_ext_flash_enc" and SOC_SPIRAM_SUPPORTED != 1
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- if: CONFIG_NAME == "psram_all_ext_flash_enc_f4r8" and IDF_TARGET != "esp32s3"
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- if: CONFIG_NAME == "ecdsa_sign" and SOC_ECDSA_SUPPORTED != 1
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@@ -1846,6 +1846,105 @@ TEST_CASE("mbedtls AES internal mem alignment tests", "[aes]")
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#ifdef CONFIG_SPIRAM_USE_MALLOC
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#if CONFIG_SPIRAM_ECC_ENABLE && SOC_AES_SUPPORT_DMA
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#define TEST_AES_PAYLOAD_LEN 53
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struct aes_payload_sim_hdr {
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uint8_t type;
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uint8_t fc;
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uint8_t seq;
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uint8_t len;
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uint8_t data[];
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} __attribute__((packed));
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static void aes_psram_ecc_cfb128_inplace_test(void)
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{
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const size_t pkt_len = sizeof(struct aes_payload_sim_hdr) + TEST_AES_PAYLOAD_LEN;
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struct aes_payload_sim_hdr *pkt = heap_caps_aligned_alloc(16, pkt_len, PSRAM_DMA_CAPS);
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uint8_t *backup = heap_caps_malloc(TEST_AES_PAYLOAD_LEN, INTERNAL_DMA_CAPS);
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uint8_t key[16];
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uint8_t iv[16];
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psa_key_id_t key_id;
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psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT;
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psa_status_t status;
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size_t output_len;
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size_t total_len;
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TEST_ASSERT_NOT_NULL(pkt);
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TEST_ASSERT_NOT_NULL(backup);
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TEST_ASSERT_TRUE(esp_ptr_external_ram(pkt));
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TEST_ASSERT_EQUAL_UINT32(0, (uintptr_t)pkt & 0x0F);
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TEST_ASSERT_EQUAL_UINT32(sizeof(struct aes_payload_sim_hdr) & 0x0F, (uintptr_t)pkt->data & 0x0F);
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pkt->type = 0x13;
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pkt->fc = 0x04;
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pkt->seq = 1;
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pkt->len = TEST_AES_PAYLOAD_LEN;
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for (size_t i = 0; i < TEST_AES_PAYLOAD_LEN; i++) {
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pkt->data[i] = 0x3C + (uint8_t)(i & 0x0F);
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}
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memcpy(backup, pkt->data, TEST_AES_PAYLOAD_LEN);
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memset(key, 0x5A, sizeof(key));
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memset(iv, 0xA5, sizeof(iv));
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iv[0] = 3;
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status = psa_crypto_init();
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TEST_ASSERT_EQUAL(PSA_SUCCESS, status);
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psa_set_key_usage_flags(&attributes, PSA_KEY_USAGE_ENCRYPT | PSA_KEY_USAGE_DECRYPT);
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psa_set_key_algorithm(&attributes, PSA_ALG_CFB);
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psa_set_key_type(&attributes, PSA_KEY_TYPE_AES);
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psa_set_key_bits(&attributes, 128);
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status = psa_import_key(&attributes, key, sizeof(key), &key_id);
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TEST_ASSERT_EQUAL(PSA_SUCCESS, status);
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psa_cipher_operation_t operation = PSA_CIPHER_OPERATION_INIT;
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status = psa_cipher_encrypt_setup(&operation, key_id, PSA_ALG_CFB);
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TEST_ASSERT_EQUAL(PSA_SUCCESS, status);
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status = psa_cipher_set_iv(&operation, iv, sizeof(iv));
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TEST_ASSERT_EQUAL(PSA_SUCCESS, status);
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total_len = 0;
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status = psa_cipher_update(&operation, pkt->data, TEST_AES_PAYLOAD_LEN, pkt->data, TEST_AES_PAYLOAD_LEN, &output_len);
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TEST_ASSERT_EQUAL(PSA_SUCCESS, status);
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total_len += output_len;
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status = psa_cipher_finish(&operation, pkt->data + output_len, TEST_AES_PAYLOAD_LEN - output_len, &output_len);
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TEST_ASSERT_EQUAL(PSA_SUCCESS, status);
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total_len += output_len;
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TEST_ASSERT_EQUAL(TEST_AES_PAYLOAD_LEN, total_len);
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memset(iv, 0xA5, sizeof(iv));
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iv[0] = 3;
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psa_cipher_abort(&operation);
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operation = (psa_cipher_operation_t)PSA_CIPHER_OPERATION_INIT;
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status = psa_cipher_decrypt_setup(&operation, key_id, PSA_ALG_CFB);
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TEST_ASSERT_EQUAL(PSA_SUCCESS, status);
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status = psa_cipher_set_iv(&operation, iv, sizeof(iv));
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TEST_ASSERT_EQUAL(PSA_SUCCESS, status);
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total_len = 0;
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status = psa_cipher_update(&operation, pkt->data, TEST_AES_PAYLOAD_LEN, pkt->data, TEST_AES_PAYLOAD_LEN, &output_len);
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TEST_ASSERT_EQUAL(PSA_SUCCESS, status);
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total_len += output_len;
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status = psa_cipher_finish(&operation, pkt->data + output_len, TEST_AES_PAYLOAD_LEN - output_len, &output_len);
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TEST_ASSERT_EQUAL(PSA_SUCCESS, status);
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total_len += output_len;
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TEST_ASSERT_EQUAL(TEST_AES_PAYLOAD_LEN, total_len);
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TEST_ASSERT_EQUAL_MEMORY(backup, pkt->data, TEST_AES_PAYLOAD_LEN);
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psa_cipher_abort(&operation);
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psa_destroy_key(key_id);
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free(backup);
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free(pkt);
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}
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TEST_CASE("mbedtls AES PSRAM ECC CFB128 in-place test", "[aes][psram_ecc_dma]")
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{
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aes_psram_ecc_cfb128_inplace_test();
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}
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#endif // CONFIG_SPIRAM_ECC_ENABLE && SOC_AES_SUPPORT_DMA
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void aes_psram_one_buf_ctr_test(void)
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{
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psa_key_id_t key_id;
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@@ -5,6 +5,15 @@ from pytest_embedded import Dut
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from pytest_embedded_idf.utils import idf_parametrize
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from pytest_embedded_idf.utils import soc_filtered_targets
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# esp32s2 has PSRAM DMA and AES DMA, but no PSRAM ECC Kconfig option.
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PSRAM_ECC_DMA_TARGETS = [
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target
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for target in soc_filtered_targets(
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'SOC_SPIRAM_SUPPORTED == 1 and SOC_PSRAM_DMA_CAPABLE == 1 and SOC_AES_SUPPORT_DMA == 1'
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)
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if target != 'esp32s2'
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]
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@pytest.mark.generic
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@pytest.mark.temp_skip_ci(targets=['esp32h4'], reason='can not pass') # TODO: IDF-15675
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@@ -53,6 +62,19 @@ def test_mbedtls_psram(dut: Dut) -> None:
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dut.run_all_single_board_cases(timeout=180)
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@pytest.mark.generic
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@pytest.mark.parametrize(
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'config',
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[
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'psram_ecc',
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],
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indirect=True,
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)
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@idf_parametrize('target', PSRAM_ECC_DMA_TARGETS, indirect=['target'])
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def test_mbedtls_psram_ecc(dut: Dut) -> None:
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dut.run_all_single_board_cases(group='aes', timeout=180)
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@pytest.mark.flash_encryption_psram
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@pytest.mark.parametrize(
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'config',
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@@ -0,0 +1,5 @@
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CONFIG_SPIRAM=y
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CONFIG_SPIRAM_ECC_ENABLE=y
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CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=0
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CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM=y
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CONFIG_ESP_INT_WDT_TIMEOUT_MS=800
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