Merge branch 'fix/cmakev2-bootloader-spiram-source-guards_v6.0' into 'release/v6.0'

fix(esp_hw_support): guard SPIRAM uses with !BOOTLOADER_BUILD (v6.0)

See merge request espressif/esp-idf!48685
This commit is contained in:
Roland Dobai
2026-06-29 07:42:44 +02:00
4 changed files with 15 additions and 15 deletions
+7 -7
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2010-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2010-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -12,7 +12,7 @@
#include "soc/soc_caps.h"
#include "esp_attr.h"
#include "esp_memory_utils.h"
#if CONFIG_SPIRAM
#if !BOOTLOADER_BUILD && CONFIG_SPIRAM
#include "esp_private/esp_psram_extram.h"
#endif
@@ -22,7 +22,7 @@ bool esp_ptr_dma_ext_capable(const void *p)
#if !SOC_PSRAM_DMA_CAPABLE
return false;
#endif //!SOC_PSRAM_DMA_CAPABLE
#if CONFIG_SPIRAM
#if !BOOTLOADER_BUILD && CONFIG_SPIRAM
return esp_psram_check_ptr_addr(p);
#else
return false;
@@ -35,7 +35,7 @@ bool esp_ptr_executable(const void *p)
return (ip >= SOC_IROM_LOW && ip < SOC_IROM_HIGH)
|| (ip >= SOC_IRAM_LOW && ip < SOC_IRAM_HIGH)
|| (ip >= SOC_IROM_MASK_LOW && ip < SOC_IROM_MASK_HIGH)
#if SOC_SPIRAM_SUPPORTED && CONFIG_SPIRAM
#if !BOOTLOADER_BUILD && SOC_SPIRAM_SUPPORTED && CONFIG_SPIRAM
|| esp_ptr_external_ram(p)
#endif
#if defined(SOC_CACHE_APP_LOW) && defined(CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE)
@@ -61,7 +61,7 @@ bool esp_ptr_byte_accessible(const void *p)
* additional check is required */
r |= (ip >= SOC_RTC_DRAM_LOW && ip < SOC_RTC_DRAM_HIGH);
#endif
#if CONFIG_SPIRAM
#if !BOOTLOADER_BUILD && CONFIG_SPIRAM
r |= esp_psram_check_ptr_addr(p);
#endif
#if CONFIG_ESP32S3_DATA_CACHE_16KB
@@ -81,14 +81,14 @@ bool esp_ptr_external_ram(const void *p)
#if !SOC_SPIRAM_SUPPORTED
return false;
#endif //!SOC_SPIRAM_SUPPORTED
#if CONFIG_SPIRAM
#if !BOOTLOADER_BUILD && CONFIG_SPIRAM
return esp_psram_check_ptr_addr(p);
#else
return false;
#endif //CONFIG_SPIRAM
}
#if CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM
#if !BOOTLOADER_BUILD && CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM
bool esp_stack_ptr_in_extram(uint32_t sp)
{
//Check if stack ptr is on PSRAM, and 16 byte aligned.
@@ -9,9 +9,9 @@
#include "esp_cpu.h"
#include "esp_fault.h"
#include "esp32c5/rom/rom_layout.h"
#if CONFIG_SPIRAM
#if !BOOTLOADER_BUILD && CONFIG_SPIRAM
#include "esp_private/esp_psram_extram.h"
#endif /* CONFIG_SPIRAM */
#endif /* !BOOTLOADER_BUILD && CONFIG_SPIRAM */
#ifdef BOOTLOADER_BUILD
// Without L bit set
@@ -10,9 +10,9 @@
#include "esp_cpu.h"
#include "esp_fault.h"
#include "esp32c61/rom/rom_layout.h"
#if CONFIG_SPIRAM
#if !BOOTLOADER_BUILD && CONFIG_SPIRAM
#include "esp_private/esp_psram_extram.h"
#endif /* CONFIG_SPIRAM */
#endif /* !BOOTLOADER_BUILD && CONFIG_SPIRAM */
#ifdef BOOTLOADER_BUILD
// Without L bit set
@@ -11,9 +11,9 @@
#include "esp_fault.h"
#include "hal/cache_ll.h"
#include "riscv/csr.h"
#if CONFIG_SPIRAM
#if !BOOTLOADER_BUILD && CONFIG_SPIRAM
#include "esp_private/esp_psram_extram.h"
#endif /* CONFIG_SPIRAM */
#endif /* !BOOTLOADER_BUILD && CONFIG_SPIRAM */
#include "soc/chip_revision.h"
#include "hal/config.h"
@@ -198,14 +198,14 @@ static void esp_cpu_configure_region_protection_rev_v3(void)
PMP_ENTRY_SET_CACHED_AND_UNCACHED(22, 26, page_aligned_drom_resv_end, PMP_TOR | R);
#else
#if CONFIG_SPIRAM
#if !BOOTLOADER_BUILD && CONFIG_SPIRAM
const uint32_t pmpaddr10 = PMPADDR_NAPOT(SOC_EXTRAM_LOW, SOC_EXTRAM_HIGH);
PMP_RESET_AND_ENTRY_SET(10, pmpaddr10, PMP_NAPOT | CONDITIONAL_RWX);
const uint32_t pmpaddr11 = PMPADDR_NAPOT(CACHE_LL_L2MEM_NON_CACHE_ADDR(SOC_EXTRAM_LOW), CACHE_LL_L2MEM_NON_CACHE_ADDR(SOC_EXTRAM_HIGH));
PMP_RESET_AND_ENTRY_SET(11, pmpaddr11, PMP_NAPOT | CONDITIONAL_RWX);
_Static_assert(SOC_EXTRAM_LOW < SOC_EXTRAM_HIGH, "Invalid I/D_EXTRAM region");
#endif /* CONFIG_SPIRAM */
#endif /* !BOOTLOADER_BUILD && CONFIG_SPIRAM */
const uint32_t pmpaddr12 = PMPADDR_NAPOT(SOC_IROM_LOW, SOC_IROM_HIGH);
PMP_RESET_AND_ENTRY_SET(12, pmpaddr12, PMP_NAPOT | CONDITIONAL_RX);