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feat(debug): add esp32s31 debug probe support

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- add ESP32-S31 debug probe LL, target IDs, capability macros, and GPIO signal mapping
- allow LP probe channels to configure four signal bytes while keeping 16 GPIO outputs
- add HP and LP probe read tests, including LP 32-bit read verification
- keep existing vbat LP probe usage aligned with the new LP channel behavior
This commit is contained in:
morris
2026-05-25 19:03:37 +08:00
parent c23e87b81b
commit e20db709aa
12 changed files with 397 additions and 57 deletions
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components/soc/esp32p4/include/soc/debug_probe_targets.h
+36 -38
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@@ -11,46 +11,44 @@ extern "C" {
#endif
/**
* @brief Target module that we want to attach the probe to
*
* @note The target module ID can be obtained from the prob_grp15[7:0]
* @brief Target module that we want to attach the HP probe to
*/
typedef enum {
DEBUG_PROBE_TARGET_MIPI_CSI_HOST = 0, // MIPI CSI Host
DEBUG_PROBE_TARGET_AXI_GDMA = 1, // AXI GDMA
DEBUG_PROBE_TARGET_I3C = 2, // I3C
DEBUG_PROBE_TARGET_HP_TCM = 3, // HP TCM Memory
DEBUG_PROBE_TARGET_USB_OTG_FS = 4, // USB OTG FS (1.1)
DEBUG_PROBE_TARGET_MIPI_CSI_BRG = 5, // MIPI CSI Bridge
DEBUG_PROBE_TARGET_MSPI_PSRAM = 6, // MSPI PSRAM
DEBUG_PROBE_TARGET_MIPI_DSI_BRG = 7, // MIPI DSI Bridge
DEBUG_PROBE_TARGET_DW_GDMA = 8, // DW GDMA
DEBUG_PROBE_TARGET_AXI_ICM = 9, // AXI ICM matrix
DEBUG_PROBE_TARGET_L2_MEM = 10, // L2 Memory
DEBUG_PROBE_TARGET_BIT_SCRAMBLER = 11, // Bit Scrambler
DEBUG_PROBE_TARGET_MSPI_FLASH = 12, // MSPI Flash
DEBUG_PROBE_TARGET_L1_CACHE = 13, // L1 Cache
DEBUG_PROBE_TARGET_HP_CORE = 14, // HP Core
DEBUG_PROBE_TARGET_L2_CACHE = 15, // L2 Cache
DEBUG_PROBE_TARGET_LP_PROBE_IN = 16, // LP System Probe In
DEBUG_PROBE_TARGET_USJ = 17, // USB Serial JTAG
DEBUG_PROBE_TARGET_EMAC = 18, // EMAC
DEBUG_PROBE_TARGET_JPEG = 19, // JPEG
DEBUG_PROBE_TARGET_PPA = 20, // PPA
DEBUG_PROBE_TARGET_DMA2D = 21, // DMA2D
DEBUG_PROBE_TARGET_LEDC = 22, // LEDC
DEBUG_PROBE_TARGET_SDMMC = 23, // SDMMC
DEBUG_PROBE_TARGET_ISP = 24, // ISP
DEBUG_PROBE_TARGET_USB_OTG_HS = 25, // USB OTG HS (2.0)
DEBUG_PROBE_TARGET_H264 = 26, // H264
DEBUG_PROBE_TARGET_MCPWM0 = 27, // MCPWM0
DEBUG_PROBE_TARGET_MCPWM1 = 28, // MCPWM1
DEBUG_PROBE_TARGET_REGDMA = 29, // REGDMA
DEBUG_PROBE_TARGET_PVT = 30, // PVT
} soc_debug_probe_target_t;
DEBUG_PROBE_TARGET_HP_MIPI_CSI_HOST = 0, // MIPI CSI Host
DEBUG_PROBE_TARGET_HP_AXI_GDMA = 1, // AXI GDMA
DEBUG_PROBE_TARGET_HP_I3C = 2, // I3C
DEBUG_PROBE_TARGET_HP_TCM = 3, // HP TCM Memory
DEBUG_PROBE_TARGET_HP_USB_OTG_FS = 4, // USB OTG FS (1.1)
DEBUG_PROBE_TARGET_HP_MIPI_CSI_BRG = 5, // MIPI CSI Bridge
DEBUG_PROBE_TARGET_HP_MSPI_PSRAM = 6, // MSPI PSRAM
DEBUG_PROBE_TARGET_HP_MIPI_DSI_BRG = 7, // MIPI DSI Bridge
DEBUG_PROBE_TARGET_HP_DW_GDMA = 8, // DW GDMA
DEBUG_PROBE_TARGET_HP_AXI_ICM = 9, // AXI ICM matrix
DEBUG_PROBE_TARGET_HP_L2_MEM = 10, // L2 Memory
DEBUG_PROBE_TARGET_HP_BIT_SCRAMBLER = 11, // Bit Scrambler
DEBUG_PROBE_TARGET_HP_MSPI_FLASH = 12, // MSPI Flash
DEBUG_PROBE_TARGET_HP_L1_CACHE = 13, // L1 Cache
DEBUG_PROBE_TARGET_HP_CORE = 14, // HP Core
DEBUG_PROBE_TARGET_HP_L2_CACHE = 15, // L2 Cache
DEBUG_PROBE_TARGET_HP_LP_PROBE_IN = 16, // LP System Probe In
DEBUG_PROBE_TARGET_HP_USJ = 17, // USB Serial JTAG
DEBUG_PROBE_TARGET_HP_EMAC = 18, // EMAC
DEBUG_PROBE_TARGET_HP_JPEG = 19, // JPEG
DEBUG_PROBE_TARGET_HP_PPA = 20, // PPA
DEBUG_PROBE_TARGET_HP_DMA2D = 21, // DMA2D
DEBUG_PROBE_TARGET_HP_LEDC0 = 22, // LEDC0
DEBUG_PROBE_TARGET_HP_SDMMC = 23, // SDMMC
DEBUG_PROBE_TARGET_HP_ISP = 24, // ISP
DEBUG_PROBE_TARGET_HP_USB_OTG_HS = 25, // USB OTG HS (2.0)
DEBUG_PROBE_TARGET_HP_H264 = 26, // H264
DEBUG_PROBE_TARGET_HP_MCPWM0 = 27, // MCPWM0
DEBUG_PROBE_TARGET_HP_MCPWM1 = 28, // MCPWM1
DEBUG_PROBE_TARGET_HP_REGDMA = 29, // REGDMA
DEBUG_PROBE_TARGET_HP_PVT = 30, // PVT
} soc_debug_probe_target_hp_t;
/**
* @brief LP probe target module (probe_a_top_sel 0..10)
* @brief Target module that we want to attach the LP probe to
*/
typedef enum {
DEBUG_PROBE_TARGET_LP_PMU = 0, // LP PMU
@@ -62,8 +60,8 @@ typedef enum {
DEBUG_PROBE_TARGET_LP_TOUCH = 6, // LP Touch
DEBUG_PROBE_TARGET_LP_ANA_PERI = 7, // LP Analog Peripherals
DEBUG_PROBE_TARGET_LP_AON_CLKRST = 8, // LP AON Clock/Reset
DEBUG_PROBE_TARGET_LP_SYS_MISC = 9, // LP System Misc
DEBUG_PROBE_TARGET_LP_SYS_PROBE_IN = 10, // LP System Probe In
DEBUG_PROBE_TARGET_LP_MISC = 9, // LP System Misc
DEBUG_PROBE_TARGET_LP_HP_PROBE_IN = 10, // HP System Probe In
} soc_debug_probe_target_lp_t;
#ifdef __cplusplus
components/soc/esp32s31/debug_probe_periph.c
+54
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@@ -0,0 +1,54 @@
/*
* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
*/
#include "soc/gpio_sig_map.h"
#include "soc/lp_gpio_sig_map.h"
#include "soc/debug_probe_periph.h"
const debug_probe_signal_conn_t debug_probe_periph_signals = {
.units = {
[0] = {
.out_sig = {
[0] = HP_PROBE_TOP_OUT0_IDX,
[1] = HP_PROBE_TOP_OUT1_IDX,
[2] = HP_PROBE_TOP_OUT2_IDX,
[3] = HP_PROBE_TOP_OUT3_IDX,
[4] = HP_PROBE_TOP_OUT4_IDX,
[5] = HP_PROBE_TOP_OUT5_IDX,
[6] = HP_PROBE_TOP_OUT6_IDX,
[7] = HP_PROBE_TOP_OUT7_IDX,
[8] = HP_PROBE_TOP_OUT8_IDX,
[9] = HP_PROBE_TOP_OUT9_IDX,
[10] = HP_PROBE_TOP_OUT10_IDX,
[11] = HP_PROBE_TOP_OUT11_IDX,
[12] = HP_PROBE_TOP_OUT12_IDX,
[13] = HP_PROBE_TOP_OUT13_IDX,
[14] = HP_PROBE_TOP_OUT14_IDX,
[15] = HP_PROBE_TOP_OUT15_IDX,
}
},
[1] = {
.out_sig = {
[0] = LP_PROBE_TOP_OUT0_IDX,
[1] = LP_PROBE_TOP_OUT1_IDX,
[2] = LP_PROBE_TOP_OUT2_IDX,
[3] = LP_PROBE_TOP_OUT3_IDX,
[4] = LP_PROBE_TOP_OUT4_IDX,
[5] = LP_PROBE_TOP_OUT5_IDX,
[6] = LP_PROBE_TOP_OUT6_IDX,
[7] = LP_PROBE_TOP_OUT7_IDX,
[8] = LP_PROBE_TOP_OUT8_IDX,
[9] = LP_PROBE_TOP_OUT9_IDX,
[10] = LP_PROBE_TOP_OUT10_IDX,
[11] = LP_PROBE_TOP_OUT11_IDX,
[12] = LP_PROBE_TOP_OUT12_IDX,
[13] = LP_PROBE_TOP_OUT13_IDX,
[14] = LP_PROBE_TOP_OUT14_IDX,
[15] = LP_PROBE_TOP_OUT15_IDX,
}
}
}
};
components/soc/esp32s31/include/soc/Kconfig.soc_caps.in
+12
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@@ -259,6 +259,10 @@ config SOC_CPU_LOCKUP_DEBUG_SUPPORTED
bool
default y
config SOC_DEBUG_PROBE_SUPPORTED
bool
default y
config SOC_WDT_SUPPORTED
bool
default y
@@ -651,6 +655,14 @@ config SOC_CLOCKOUT_SUPPORT_CHANNEL_DIVIDER
bool
default y
config SOC_DEBUG_PROBE_NUM_UNIT
int
default 2
config SOC_DEBUG_PROBE_MAX_OUTPUT_WIDTH
int
default 16
config SOC_RTCIO_PIN_COUNT
int
default 8
components/soc/esp32s31/include/soc/debug_probe_targets.h
+62
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@@ -0,0 +1,62 @@
/*
* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Target module that we want to attach the HP probe to
*/
typedef enum {
DEBUG_PROBE_TARGET_HP_USB_OTG_HS = 0, // USB OTG HS
DEBUG_PROBE_TARGET_HP_AXI_GDMA = 1, // AXI GDMA
DEBUG_PROBE_TARGET_HP_TCM = 3, // HP TCM RAM
DEBUG_PROBE_TARGET_HP_MSPI_PSRAM = 6, // MSPI PSRAM
DEBUG_PROBE_TARGET_HP_AXI_ICM = 9, // HP ICM matrix
DEBUG_PROBE_TARGET_HP_BIT_SCRAMBLER = 11, // Bit Scrambler
DEBUG_PROBE_TARGET_HP_MSPI_FLASH = 12, // MSPI Flash
DEBUG_PROBE_TARGET_HP_CACHE = 13, // Cache
DEBUG_PROBE_TARGET_HP_CORE = 14, // HP Core
DEBUG_PROBE_TARGET_HP_LP_PROBE_IN = 16, // LP System Probe In
DEBUG_PROBE_TARGET_HP_EMAC = 18, // GMAC
DEBUG_PROBE_TARGET_HP_JPEG = 19, // JPEG
DEBUG_PROBE_TARGET_HP_PPA = 20, // PPA
DEBUG_PROBE_TARGET_HP_DMA2D = 21, // DMA2D
DEBUG_PROBE_TARGET_HP_LEDC0 = 22, // LEDC0
DEBUG_PROBE_TARGET_HP_SDMMC = 23, // SDMMC
DEBUG_PROBE_TARGET_HP_LEDC1 = 24, // LEDC1
DEBUG_PROBE_TARGET_HP_MCPWM2 = 25, // MCPWM2
DEBUG_PROBE_TARGET_HP_MCPWM3 = 26, // MCPWM3
DEBUG_PROBE_TARGET_HP_MCPWM0 = 27, // MCPWM0
DEBUG_PROBE_TARGET_HP_MCPWM1 = 28, // MCPWM1
DEBUG_PROBE_TARGET_HP_REGDMA = 29, // REGDMA
DEBUG_PROBE_TARGET_HP_ZERO_DET = 30, // Zero detection
} soc_debug_probe_target_hp_t;
/**
* @brief Target module that we want to attach the LP probe to
*/
typedef enum {
DEBUG_PROBE_TARGET_LP_PMU = 0, // LP PMU
DEBUG_PROBE_TARGET_LP_TCM = 1, // LP TCM
DEBUG_PROBE_TARGET_LP_TSENS = 2, // LP TSENS
DEBUG_PROBE_TARGET_LP_CORE = 3, // LP Core
DEBUG_PROBE_TARGET_LP_ADC = 4, // LP ADC
DEBUG_PROBE_TARGET_LP_SPI = 5, // LP SPI
DEBUG_PROBE_TARGET_LP_TOUCH = 6, // LP Touch
DEBUG_PROBE_TARGET_LP_ANA_PERI = 7, // LP Analog Peripherals
DEBUG_PROBE_TARGET_LP_AON_CLKRST = 8, // LP AON Clock/Reset
DEBUG_PROBE_TARGET_LP_TRNG = 9, // LP TRNG
DEBUG_PROBE_TARGET_LP_MISC = 10, // LP System Misc
DEBUG_PROBE_TARGET_LP_HP_PROBE_IN = 11, // HP System Probe In
} soc_debug_probe_target_lp_t;
#ifdef __cplusplus
}
#endif
components/soc/esp32s31/include/soc/soc_caps.h
+5 -1
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@@ -93,7 +93,7 @@
#define SOC_CLK_TREE_SUPPORTED 1
#define SOC_ASSIST_DEBUG_SUPPORTED 1
#define SOC_CPU_LOCKUP_DEBUG_SUPPORTED 1
// #define SOC_DEBUG_PROBE_SUPPORTED 1 // TODO: [ESP32S31] IDF-14798
#define SOC_DEBUG_PROBE_SUPPORTED 1
#define SOC_WDT_SUPPORTED 1
#define SOC_RTC_WDT_SUPPORTED 1
#define SOC_SPI_FLASH_SUPPORTED 1 // TODO: [ESP32S31] IDF-14777
@@ -249,6 +249,10 @@
#define SOC_GPIO_CLOCKOUT_CHANNEL_NUM (3)
#define SOC_CLOCKOUT_SUPPORT_CHANNEL_DIVIDER (1)
/*-------------------------- DEBUG PROBE CAPS ---------------------------------*/
#define SOC_DEBUG_PROBE_NUM_UNIT (2U) // Unit 0: HP probe, Unit 1: LP probe
#define SOC_DEBUG_PROBE_MAX_OUTPUT_WIDTH (16) // Maximum width of the debug probe output in each unit
/*-------------------------- RTCIO CAPS --------------------------------------*/
#define SOC_RTCIO_PIN_COUNT 8
#define SOC_RTCIO_INPUT_OUTPUT_SUPPORTED 1 /* This macro indicates that the target has separate RTC IOMUX hardware feature,