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feat(rng): refactor rng bootloader to rng ll API

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This commit is contained in:
gaoxu
2026-07-20 17:15:26 +08:00
parent f704fbb5ec
commit d31a63d246
3 changed files with 70 additions and 28 deletions
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components/bootloader_support/src/bootloader_random_esp32h21.c
+3 -25
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@@ -5,36 +5,14 @@
*/
#include "sdkconfig.h"
#include "bootloader_random.h"
#include "soc/lpperi_reg.h"
#include "rom/ets_sys.h"
#include "rom/uart.h"
#include "hal/rng_ll.h"
void bootloader_random_enable(void)
{
// Disable rtc_timer update for rng
SET_PERI_REG_BITS(LPPERI_RNG_CFG_REG, LPPERI_RTC_TIMER_EN, 0, LPPERI_RTC_TIMER_EN_S);
// Enable entropy source of ring
SET_PERI_REG_MASK(LPPERI_RNG_CFG_REG, LPPERI_RNG_SAMPLE_ENABLE);
//For dieharder test
ets_printf("H21: Random bytes (%s) follow:\n", "test");
while (1) {
uint32_t w = READ_PERI_REG(LPPERI_RNG_DATA_SYNC_REG);
ets_printf("rng_data:%d\n", w);
uart_tx_wait_idle(0);
// uart_tx_one_char(w >> 24);
// uart_tx_one_char(w >> 16);
// uart_tx_one_char(w >> 8);
// uart_tx_one_char(w);
}
rng_ll_enable();
}
void bootloader_random_disable(void)
{
// Disable rtc_timer update for rng
SET_PERI_REG_BITS(LPPERI_RNG_CFG_REG, LPPERI_RTC_TIMER_EN, 0, LPPERI_RTC_TIMER_EN_S);
// Disable entropy source of ring
CLEAR_PERI_REG_MASK(LPPERI_RNG_CFG_REG, LPPERI_RNG_SAMPLE_ENABLE);
rng_ll_disable();
}
components/hal/esp32h21/include/hal/rng_ll.h
+66 -2
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@@ -6,26 +6,90 @@
#pragma once
#include <stdbool.h>
#include <stdint.h>
#include "soc/soc.h"
#include "soc/lpperi_reg.h"
#include "soc/wdev_reg.h"
#include "soc/lpperi_struct.h"
#include "hal/lp_clkrst_ll.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Read random data from RNG
*
* @return 32-bit random data
*/
static inline uint32_t rng_ll_read_data(void)
{
return REG_READ(LPPERI_RNG_DATA_REG);
return REG_READ(WDEV_RND_REG);
}
/* For compatibility. */
/**
* @brief Enable or disable RNG sampling.
*
* @param enable True to enable, False to disable
*/
static inline void rng_ll_enable_sample(bool enable)
{
LPPERI.rng_cfg.rng_sample_enable = enable;
}
/**
* @brief Enable or disable rng xor rtc timer.
*
* @param enable True to enable, False to disable
*/
static inline void rng_ll_enable_rtc_timer(bool enable)
{
LPPERI.rng_cfg.rtc_timer_en = enable ? 0x3 : 0x0;
}
/**
* @brief Enable or disable rng xor async rng timer.
*
* @param enable True to enable, False to disable
*/
static inline void rng_ll_enable_rng_timer(bool enable)
{
LPPERI.rng_cfg.rng_timer_en = enable;
}
/**
* @brief Reset RNG.
*/
static inline void rng_ll_reset(void)
{
// ESP32-H21 does not expose a dedicated RNG reset bit.
}
/**
* @brief Enable RNG module
*
* TODO: unify in rng_hal.c
*/
static inline void rng_ll_enable(void)
{
_lp_clkrst_ll_enable_rng_clock(true);
rng_ll_enable_sample(true);
rng_ll_enable_rtc_timer(false);
rng_ll_enable_rng_timer(false);
}
/**
* @brief Disable RNG module
*
* TODO: unify in rng_hal.c
*/
static inline void rng_ll_disable(void)
{
rng_ll_enable_sample(false);
rng_ll_enable_rtc_timer(false);
rng_ll_enable_rng_timer(false);
_lp_clkrst_ll_enable_rng_clock(false);
}
#ifdef __cplusplus
components/soc/esp32h21/include/soc/wdev_reg.h
+1 -1
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@@ -10,4 +10,4 @@
#include "soc/lpperi_reg.h"
/* Hardware random number generator register */
#define WDEV_RND_REG LPPERI_RNG_DATA_REG
#define WDEV_RND_REG LPPERI_RNG_DATA_SYNC_REG