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Merge branch 'fix/psram_dependency' into 'master'

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fix(build_system): cleaned up esp_psram dependencies

See merge request espressif/esp-idf!51934
This commit is contained in:
Marius Vikhammer
2026-08-25 10:39:01 +08:00
parent 76ecf87829 532b433246
commit c931510149
20 changed files with 115 additions and 64 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/esp_driver_dma/CMakeLists.txt
-4
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@@ -53,7 +53,3 @@ idf_component_register(SRCS ${srcs}
PRIV_REQUIRES esp_mm efuse
LDFRAGMENTS "linker.lf"
)
if(CONFIG_SPIRAM)
idf_component_optional_requires(PRIVATE esp_psram)
endif()
components/esp_driver_dma/src/esp_dma_utils.c
+1 -1
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@@ -21,7 +21,7 @@
#include "hal/cache_ll.h"
#include "esp_cache.h"
#if CONFIG_SPIRAM
#include "esp_private/esp_psram_mspi.h"
#include "esp_private/mspi_mem_barrier.h"
#endif
ESP_LOG_ATTR_TAG(TAG, "dma_utils");
components/esp_driver_spi/CMakeLists.txt
+1 -1
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@@ -30,6 +30,6 @@ idf_component_register(
SRCS ${srcs}
INCLUDE_DIRS ${public_include}
REQUIRES esp_pm esp_hal_gpspi esp_driver_dma
PRIV_REQUIRES esp_timer esp_mm esp_driver_gpio spi_flash esp_psram
PRIV_REQUIRES esp_timer esp_mm esp_driver_gpio spi_flash
LDFRAGMENTS "linker.lf"
)
components/esp_driver_spi/src/gpspi/spi_common.c
+1 -1
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@@ -36,7 +36,7 @@
#include "soc/dport_reg.h"
#endif
#if CONFIG_SPIRAM
#include "esp_private/esp_psram_mspi.h"
#include "esp_private/mspi_mem_barrier.h"
#endif
#if CONFIG_SPI_MASTER_ISR_IN_IRAM || CONFIG_SPI_SLAVE_ISR_IN_IRAM
components/esp_driver_spi/test_apps/master/main/CMakeLists.txt
+2 -1
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@@ -21,6 +21,7 @@ endif()
# the component can be registered as WHOLE_ARCHIVE
idf_component_register(
SRCS ${srcs}
PRIV_REQUIRES esp_driver_spi spi_flash esp_timer esp_driver_gpio esp_mm esp_driver_uart
# esp_psram is required for CONFIG_SPIRAM, used by the release configs
PRIV_REQUIRES esp_driver_spi spi_flash esp_timer esp_driver_gpio esp_mm esp_driver_uart esp_psram
WHOLE_ARCHIVE
)
components/esp_driver_spi/test_apps/slave/main/CMakeLists.txt
+2 -1
View File
@@ -10,6 +10,7 @@ set(srcs
# the component can be registered as WHOLE_ARCHIVE
idf_component_register(
SRCS ${srcs}
PRIV_REQUIRES esp_driver_spi spi_flash esp_driver_gpio
# esp_psram is required for CONFIG_SPIRAM, used by the release configs
PRIV_REQUIRES esp_driver_spi spi_flash esp_driver_gpio esp_psram
WHOLE_ARCHIVE
)
components/esp_driver_uart/CMakeLists.txt
+1 -1
View File
@@ -35,7 +35,7 @@ endif()
if(${target} STREQUAL "linux")
set(priv_requires esp_ringbuf)
else()
set(priv_requires esp_pm esp_driver_gpio esp_driver_dma esp_ringbuf esp_mm esp_psram)
set(priv_requires esp_pm esp_driver_gpio esp_driver_dma esp_ringbuf esp_mm)
endif()
idf_component_register(
components/esp_driver_uart/src/uhci.c
+5 -1
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@@ -32,7 +32,9 @@
#include "esp_private/gdma.h"
#include "esp_private/esp_dma_utils.h"
#include "esp_private/gdma_link.h"
#include "esp_private/esp_psram_mspi.h"
#if CONFIG_SPIRAM
#include "esp_private/mspi_mem_barrier.h"
#endif
#include "uhci_private.h"
#include "esp_memory_utils.h"
#include "esp_cache.h"
@@ -142,9 +144,11 @@ static bool uhci_gdma_rx_callback_done(gdma_channel_handle_t dma_chan, gdma_even
.flags.totally_received = frame_end,
};
#if CONFIG_SPIRAM
if (esp_ptr_external_ram(evt_data.data)) {
esp_psram_mspi_mb();
}
#endif
// DMA just finished writing the node's buffer. Because the descriptor link is circular,
// the same buffer region gets overwritten on every loop. On targets where the buffer is
components/esp_hw_support/CMakeLists.txt
+3 -1
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@@ -17,6 +17,7 @@ set(public_include_dirs "include" "include/soc"
"mspi/mspi_timing_tuning/include" "mspi/mspi_timing_tuning/tuning_scheme_impl/include"
"mspi/mspi_intr/include"
"mspi/esp_mspi_align/include"
"mspi/mspi_mem_barrier/include"
"power_supply/include" "modem/include")
if(EXISTS "${CMAKE_CURRENT_LIST_DIR}/include/soc/${target}")
@@ -73,7 +74,8 @@ if(NOT non_os_build)
"port/${target}/esp_clk_tree.c"
"spi_bus_lock.c"
"heap_align_hw.c"
"clk_utils.c")
"clk_utils.c"
"mspi/mspi_mem_barrier/mspi_mem_barrier.c")
if(CONFIG_SOC_USB_OTG_SUPPORTED)
list(APPEND srcs "usb_phy/usb_phy.c")
endif()
components/esp_hw_support/mspi/mspi_mem_barrier/include/esp_private/mspi_mem_barrier.h
+37
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@@ -0,0 +1,37 @@
/*
* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include "sdkconfig.h"
#include "esp_err.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Initialize the MSPI memory barrier workaround
*
* On targets affected by the MSPI memory barrier hardware issue, this allocates the
* dummy cacheline used by @ref esp_psram_mspi_mb to force a cache writeback/fence. On
* other targets this is a no-op.
*
* @return ESP_OK on success, otherwise an error code
*/
esp_err_t esp_psram_mspi_mb_init(void);
/**
* @brief MSPI memory barrier
*
* Some targets need this workaround after a DMA transfer into PSRAM to make sure the
* data is visible to the CPU. This is a no-op on targets that don't need the workaround.
*/
void esp_psram_mspi_mb(void);
#ifdef __cplusplus
}
#endif
components/esp_hw_support/mspi/mspi_mem_barrier/mspi_mem_barrier.c
+47
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@@ -0,0 +1,47 @@
/*
* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdint.h>
#include "sdkconfig.h"
#include "esp_attr.h"
#include "esp_log.h"
#include "esp_cache.h"
#include "esp_heap_caps.h"
#include "esp_private/mspi_mem_barrier.h"
#define MSPI_MEM_BARRIER_WORKAROUND ((CONFIG_IDF_TARGET_ESP32C5 && CONFIG_ESP32C5_REV_MIN_FULL < 102) || (CONFIG_IDF_TARGET_ESP32C61 && CONFIG_ESP32C61_REV_MIN_FULL < 101))
__attribute__((unused)) ESP_LOG_ATTR_TAG_DRAM(TAG, "mspi_mem_barrier");
#if MSPI_MEM_BARRIER_WORKAROUND
static void *s_psram_mb_dummy_cacheline; //dummy cacheline for cache memory barrier
#endif
esp_err_t esp_psram_mspi_mb_init(void)
{
#if MSPI_MEM_BARRIER_WORKAROUND
s_psram_mb_dummy_cacheline = heap_caps_calloc(1, CONFIG_CACHE_L1_CACHE_LINE_SIZE, MALLOC_CAP_SPIRAM | MALLOC_CAP_CACHE_ALIGNED);
if (!s_psram_mb_dummy_cacheline) {
ESP_EARLY_LOGE(TAG, "Failed to allocate dummy cacheline for PSRAM memory barrier!");
}
#endif
return ESP_OK;
}
void IRAM_ATTR esp_psram_mspi_mb(void)
{
#if MSPI_MEM_BARRIER_WORKAROUND
if (s_psram_mb_dummy_cacheline) {
uint32_t *p = (uint32_t *)s_psram_mb_dummy_cacheline;
*p = (*p + 1) % UINT32_MAX;
__attribute__((unused)) esp_err_t ret = ESP_FAIL;
ret = esp_cache_msync(s_psram_mb_dummy_cacheline, sizeof(uint32_t), ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_UNALIGNED); //malloc is aligned, no need to writeback all
assert(ret == ESP_OK);
asm volatile("fence");
}
#endif
}
components/esp_psram/include/esp_private/esp_psram_mspi.h
-14
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@@ -15,8 +15,6 @@
extern "C" {
#endif
#define ESP_PSRAM_MSPI_MB_WORKAROUND ((CONFIG_IDF_TARGET_ESP32C5 && CONFIG_ESP32C5_REV_MIN_FULL < 102) || (CONFIG_IDF_TARGET_ESP32C61 && CONFIG_ESP32C61_REV_MIN_FULL < 101))
/**
* @brief Register MSPI PSRAM interrupt
*
@@ -37,18 +35,6 @@ esp_err_t esp_psram_mspi_register_isr(void);
*/
esp_err_t esp_psram_mspi_unregister_isr(void);
/**
* @brief Initialize PSRAM MSPI memory barrier
*
* @return ESP_OK on success, otherwise an error code
*/
esp_err_t esp_psram_mspi_mb_init(void);
/**
* @brief PSRAM MSPI memory barrier
*/
void esp_psram_mspi_mb(void);
#ifdef __cplusplus
}
#endif
components/esp_psram/system_layer/esp_psram.c
+1
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@@ -31,6 +31,7 @@
#include "esp_private/esp_mmu_map_private.h"
#include "esp_private/esp_psram_impl.h"
#include "esp_private/esp_psram_mspi.h"
#include "esp_private/mspi_mem_barrier.h"
#include "esp_private/startup_internal.h"
#if SOC_SPIRAM_XIP_SUPPORTED
#include "esp_private/mmu_psram_flash.h"
components/esp_psram/system_layer/esp_psram_mspi.c
-32
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@@ -13,8 +13,6 @@
#include "esp_log.h"
#include "esp_check.h"
#include "esp_intr_alloc.h"
#include "esp_cache.h"
#include "esp_heap_caps.h"
#include "hal/mspi_ll.h"
#include "hal/mspi_periph.h"
#include "esp_private/mspi_intr.h"
@@ -136,33 +134,3 @@ esp_err_t esp_psram_mspi_unregister_isr(void)
}
#endif //#if PSRAM_CTRLR_LL_INTR_EVENT_SUPPORTED
#endif //#if CONFIG_SPIRAM
#if ESP_PSRAM_MSPI_MB_WORKAROUND
static void *s_psram_mb_dummy_cacheline; //dummy cacheline for cache memory barrier
#endif
esp_err_t esp_psram_mspi_mb_init(void)
{
#if ESP_PSRAM_MSPI_MB_WORKAROUND
s_psram_mb_dummy_cacheline = heap_caps_calloc(1, CONFIG_CACHE_L1_CACHE_LINE_SIZE, MALLOC_CAP_SPIRAM | MALLOC_CAP_CACHE_ALIGNED);
if (!s_psram_mb_dummy_cacheline) {
ESP_EARLY_LOGE(TAG, "Failed to allocate dummy cacheline for PSRAM memory barrier!");
}
#endif
return ESP_OK;
}
void IRAM_ATTR esp_psram_mspi_mb(void)
{
#if ESP_PSRAM_MSPI_MB_WORKAROUND
if (s_psram_mb_dummy_cacheline) {
uint32_t *p = (uint32_t *)s_psram_mb_dummy_cacheline;
*p = (*p + 1) % UINT32_MAX;
__attribute__((unused)) esp_err_t ret = ESP_FAIL;
ret = esp_cache_msync(s_psram_mb_dummy_cacheline, sizeof(uint32_t), ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_UNALIGNED); //malloc is aligned, no need to writeback all
assert(ret == ESP_OK);
asm volatile("fence");
}
#endif
}
components/esp_system/CMakeLists.txt
+9 -1
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@@ -195,7 +195,15 @@ endif()
if(NOT BOOTLOADER_BUILD)
if(CONFIG_SPIRAM)
idf_component_optional_requires(PRIVATE esp_psram)
if(IDF_BUILD_V2)
# esp_psram is not required by any component unconditionally, so nothing else
# brings it into the build. Include it here, so that PSRAM support (and its
# startup hook) is part of any build which enables CONFIG_SPIRAM.
idf_component_include(esp_psram)
target_link_libraries(${COMPONENT_TARGET} PRIVATE idf::esp_psram)
else()
idf_component_optional_requires(PRIVATE esp_psram)
endif()
endif()
endif()
components/fatfs/test_apps/flash_wl/main/CMakeLists.txt
+1 -1
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@@ -1,4 +1,4 @@
idf_component_register(SRCS "test_fatfs_flash_wl.c" "test_fatfs_small_partition.c"
INCLUDE_DIRS "."
PRIV_REQUIRES unity spi_flash fatfs vfs test_fatfs_common
PRIV_REQUIRES unity spi_flash fatfs vfs test_fatfs_common esp_psram
WHOLE_ARCHIVE)
components/fatfs/test_apps/sdcard/main/CMakeLists.txt
+1 -1
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@@ -1,6 +1,6 @@
idf_component_register(SRCS "test_fatfs_sdcard_main.c" "test_fatfs_sdspi.c"
INCLUDE_DIRS "."
PRIV_REQUIRES unity fatfs vfs sdmmc test_fatfs_common esp_timer
PRIV_REQUIRES unity fatfs vfs sdmmc test_fatfs_common esp_timer esp_psram
WHOLE_ARCHIVE)
if(CONFIG_SOC_SDMMC_HOST_SUPPORTED)
components/spiffs/test_apps/main/CMakeLists.txt
+1 -1
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@@ -1,5 +1,5 @@
idf_component_register(SRCS test_spiffs.c
PRIV_INCLUDE_DIRS .
PRIV_REQUIRES spiffs unity vfs
PRIV_REQUIRES spiffs unity vfs esp_psram
WHOLE_ARCHIVE
)
components/vfs/test_apps/main/CMakeLists.txt
+1 -1
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@@ -9,6 +9,6 @@ set(src "test_app_main.c" "test_vfs_access.c"
idf_component_register(SRCS ${src}
PRIV_INCLUDE_DIRS . ../include
PRIV_REQUIRES test_utils vfs fatfs spiffs unity lwip wear_levelling cmock
esp_driver_gptimer esp_driver_uart
esp_driver_gptimer esp_driver_uart esp_psram
WHOLE_ARCHIVE
)
examples/network/simple_sniffer/main/CMakeLists.txt
+1 -1
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@@ -1,5 +1,5 @@
idf_component_register(SRCS "simple_sniffer_example_main.c"
"cmd_sniffer.c"
"cmd_pcap.c"
PRIV_REQUIRES console esp_wifi fatfs esp_eth app_trace nvs_flash
PRIV_REQUIRES console esp_wifi fatfs esp_eth app_trace nvs_flash esp_psram
INCLUDE_DIRS ".")