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feat(dac): use default clock source for zero config

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morris
2026-08-26 11:50:52 +08:00
parent 9ff5389763
commit c47382a311
9 changed files with 26 additions and 49 deletions
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1
examples/peripherals/dac/dac_continuous/dac_audio/main/dac_audio_example_main.c
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@@ -83,7 +83,6 @@ void app_main(void)
.desc_num = 4,
.buf_size = 2048,
.freq_hz = CONFIG_EXAMPLE_AUDIO_SAMPLE_RATE,
.offset = 0,
.clk_src = DAC_DIGI_CLK_SRC_APLL, // Using APLL as clock source to get a wider frequency range
/* Assume the data in buffer is 'A B C D E F'
* DAC_CHANNEL_MODE_SIMUL:

2
examples/peripherals/dac/dac_continuous/signal_generator/main/dac_continuous_example_dma.c
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@@ -64,8 +64,6 @@ void example_dac_continuous_by_dma(void)
.desc_num = 8,
.buf_size = 2048,
.freq_hz = EXAMPLE_CONVERT_FREQ_HZ,
.offset = 0,
.clk_src = DAC_DIGI_CLK_SRC_DEFAULT, // If the frequency is out of range, try 'DAC_DIGI_CLK_SRC_APLL'
/* Assume the data in buffer is 'A B C D E F'
* DAC_CHANNEL_MODE_SIMUL:
* - channel 0: A B C D E F

4
examples/peripherals/dac/dac_cosine_wave/main/dac_cosine_example_main.c
View File

@@ -46,8 +46,6 @@ void app_main(void)
dac_cosine_config_t cos0_cfg = {
.chan_id = DAC_CHAN_0,
.freq_hz = 1000, // It will be covered by 8000 in the latter configuration
.clk_src = DAC_COSINE_CLK_SRC_DEFAULT,
.offset = 0,
.phase = DAC_COSINE_PHASE_0,
.atten = DAC_COSINE_ATTEN_DEFAULT,
.flags.force_set_freq = false,
@@ -55,8 +53,6 @@ void app_main(void)
dac_cosine_config_t cos1_cfg = {
.chan_id = DAC_CHAN_1,
.freq_hz = 8000,
.clk_src = DAC_COSINE_CLK_SRC_DEFAULT,
.offset = 0,
.phase = DAC_COSINE_PHASE_180,
.atten = DAC_COSINE_ATTEN_DB_6,
.flags.force_set_freq = true, // set true will allow to overwrite the frequency that set before