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fix(ipc): fixed IPC task ending up in PSRAM
With CONFIG_FREERTOS_PLACE_TASK_STACKS_IN_EXT_RAM enabled IPC task would end up in PSRAM, causing issues with disabling cache
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committed by
luaijun
parent
a3a20a7a27
commit
c41541b83b
@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -18,6 +18,7 @@
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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#include "freertos/idf_additions.h"
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#define IPC_MAX_PRIORITY (configMAX_PRIORITIES - 1)
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@@ -111,8 +112,9 @@ static void esp_ipc_init(void)
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task_name[3] = i + (char)'0';
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s_ipc_mutex[i] = xSemaphoreCreateMutexStatic(&s_ipc_mutex_buffer[i]);
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s_ipc_ack[i] = xSemaphoreCreateBinaryStatic(&s_ipc_ack_buffer[i]);
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BaseType_t res = xTaskCreatePinnedToCore(ipc_task, task_name, IPC_STACK_SIZE, (void*) i,
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IPC_MAX_PRIORITY, &s_ipc_task_handle[i], i);
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BaseType_t res = xTaskCreatePinnedToCoreWithCaps(ipc_task, task_name, IPC_STACK_SIZE, (void*) i,
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IPC_MAX_PRIORITY, &s_ipc_task_handle[i], i,
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MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
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assert(res == pdTRUE);
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(void)res;
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}
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@@ -1,2 +1,2 @@
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| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 | ESP32-S31 | Linux |
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| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- | --------- | ----- |
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| Supported Targets | ESP32 | ESP32-C5 | ESP32-C61 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 | ESP32-S31 |
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| ----------------- | ----- | -------- | --------- | -------- | -------- | -------- | -------- | --------- |
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