fix(pmu_sleep): Wait eFuse memory update after sleep for ESP32H4

This commit is contained in:
Konstantin Kondrashov
2026-05-19 14:11:34 +03:00
parent 9b6aefc567
commit b853ad7091
2 changed files with 20 additions and 1 deletions

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -15,6 +15,7 @@
#include "soc/rtc.h"
#include "soc/pmu_struct.h"
#include "hal/lp_aon_hal.h"
#include "hal/efuse_ll.h"
#include "esp_private/esp_pmu.h"
#include "pmu_param.h"
@@ -295,6 +296,10 @@ uint32_t pmu_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt, uint32_t lslp
bool pmu_sleep_finish(bool dslp)
{
(void)dslp;
// Wait eFuse memory update done.
while (efuse_ll_get_controller_state() != EFUSE_CONTROLLER_STATE_IDLE) { }
return pmu_ll_hp_is_sleep_reject(PMU_instance()->hal->dev);
}

View File

@@ -17,6 +17,15 @@
extern "C" {
#endif
typedef enum {
EFUSE_CONTROLLER_STATE_RESET = 0, ///< efuse_controllerid is on reset state.
EFUSE_CONTROLLER_STATE_IDLE = 1, ///< efuse_controllerid is on idle state.
EFUSE_CONTROLLER_STATE_READ_INIT = 2, ///< efuse_controllerid is on read init state.
EFUSE_CONTROLLER_STATE_READ_BLK0 = 3, ///< efuse_controllerid is on reading block0 state.
EFUSE_CONTROLLER_STATE_BLK0_CRC_CHECK = 4, ///< efuse_controllerid is on checking block0 crc state.
EFUSE_CONTROLLER_STATE_READ_RS_BLK = 5, ///< efuse_controllerid is on reading RS block state.
} efuse_controller_state_t;
// Always inline these functions even no gcc optimization is applied.
/******************* eFuse fields *************************/
@@ -153,6 +162,11 @@ __attribute__((always_inline)) static inline void efuse_ll_rs_bypass_update(void
/******************* eFuse control functions *************************/
__attribute__((always_inline)) static inline uint32_t efuse_ll_get_controller_state(void)
{
return EFUSE.status.state;
}
#ifdef __cplusplus
}
#endif