Mirrors/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-10-02 11:10:54 +03:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'bugfix/rtc_wdt_test_app2_v6.0' into 'release/v6.0'

Browse Source 
fix(test_rtc_wdt): Fixed CI test failures for RTC WDT by increasing margin

See merge request espressif/esp-idf!44512
This commit is contained in:
Jiang Jiang Jian
2026-01-08 20:35:35 +08:00
parent 4c30fdedc7 e8396ccea1
commit adeedd1b7a
1 changed files with 2 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/test_rtc_wdt.c
+2 -2
View File
@@ -22,7 +22,7 @@
* the timing accuracy is not very precise, and may vary from chip to chip. * the timing accuracy is not very precise, and may vary from chip to chip.
* So, using some margin for the timeout checks. * So, using some margin for the timeout checks.
*/ */
#define WDT_TIMEOUT_MARGIN_MS(X) (X * 20 / 100) // 20% margin #define WDT_TIMEOUT_MARGIN_MS(X) (X * 30 / 100) // 30% margin
static const uint32_t wdt_stage_timeout_ms[] = { static const uint32_t wdt_stage_timeout_ms[] = {
100, // Stage-0 timeout in ms 100, // Stage-0 timeout in ms
@@ -113,7 +113,7 @@ TEST_CASE("RTC WDT triggers interrupt at expected time for all stages", "[rtc_wd
/* Mark the start time afresh for each stage */ /* Mark the start time afresh for each stage */
wdt_start_time[stage] = esp_timer_get_time(); wdt_start_time[stage] = esp_timer_get_time();
wdt_int_triggered = false; wdt_int_triggered = false;
wait_for_interrupt(wdt_stage_timeout_ms[stage] * 2); // Wait for twice the stage timeout wait_for_interrupt(wdt_stage_timeout_ms[stage] * 3); // Wait for three times the stage timeout at max
printf("Stage-%d interrupt received for RTC WDT\n", stage); printf("Stage-%d interrupt received for RTC WDT\n", stage);
TEST_ASSERT_TRUE_MESSAGE(wdt_int_triggered, "RTC WDT interrupt did not trigger!"); TEST_ASSERT_TRUE_MESSAGE(wdt_int_triggered, "RTC WDT interrupt did not trigger!");
} }