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Merge branch 'bugfix/mac_deinit_esp32_v5.4' into 'release/v5.4'

Browse Source 
fix(wifi): fix some wifi bugs 260304(Backport v5.4)

See merge request espressif/esp-idf!42489
This commit is contained in:
Jiang Jiang Jian
2026-03-12 09:56:50 +08:00
parent 570b5c5a7a 8c5f5aec7a
commit a9c6958c6e
43 changed files with 344 additions and 45 deletions
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13
components/esp_coex/src/coexist.c
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@@ -17,9 +17,7 @@
#include "esp_private/gpio.h"
#endif
#if SOC_MODEM_CLOCK_IS_INDEPENDENT
#include "esp_private/esp_modem_clock.h"
#endif
#include "esp_private/periph_ctrl.h"
#if CONFIG_ESP_COEX_SW_COEXIST_ENABLE && CONFIG_SOC_IEEE802154_SUPPORTED
#include "esp_coex_i154.h"
@@ -267,16 +265,11 @@ esp_err_t esp_enable_extern_coex_gpio_pin(external_coex_wire_t wire_type, esp_ex
return ESP_ERR_INVALID_ARG;
#endif /* SOC_EXTERNAL_COEX_ADVANCE */
}
#if SOC_MODEM_CLOCK_IS_INDEPENDENT
modem_clock_module_enable(PERIPH_COEX_MODULE);
#endif
coex_module_enable();
#if SOC_EXTERNAL_COEX_ADVANCE
esp_coex_external_params(g_external_coex_params, 0, 0);
#endif
esp_err_t ret = esp_coex_external_set(EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_HIGH);
#if SOC_MODEM_CLOCK_IS_INDEPENDENT
modem_clock_module_disable(PERIPH_COEX_MODULE);
#endif
if (ESP_OK != ret) {
return ESP_FAIL;
}
@@ -286,7 +279,7 @@ esp_err_t esp_enable_extern_coex_gpio_pin(external_coex_wire_t wire_type, esp_ex
esp_err_t esp_disable_extern_coex_gpio_pin(void)
{
esp_coex_external_stop();
coex_module_disable();
return ESP_OK;
}
#endif /* External Coex */

22
components/esp_coex/src/coexist_debug.c
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2018-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2018-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -19,9 +19,7 @@
#include "soc/gpio_sig_map.h"
#include "esp_rom_gpio.h"
#include "soc/soc.h"
#if SOC_MODEM_CLOCK_IS_INDEPENDENT
#include "esp_private/esp_modem_clock.h"
#endif
#include "esp_private/periph_ctrl.h"
#if CONFIG_ESP_COEX_GPIO_DEBUG
static char* TAG = "coexist debug";
@@ -192,13 +190,9 @@ esp_err_t esp_coexist_debug_matrix_init(int evt, int sig, bool rev)
esp_err_t esp_coexist_gpio_debug_matrix_config(int event)
{
#if SOC_MODEM_CLOCK_IS_INDEPENDENT
modem_clock_module_enable(PERIPH_COEX_MODULE);
#endif
coex_module_enable();
esp_err_t ret = coex_gpio_debug_matrix_config(event);
#if SOC_MODEM_CLOCK_IS_INDEPENDENT
modem_clock_module_disable(PERIPH_COEX_MODULE);
#endif
coex_module_disable();
return ret;
}
@@ -265,14 +259,10 @@ esp_err_t esp_coexist_debug_init(void)
gpio_set_level(s_io_nums[i], false);
}
#if SOC_MODEM_CLOCK_IS_INDEPENDENT
modem_clock_module_enable(PERIPH_COEX_MODULE);
#endif
coex_module_enable();
/* Init coexist hardware signal */
ESP_ERROR_CHECK(coex_gpio_debug_matrix_init());
#if SOC_MODEM_CLOCK_IS_INDEPENDENT
modem_clock_module_disable(PERIPH_COEX_MODULE);
#endif
coex_module_disable();
return ESP_OK;
}

6
components/esp_coex/test_apps/.build-test-rules.yml Normal file
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@@ -0,0 +1,6 @@
# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
components/esp_coex/test_apps/:
disable:
- if: IDF_TARGET not in ["esp32s2", "esp32s3", "esp32c3", "esp32c2", "esp32c6", "esp32h2"]
reason: only supported with s2, s3, c3, c2, c6 and h2

10
components/esp_coex/test_apps/external_coex_function/CMakeLists.txt Normal file
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@@ -0,0 +1,10 @@
#This is the project CMakeLists.txt file for the test subproject
cmake_minimum_required(VERSION 3.22)
set(EXTRA_COMPONENT_DIRS "$ENV{IDF_PATH}/tools/unit-test-app/components")
# "Trim" the build. Include the minimal set of components, main, and anything it depends on.
set(COMPONENTS main)
include($ENV{IDF_PATH}/tools/cmake/project.cmake)
project(external_coex_function)

3
components/esp_coex/test_apps/external_coex_function/README.md Normal file
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@@ -0,0 +1,3 @@
| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 |
| ----------------- | -------- | -------- | -------- | -------- | -------- | -------- |

4
components/esp_coex/test_apps/external_coex_function/main/CMakeLists.txt Normal file
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@@ -0,0 +1,4 @@
idf_component_register(SRC_DIRS .
PRIV_INCLUDE_DIRS . ${CMAKE_CURRENT_BINARY_DIR}
PRIV_REQUIRES cmock test_utils nvs_flash esp_common esp_wifi esp_event esp_coex
WHOLE_ARCHIVE)

48
components/esp_coex/test_apps/external_coex_function/main/app_main.c Normal file
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@@ -0,0 +1,48 @@
/*
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Unlicense OR CC0-1.0
*/
#include "unity.h"
#include "nvs_flash.h"
#include "nvs.h"
#include "esp_err.h"
#include "esp_netif.h"
#include "esp_heap_caps.h"
// Some resources are lazy allocated in wifi or event handler
#define TEST_MEMORY_LEAK_THRESHOLD (-1536)
static size_t before_free_8bit;
static size_t before_free_32bit;
static void check_leak(size_t before_free, size_t after_free, const char *type)
{
ssize_t delta = after_free - before_free;
printf("MALLOC_CAP_%s: Before %u bytes free, After %u bytes free (delta %d)\n", type, before_free, after_free, delta);
TEST_ASSERT_MESSAGE(delta >= TEST_MEMORY_LEAK_THRESHOLD, "memory leak");
}
void setUp(void)
{
before_free_8bit = heap_caps_get_free_size(MALLOC_CAP_8BIT);
before_free_32bit = heap_caps_get_free_size(MALLOC_CAP_32BIT);
}
void tearDown(void)
{
size_t after_free_8bit = heap_caps_get_free_size(MALLOC_CAP_8BIT);
size_t after_free_32bit = heap_caps_get_free_size(MALLOC_CAP_32BIT);
check_leak(before_free_8bit, after_free_8bit, "8BIT");
check_leak(before_free_32bit, after_free_32bit, "32BIT");
}
void app_main(void)
{
ESP_ERROR_CHECK(nvs_flash_init());
ESP_ERROR_CHECK(esp_netif_init());
unity_run_menu();
ESP_ERROR_CHECK(esp_netif_deinit());
ESP_ERROR_CHECK(nvs_flash_deinit());
}

65
components/esp_coex/test_apps/external_coex_function/main/test_enable_extern_coex.c Normal file
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@@ -0,0 +1,65 @@
/*
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Unlicense OR CC0-1.0
*/
#include "unity.h"
#include "esp_wifi.h"
#include "esp_coexist.h"
#include "soc/soc_caps.h"
#include "esp_log.h"
#include "test_utils.h"
#include "unity_test_utils.h"
#include "esp_private/periph_ctrl.h"
#define TAG "test_external_coex"
#define EMPH_STR(s) "****** "s" ******"
TEST_CASE("enable external coex", "[external_coex]")
{
#if !SOC_MODEM_CLOCK_IS_INDEPENDENT && !CONFIG_IDF_TARGET_ESP32C2
wifi_init_config_t cfg = WIFI_INIT_CONFIG_DEFAULT();
cfg.nvs_enable = false;
ESP_LOGI(TAG, EMPH_STR("esp_wifi_init"));
TEST_ESP_OK(esp_wifi_init(&cfg));
#endif
#if CONFIG_IDF_TARGET_ESP32S2
#define EXTERNAL_COEX_CONF 0x60035118
#define WDEV_RW_BT_COEX_EN (BIT(0))
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
#define EXTERNAL_COEX_CONF 0x60035084
#define WDEV_RW_BT_COEX_EN (BIT(0))
#elif CONFIG_IDF_TARGET_ESP32C2
#define EXTERNAL_COEX_CONF 0x6004C4A0
#define WDEV_RW_BT_COEX_EN (BIT(9))
#elif CONFIG_IDF_TARGET_ESP32C6
#define EXTERNAL_COEX_CONF 0x600AF4A0
#define WDEV_RW_BT_COEX_EN (BIT(9))
#elif CONFIG_IDF_TARGET_ESP32H2
#define EXTERNAL_COEX_CONF 0x600AD4A0
#define WDEV_RW_BT_COEX_EN (BIT(9))
#endif
esp_extern_coex_work_mode_t mode = EXTERNAL_COEX_LEADER_ROLE;
external_coex_wire_t type = EXTERN_COEX_WIRE_3;
esp_external_coex_gpio_set_t gpio_pin = {.request = 0, .priority = 1, .grant = 2};
TEST_ESP_OK(esp_external_coex_set_work_mode(mode));
TEST_ESP_OK(esp_enable_extern_coex_gpio_pin(type, gpio_pin));
ESP_LOGI(TAG, "external coex config 0x%lx", REG_READ(EXTERNAL_COEX_CONF));
TEST_ASSERT(REG_GET_BIT(EXTERNAL_COEX_CONF, WDEV_RW_BT_COEX_EN));
TEST_ESP_OK(esp_disable_extern_coex_gpio_pin());
coex_module_enable();
TEST_ASSERT(REG_GET_BIT(EXTERNAL_COEX_CONF, WDEV_RW_BT_COEX_EN) == 0);
coex_module_disable();
#if !SOC_MODEM_CLOCK_IS_INDEPENDENT && !CONFIG_IDF_TARGET_ESP32C2
ESP_LOGI(TAG, EMPH_STR("esp_wifi_deinit"));
TEST_ESP_OK(esp_wifi_deinit());
vTaskDelay(1);
#endif
ESP_LOGI(TAG, "test passed...");
}

56
components/esp_coex/test_apps/external_coex_function/pytest_external_coex_function.py Normal file
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@@ -0,0 +1,56 @@
# SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: Unlicense OR CC0-1.0
import pytest
from pytest_embedded import Dut
from pytest_embedded_idf.utils import idf_parametrize
@pytest.mark.generic
@idf_parametrize(
'target', ['esp32h2', 'esp32c3', 'esp32s2', 'esp32s3', 'esp32c6'], indirect=['target']
)
def test_external_coex_unit_test(dut: Dut) -> None:
dut.run_all_single_board_cases()
@pytest.mark.xtal_26mhz
@pytest.mark.generic
@pytest.mark.parametrize(
'config, baud',
[
('esp32c2_xtal26m', '74880'),
],
indirect=True,
)
@idf_parametrize('target', ['esp32c2'], indirect=['target'])
def test_external_coex_unit_test_esp32c2_xtal26m(dut: Dut) -> None:
dut.run_all_single_board_cases()
@pytest.mark.esp32c2eco4
@pytest.mark.xtal_26mhz
@pytest.mark.generic
@pytest.mark.parametrize(
'config, baud',
[
('esp32c2eco4_xtal26m', '74880'),
],
indirect=True,
)
@idf_parametrize('target', ['esp32c2'], indirect=['target'])
def test_external_coex_unit_test_esp32c2eco4_xtal26m(dut: Dut) -> None:
dut.run_all_single_board_cases()
@pytest.mark.esp32c3eco7
@pytest.mark.generic
@pytest.mark.parametrize(
'config',
[
'esp32c3eco7',
],
indirect=True,
)
@idf_parametrize('target', ['esp32c3'], indirect=['target'])
def test_external_coex_unit_test_esp32c3eco7(dut: Dut) -> None:
dut.run_all_single_board_cases()

0
components/esp_coex/test_apps/external_coex_function/sdkconfig.ci Normal file
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2
components/esp_coex/test_apps/external_coex_function/sdkconfig.ci.esp32c2_xtal26m Normal file
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@@ -0,0 +1,2 @@
CONFIG_IDF_TARGET="esp32c2"
CONFIG_XTAL_FREQ_26=y

3
components/esp_coex/test_apps/external_coex_function/sdkconfig.ci.esp32c2eco4_xtal26m Normal file
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@@ -0,0 +1,3 @@
CONFIG_IDF_TARGET="esp32c2"
CONFIG_XTAL_FREQ_26=y
CONFIG_ESP32C2_REV_MIN_200=y

2
components/esp_coex/test_apps/external_coex_function/sdkconfig.ci.esp32c3eco7 Normal file
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@@ -0,0 +1,2 @@
CONFIG_IDF_TARGET="esp32c3"
CONFIG_ESP32C3_REV_MIN_101=y

4
components/esp_coex/test_apps/external_coex_function/sdkconfig.defaults Normal file
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@@ -0,0 +1,4 @@
# ignore task watchdog triggered by unity_run_menu
CONFIG_ESP_TASK_WDT_EN=n
CONFIG_ESP_COEX_EXTERNAL_COEXIST_ENABLE=y

19
components/esp_hw_support/include/esp_private/periph_ctrl.h
View File

@@ -175,6 +175,25 @@ void phy_module_disable(void);
*/
bool phy_module_has_clock_bits(uint32_t mask);
/**
* @brief Enable coex module
*
* @note Calling this function will only enable coex module.
* @note For ESP32S2, ESP32S3, and ESP32C3, this function has no effect because
* the coex module clock is controlled by the modem clock. On these chips,
* you must call esp_wifi_init() to enable the modem clock before using
* external coexistence features.
*/
void coex_module_enable(void);
/**
* @brief Disable coex module
*
* @note Calling this function will only disable coex module.
* @note For ESP32S2, ESP32S3, and ESP32C3, this function has no effect because
* the coex module clock is controlled by the modem clock.
*/
void coex_module_disable(void);
#undef __PERIPH_CTRL_DEPRECATE_ATTR
#ifdef __cplusplus

44
components/esp_hw_support/periph_ctrl.c
View File

@@ -104,6 +104,12 @@ IRAM_ATTR void wifi_bt_common_module_enable(void)
periph_ll_wifi_bt_module_enable_clk();
}
ref_counts[PERIPH_WIFI_BT_COMMON_MODULE]++;
#if CONFIG_IDF_TARGET_ESP32C2
if (ref_counts[PERIPH_COEX_MODULE] == 0) {
periph_ll_coex_module_enable_clk_clear_rst();
}
ref_counts[PERIPH_COEX_MODULE]++;
#endif
portEXIT_CRITICAL_SAFE(&periph_spinlock);
#endif
}
@@ -118,6 +124,12 @@ IRAM_ATTR void wifi_bt_common_module_disable(void)
if (ref_counts[PERIPH_WIFI_BT_COMMON_MODULE] == 0) {
periph_ll_wifi_bt_module_disable_clk();
}
#if CONFIG_IDF_TARGET_ESP32C2
ref_counts[PERIPH_COEX_MODULE]--;
if (ref_counts[PERIPH_COEX_MODULE] == 0) {
periph_ll_coex_module_disable_clk_set_rst();
}
#endif
portEXIT_CRITICAL_SAFE(&periph_spinlock);
#endif
}
@@ -230,4 +242,36 @@ IRAM_ATTR bool phy_module_has_clock_bits(uint32_t mask)
}
return true;
}
IRAM_ATTR void coex_module_enable(void)
{
#if SOC_MODEM_CLOCK_IS_INDEPENDENT
modem_clock_module_enable(PERIPH_COEX_MODULE);
#else
portENTER_CRITICAL_SAFE(&periph_spinlock);
#if CONFIG_IDF_TARGET_ESP32C2
if (ref_counts[PERIPH_COEX_MODULE] == 0) {
periph_ll_coex_module_enable_clk_clear_rst();
}
ref_counts[PERIPH_COEX_MODULE]++;
#endif
portEXIT_CRITICAL_SAFE(&periph_spinlock);
#endif
}
IRAM_ATTR void coex_module_disable(void)
{
#if SOC_MODEM_CLOCK_IS_INDEPENDENT
modem_clock_module_disable(PERIPH_COEX_MODULE);
#else
portENTER_CRITICAL_SAFE(&periph_spinlock);
#if CONFIG_IDF_TARGET_ESP32C2
ref_counts[PERIPH_COEX_MODULE]--;
if (ref_counts[PERIPH_COEX_MODULE] == 0) {
periph_ll_coex_module_disable_clk_set_rst();
}
#endif
portEXIT_CRITICAL_SAFE(&periph_spinlock);
#endif
}
#endif //#if SOC_BT_SUPPORTED || SOC_WIFI_SUPPORTED || SOC_IEEE802154_SUPPORTED

4
components/esp_rom/esp32c2/ld/esp32c2.rom.eco4.ld
View File

@@ -15,7 +15,7 @@ esf_buf_recycle = 0x40001ae8;
hal_mac_tx_set_ppdu = 0x40001af8;
ic_mac_deinit = 0x40001b00;
lmacAdjustTimestamp = 0x40001b10;
lmacDiscardMSDU = 0x40001b18;
/*lmacDiscardMSDU = 0x40001b18;*/
lmacEndFrameExchangeSequence = 0x40001b1c;
lmacMSDUAged = 0x40001b28;
//lmacSetTxFrame = 0x40001b4c;
@@ -30,7 +30,7 @@ pm_sleep = 0x40001bbc;
//pm_tbtt_process = 0x40001bc4;
ppAssembleAMPDU = 0x40001bcc;
ppCalTxAMPDULength = 0x40001bd8;
ppRxFragmentProc = 0x40001c28;
/*ppRxFragmentProc = 0x40001c28;*/
ppRxPkt = 0x40001c2c;
pp_coex_tx_request = 0x40001c54;
/* rcGetSched = 0x40001c88; */

6
components/esp_rom/esp32c2/ld/esp32c2.rom.ld
View File

@@ -711,7 +711,7 @@ wDev_Rxbuf_Deinit = 0x40001e5c;
ppCalTkipMic = 0x40001e60;
wDev_SnifferRxData = 0x40001e64;
hal_crypto_enable = 0x40001e68;
hal_crypto_disable = 0x40001e6c;
/*hal_crypto_disable = 0x40001e6c;*/
wDev_Insert_KeyEntry = 0x40001e70;
wDev_remove_KeyEntry = 0x40001e74;
rc_enable_trc = 0x40001e78;
@@ -896,7 +896,7 @@ dbg_hmac_rxtx_statis_dump = 0x4000202c;
dbg_hmac_statis_dump = 0x40002030;
/* ieee80211_send_action_vendor_spec = 0x40002034; */
/* ieee80211_vnd_lora_ie_size = 0x40002048; */
ieee80211_vnd_ie_size = 0x4000204c;
//ieee80211_vnd_ie_size = 0x4000204c;
ieee80211_add_ssid = 0x40002050;
ieee80211_add_rates = 0x40002054;
/*ieee80211_add_xrates = 0x40002058;*/
@@ -919,7 +919,7 @@ sta_auth_shared = 0x400020a4;
/* cnx_coexist_timeout_process = 0x400020ac; */
ieee80211_alloc_challenge = 0x400020b0;
cnx_assoc_timeout = 0x400020b4;
ieee80211_vnd_ie_set = 0x400020b8;
//ieee80211_vnd_ie_set = 0x400020b8;
ieee80211_vnd_lora_ie_set = 0x400020bc;
ieee80211_add_wme_param = 0x400020c0;
/*ieee80211_add_dsparams = 0x400020c4;*/

2
components/esp_rom/esp32c3/ld/esp32c3.rom.eco7.ld
View File

@@ -8,7 +8,7 @@ esf_buf_alloc_dynamic = 0x400015c0;
esf_buf_recycle = 0x400015c4;
/*hal_mac_tx_set_ppdu = 0x400015d4;*/
ic_mac_deinit = 0x400015dc;
lmacDiscardMSDU = 0x400015f4;
/*lmacDiscardMSDU = 0x400015f4;*/
/*lmacSetTxFrame = 0x40001628;*/
lmacTxDone = 0x4000162c;
/*lmacTxFrame = 0x40001630;*/

4
components/esp_rom/esp32c5/ld/esp32c5.rom.pp.ld
View File

@@ -61,7 +61,7 @@ is_lmac_idle = 0x40000c84;
ic_get_he_rts_threshold_bytes = 0x40000c88;
lmacAdjustTimestamp = 0x40000c8c;
lmacDiscardAgedMSDU = 0x40000c90;
lmacDiscardMSDU = 0x40000c94;
/*lmacDiscardMSDU = 0x40000c94;*/
lmacEndFrameExchangeSequence = 0x40000c98;
lmacIsIdle = 0x40000c9c;
lmacIsLongFrame = 0x40000ca0;
@@ -186,7 +186,7 @@ ppRecycleAmpdu = 0x40000e78;
ppRecycleRxPkt = 0x40000e7c;
ppResortTxAMPDU = 0x40000e80;
ppResumeTxAMPDU = 0x40000e84;
ppRxFragmentProc = 0x40000e88;
/*ppRxFragmentProc = 0x40000e88;*/
/*ppRxPkt = 0x40000e8c;*/
ppRxProtoProc = 0x40000e90;
ppSearchTxQueue = 0x40000e94;

4
components/esp_rom/esp32c61/ld/esp32c61.rom.pp.ld
View File

@@ -66,7 +66,7 @@ is_lmac_idle = 0x40000bf4;
ic_get_he_rts_threshold_bytes = 0x40000bf8;
lmacAdjustTimestamp = 0x40000bfc;
lmacDiscardAgedMSDU = 0x40000c00;
lmacDiscardMSDU = 0x40000c04;
/*lmacDiscardMSDU = 0x40000c04;*/
lmacEndFrameExchangeSequence = 0x40000c08;
lmacIsIdle = 0x40000c0c;
lmacIsLongFrame = 0x40000c10;
@@ -193,7 +193,7 @@ ppRecycleAmpdu = 0x40000df0;
ppRecycleRxPkt = 0x40000df4;
ppResortTxAMPDU = 0x40000df8;
ppResumeTxAMPDU = 0x40000dfc;
ppRxFragmentProc = 0x40000e00;
/*ppRxFragmentProc = 0x40000e00;*/
/*ppRxPkt = 0x40000e04;*/
ppRxProtoProc = 0x40000e08;
ppSearchTxQueue = 0x40000e0c;

2
components/esp_rom/esp32s3/ld/esp32s3.rom.ld
View File

@@ -955,7 +955,7 @@ lmacReachShortLimit = 0x40005394;
lmacRecycleMPDU = 0x400053a0;
lmacRxDone = 0x400053ac;
/*lmacSetTxFrame = 0x400053b8;*/
lmacTxDone = 0x400053c4;
/*lmacTxDone = 0x400053c4;*/
/*lmacTxFrame = 0x400053d0;*/
mac_tx_set_duration = 0x400053dc;
/* mac_tx_set_htsig = 0x400053e8;*/

2
components/esp_wifi/lib

Submodule components/esp_wifi/lib updated: 7d32ed7bce...3c4b11c027

1
components/esp_wifi/test_apps/wifi_function/main/test_wifi_country.c
View File

@@ -56,6 +56,7 @@ TEST_CASE("wifi set country code", "[wifi_init]")
ESP_LOGI(TAG, EMPH_STR("esp_wifi_deinit"));
TEST_ESP_OK(esp_wifi_deinit());
vTaskDelay(1);
ESP_LOGI(TAG, "test passed...");
}

5
components/esp_wifi/test_apps/wifi_function/main/test_wifi_init.c
View File

@@ -60,6 +60,7 @@ static void wifi_driver_can_start_on_APP_CPU_task(void* arg)
TEST_ESP_OK(esp_wifi_init(&cfg));
ESP_LOGI(TAG, EMPH_STR("esp_wifi_deinit..."));
TEST_ESP_OK(esp_wifi_deinit());
vTaskDelay(1);
ESP_LOGI(TAG, EMPH_STR("event_deinit"));
TEST_ESP_OK(event_deinit());
ESP_LOGI(TAG, "exit task...");
@@ -98,6 +99,7 @@ TEST_CASE("Calling esp_wifi_stop() with start", "[wifi_init]")
TEST_ESP_OK(esp_wifi_stop());
ESP_LOGI(TAG, EMPH_STR("esp_wifi_deinit"));
TEST_ESP_OK(esp_wifi_deinit());
vTaskDelay(1);
ESP_LOGI(TAG, EMPH_STR("event_deinit"));
TEST_ESP_OK(event_deinit());
ESP_LOGI(TAG, "test passed...");
@@ -114,6 +116,7 @@ TEST_CASE("Calling esp_wifi_stop() without start", "[wifi_init]")
TEST_ESP_OK(esp_wifi_stop());
ESP_LOGI(TAG, EMPH_STR("esp_wifi_deinit"));
TEST_ESP_OK(esp_wifi_deinit());
vTaskDelay(1);
ESP_LOGI(TAG, EMPH_STR("event_deinit"));
TEST_ESP_OK(event_deinit());
ESP_LOGI(TAG, "test passed...");
@@ -134,6 +137,7 @@ TEST_CASE("Calling esp_wifi_deinit() without stop", "[wifi_init]")
TEST_ESP_OK(esp_wifi_stop());
ESP_LOGI(TAG, EMPH_STR("esp_wifi_deinit"));
TEST_ESP_OK(esp_wifi_deinit());
vTaskDelay(1);
ESP_LOGI(TAG, EMPH_STR("event_deinit"));
TEST_ESP_OK(event_deinit());
ESP_LOGI(TAG, "test passed...");
@@ -150,6 +154,7 @@ TEST_CASE("Calling esp_wifi_connect() without start", "[wifi_init]")
TEST_ESP_ERR(ESP_ERR_WIFI_NOT_STARTED, esp_wifi_connect());
ESP_LOGI(TAG, EMPH_STR("esp_wifi_deinit"));
TEST_ESP_OK(esp_wifi_deinit());
vTaskDelay(1);
ESP_LOGI(TAG, EMPH_STR("event_deinit"));
TEST_ESP_OK(event_deinit());
ESP_LOGI(TAG, "test passed...");

11
components/hal/esp32c2/include/hal/clk_gate_ll.h
View File

@@ -226,6 +226,17 @@ static inline void periph_ll_phy_calibration_module_disable_clk_set_rst(void)
DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
}
static inline void periph_ll_coex_module_enable_clk_clear_rst(void)
{
DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_COEX_EN_M);
DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
}
static inline void periph_ll_coex_module_disable_clk_set_rst(void)
{
DPORT_CLEAR_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_COEX_EN_M);
DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
}
#ifdef __cplusplus
}
#endif

4
components/soc/esp32c2/include/soc/Kconfig.soc_caps.in
View File

@@ -775,6 +775,10 @@ config SOC_WIFI_FTM_SUPPORT
bool
default y
config SOC_WIFI_TXOP_SUPPORT
bool
default y
config SOC_WIFI_SUPPORT_VARIABLE_BEACON_WINDOW
bool
default y

1
components/soc/esp32c2/include/soc/periph_defs.h
View File

@@ -38,6 +38,7 @@ typedef enum {
PERIPH_MODEM_RPA_MODULE,
PERIPH_ASSIST_DEBUG_MODULE,
PERIPH_PHY_CALIBRATION_MODULE,
PERIPH_COEX_MODULE,
PERIPH_MODULE_MAX
} periph_module_t;

1
components/soc/esp32c2/include/soc/soc_caps.h
View File

@@ -345,6 +345,7 @@
/*------------------------------------ WI-FI CAPS ------------------------------------*/
#define SOC_WIFI_HW_TSF (1) /*!< Support hardware TSF */
#define SOC_WIFI_FTM_SUPPORT (1) /*!< Support FTM */
#define SOC_WIFI_TXOP_SUPPORT (1) /*!< Support TXOP */
#define SOC_WIFI_SUPPORT_VARIABLE_BEACON_WINDOW (1) /*!< Support delta early time for rf phy on/off */
#define SOC_WIFI_PHY_NEEDS_USB_WORKAROUND (1) /*!< SoC has WiFi and USB PHYs interference, needs a workaround */

6
components/soc/esp32c2/register/soc/syscon_reg.h
View File

@@ -178,8 +178,10 @@ extern "C" {
#define SYSTEM_WIFI_CLK_BT_EN_S 0
/* Mask for clock bits used by both WIFI and Bluetooth, 0, 1, 2, 3, 7, 8, 9, 10, 19, 20, 21, 22, 23 */
#define SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M 0x78078F
/* Mask for clock bits used by phy calibration, bit 22, 29, 30, 31 */
#define SYSTEM_WIFI_CLK_PHY_EN_M 0xE0400000
/* Mask for clock bits used by phy calibration, bit 22, 30, 31 */
#define SYSTEM_WIFI_CLK_PHY_EN_M 0xC0400000
/* Mask for clock bits used by coex, bit 29 */
#define SYSTEM_WIFI_CLK_COEX_EN_M 0x20000000
/* Digital team to check */
//bluetooth baseband bit11

4
components/soc/esp32c3/include/soc/Kconfig.soc_caps.in
View File

@@ -1119,6 +1119,10 @@ config SOC_WIFI_WAPI_SUPPORT
bool
default y
config SOC_WIFI_TXOP_SUPPORT
bool
default y
config SOC_WIFI_CSI_SUPPORT
bool
default y

1
components/soc/esp32c3/include/soc/soc_caps.h
View File

@@ -469,6 +469,7 @@
#define SOC_WIFI_FTM_SUPPORT (1) /*!< Support FTM */
#define SOC_WIFI_GCMP_SUPPORT (1) /*!< Support GCMP(GCMP128 and GCMP256) */
#define SOC_WIFI_WAPI_SUPPORT (1) /*!< Support WAPI */
#define SOC_WIFI_TXOP_SUPPORT (1) /*!< Support TXOP */
#define SOC_WIFI_CSI_SUPPORT (1) /*!< Support CSI */
#define SOC_WIFI_MESH_SUPPORT (1) /*!< Support WIFI MESH */
#define SOC_WIFI_SUPPORT_VARIABLE_BEACON_WINDOW (1) /*!< Support delta early time for rf phy on/off */

4
components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
View File

@@ -1483,6 +1483,10 @@ config SOC_WIFI_WAPI_SUPPORT
bool
default y
config SOC_WIFI_TXOP_SUPPORT
bool
default y
config SOC_WIFI_CSI_SUPPORT
bool
default y

1
components/soc/esp32c5/include/soc/soc_caps.h
View File

@@ -615,6 +615,7 @@
#define SOC_WIFI_FTM_SUPPORT (0) /*!< Support FTM */ // TODO: [ESP32C5] WIFI-6426
#define SOC_WIFI_GCMP_SUPPORT (1) /*!< Support GCMP(GCMP128 and GCMP256) */
#define SOC_WIFI_WAPI_SUPPORT (1) /*!< Support WAPI */
#define SOC_WIFI_TXOP_SUPPORT (1) /*!< Support TXOP */
#define SOC_WIFI_CSI_SUPPORT (1) /*!< Support CSI */
#define SOC_WIFI_MESH_SUPPORT (1) /*!< Support WIFI MESH */
#define SOC_WIFI_HE_SUPPORT (1) /*!< Support Wi-Fi 6 */

4
components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
View File

@@ -1539,6 +1539,10 @@ config SOC_WIFI_WAPI_SUPPORT
bool
default y
config SOC_WIFI_TXOP_SUPPORT
bool
default y
config SOC_WIFI_CSI_SUPPORT
bool
default y

1
components/soc/esp32c6/include/soc/soc_caps.h
View File

@@ -600,6 +600,7 @@
#define SOC_WIFI_FTM_SUPPORT (1) /*!< Support FTM */
#define SOC_WIFI_GCMP_SUPPORT (1) /*!< Support GCMP(GCMP128 and GCMP256) */
#define SOC_WIFI_WAPI_SUPPORT (1) /*!< Support WAPI */
#define SOC_WIFI_TXOP_SUPPORT (1) /*!< Support TXOP */
#define SOC_WIFI_CSI_SUPPORT (1) /*!< Support CSI */
#define SOC_WIFI_MESH_SUPPORT (1) /*!< Support WIFI MESH */
#define SOC_WIFI_HE_SUPPORT (1) /*!< Support Wi-Fi 6 */

4
components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
View File

@@ -1063,6 +1063,10 @@ config SOC_WIFI_WAPI_SUPPORT
bool
default y
config SOC_WIFI_TXOP_SUPPORT
bool
default y
config SOC_WIFI_CSI_SUPPORT
bool
default y

1
components/soc/esp32c61/include/soc/soc_caps.h
View File

@@ -480,6 +480,7 @@
#define SOC_WIFI_FTM_SUPPORT (0) /*!< Support FTM */
#define SOC_WIFI_GCMP_SUPPORT (1) /*!< Support GCMP(GCMP128 and GCMP256) */
#define SOC_WIFI_WAPI_SUPPORT (1) /*!< Support WAPI */
#define SOC_WIFI_TXOP_SUPPORT (1) /*!< Support TXOP */
#define SOC_WIFI_CSI_SUPPORT (1) /*!< Support CSI */
#define SOC_WIFI_MESH_SUPPORT (1) /*!< Support WIFI MESH */
#define SOC_WIFI_HE_SUPPORT (1) /*!< Support Wi-Fi 6 */

4
components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
View File

@@ -1455,6 +1455,10 @@ config SOC_WIFI_WAPI_SUPPORT
bool
default y
config SOC_WIFI_TXOP_SUPPORT
bool
default y
config SOC_WIFI_CSI_SUPPORT
bool
default y

1
components/soc/esp32s3/include/soc/soc_caps.h
View File

@@ -573,6 +573,7 @@
#define SOC_WIFI_FTM_SUPPORT (1) /*!< Support FTM */
#define SOC_WIFI_GCMP_SUPPORT (1) /*!< Support GCMP(GCMP128 and GCMP256) */
#define SOC_WIFI_WAPI_SUPPORT (1) /*!< Support WAPI */
#define SOC_WIFI_TXOP_SUPPORT (1) /*!< Support TXOP */
#define SOC_WIFI_CSI_SUPPORT (1) /*!< Support CSI */
#define SOC_WIFI_MESH_SUPPORT (1) /*!< Support WIFI MESH */
#define SOC_WIFI_SUPPORT_VARIABLE_BEACON_WINDOW (1) /*!< Support delta early time for rf phy on/off */

4
docs/en/api-guides/wifi.rst
View File

@@ -2339,11 +2339,11 @@ Wi-Fi AMSDU
Wi-Fi Fragment
-------------------------
.. only:: esp32 or esp32s2
.. only:: not SOC_WIFI_TXOP_SUPPORT
supports Wi-Fi receiving fragment, but does not support Wi-Fi transmitting fragment.
.. only:: esp32c3 or esp32s3 or esp32c6
.. only:: SOC_WIFI_TXOP_SUPPORT
{IDF_TARGET_NAME} supports Wi-Fi receiving and transmitting fragment.

4
docs/zh_CN/api-guides/wifi.rst
View File

@@ -2315,11 +2315,11 @@ Wi-Fi AMSDU
Wi-Fi 分片
-------------------------
.. only:: esp32 or esp32s2
.. only:: not SOC_WIFI_TXOP_SUPPORT
支持 Wi-Fi 接收分片，但不支持 Wi-Fi 发送分片。
.. only:: esp32c3 or esp32s3 or esp32c6
.. only:: SOC_WIFI_TXOP_SUPPORT
{IDF_TARGET_NAME} 支持 Wi-Fi 接收和发送分片。

2
examples/provisioning/wifi_prov_mgr/partitions.csv
View File

@@ -2,4 +2,4 @@
# Note: if you have increased the bootloader size, make sure to update the offsets to avoid overlap
nvs, data, nvs, , 0x6000,
phy_init, data, phy, , 0x1000,
factory, app, factory, , 0x141000,
factory, app, factory, , 0x142000,
1 # Name, Type, SubType, Offset, Size, Flags
2 # Note: if you have increased the bootloader size, make sure to update the offsets to avoid overlap
3 nvs, data, nvs, , 0x6000,
4 phy_init, data, phy, , 0x1000,
5 factory, app, factory, , 0x141000, factory, app, factory, , 0x142000,