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fix(xtensa): Reset zero overhead loop counter in ISRs

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Konstantin Kondrashov
2026-03-04 09:09:09 +02:00
committed by Konstantin Kondrashov
parent da4584f913
commit a00bb2d1cb
5 changed files with 143 additions and 13 deletions
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components/xtensa/xtensa_context.S
+4 -2
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@@ -3,7 +3,7 @@
*
* SPDX-License-Identifier: MIT
*
* SPDX-FileContributor: 2016-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileContributor: 2016-2026 Espressif Systems (Shanghai) CO LTD
*/
/*
* Copyright (c) 2015-2019 Cadence Design Systems, Inc.
@@ -135,7 +135,9 @@ _xt_context_save:
s32i a3, sp, XT_STK_LBEG
rsr a3, XT_REG_LEND
s32i a3, sp, XT_STK_LEND
rsr a3, XT_REG_LCOUNT
/* Save and disable active zero-overhead loop state while ISR/exception code runs. */
movi a3, 0
xsr a3, XT_REG_LCOUNT /* a3 = LCOUNT, LCOUNT = 0 */
s32i a3, sp, XT_STK_LCOUNT
#endif