mirror of
https://github.com/espressif/esp-idf.git
synced 2026-05-28 16:46:31 +03:00
refactor(hal): graduate emac hal into a new component
- Separate emac from hal component to a new one: esp_hal_emac.
This commit is contained in:
@@ -42,6 +42,7 @@ idf_component_register(SRCS "${srcs}"
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INCLUDE_DIRS ${include}
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LDFRAGMENTS ${ld_fragments}
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REQUIRES esp_event # For using "ESP_EVENT_DECLARE_BASE" in header file
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esp_hal_emac
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PRIV_REQUIRES ${priv_requires})
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if(CONFIG_ETH_ENABLED)
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@@ -25,7 +25,7 @@ typedef enum {
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/**
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* @brief Input RMII Clock from external. EMAC Clock GPIO number needs to be configured when this option is selected.
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*
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* @note See components/soc/esp32(*)/emac_periph.c for available GPIO numbers.
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* @note See components/esp_hal_emac/esp32(*)/emac_periph.c for available GPIO numbers.
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*
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*/
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EMAC_CLK_EXT_IN,
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@@ -36,7 +36,7 @@ typedef enum {
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* @warning ESP32 Errata: If you want the Ethernet to work with Wi-Fi or BT, don’t select ESP32 as RMII CLK output as it would result in clock instability.
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* Applicable only to ESP32, other ESP32 SoCs are not affected.
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*
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* @note See components/soc/esp32(*)/emac_periph.c for available GPIO numbers.
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* @note See components/esp_hal_emac/esp32(*)/emac_periph.c for available GPIO numbers.
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*
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*/
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EMAC_CLK_OUT
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@@ -30,7 +30,7 @@
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#include "freertos/semphr.h"
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#include "hal/emac_hal.h"
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#include "soc/soc.h"
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#include "soc/emac_periph.h"
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#include "hal/emac_periph.h"
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#include "clk_ctrl_os.h"
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#include "sdkconfig.h"
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#include "esp_rom_sys.h"
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@@ -13,7 +13,7 @@
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#include "soc/gpio_sig_map.h"
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#include "soc/io_mux_reg.h"
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#include "soc/gpio_periph.h"
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#include "soc/emac_periph.h"
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#include "hal/emac_periph.h"
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#include "esp_private/gpio.h"
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#include "esp_private/eth_mac_esp_gpio.h"
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#include "esp_private/esp_gpio_reserve.h"
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20
components/esp_hal_emac/CMakeLists.txt
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20
components/esp_hal_emac/CMakeLists.txt
Normal file
@@ -0,0 +1,20 @@
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idf_build_get_property(target IDF_TARGET)
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if(${target} STREQUAL "linux")
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return() # This component is not supported by the POSIX/Linux simulator
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endif()
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# target specific include must be added before the generic one
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set(includes)
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list(APPEND includes "include")
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set(srcs)
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if(CONFIG_SOC_EMAC_SUPPORTED)
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list(APPEND srcs "emac_hal.c")
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list(APPEND srcs "${target}/emac_periph.c")
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list(APPEND includes "${target}/include")
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endif()
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idf_component_register(SRCS ${srcs}
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INCLUDE_DIRS ${includes}
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REQUIRES soc hal)
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52
components/esp_hal_emac/README.md
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52
components/esp_hal_emac/README.md
Normal file
@@ -0,0 +1,52 @@
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# ESP Hardware Abstraction Layer for Ethernet MAC Peripheral
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> [!NOTE]
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> This component is currently in beta. Its API, behavior, and compatibility may change at any time and without notice; backward compatibility is not guaranteed. Use caution when integrating into production systems.
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## Overview
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The `esp_hal_emac` component provides a **Hardware Abstraction Layer** for the Ethernet MAC (EMAC) peripherals across all ESP-IDF supported targets. It serves as a foundation for the higher-level Ethernet drivers, offering a consistent interface to interact with Ethernet MAC hardware while hiding the complexities of chip-specific implementations.
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## Architecture
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The HAL architecture consists of two primary layers:
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1. **HAL Layer (Upper)**: Defines the operational sequences and data structures required to interact with EMAC peripherals, including:
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- Initialization and de-initialization
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- MAC configuration (speed, duplex, promiscuous mode)
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- DMA descriptor management
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- PHY interface management (MII/RMII)
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- Address filtering and frame reception/transmission
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- Flow control and interrupt handling
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2. **Low-Level Layer (Bottom)**: Acts as a translation layer between the HAL and the register definitions in the `soc` component, handling:
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- Register access abstractions
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- Chip-specific register configurations
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- Hardware feature compatibility
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## Features
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- Unified Ethernet MAC interface across all ESP chip families
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- Support for MII and RMII PHY interfaces
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- DMA-based frame transmission and reception
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- MAC address filtering with multiple address support
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- Flow control (pause frame) support
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- Promiscuous mode and multicast filtering
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- Hardware checksum offloading
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- IEEE 1588 PTP (Precision Time Protocol) support on compatible chips
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- Sleep retention support on compatible chips
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- Configurable DMA burst length
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- VLAN tag insertion/removal/replacement
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- IP checksum insertion for TCP/UDP/ICMP headers
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## Usage
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This component is primarily used by ESP-IDF peripheral drivers such as `esp_eth`. It is also utilized by system components that require Ethernet functionality.
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For advanced developers implementing custom Ethernet solutions, the HAL functions can be used directly. However, please note that the interfaces provided by this component are internal to ESP-IDF and are subject to change.
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## Dependencies
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- `soc`: Provides chip-specific register definitions and peripheral information
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- `hal`: Core hardware abstraction utilities and macros
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@@ -416,7 +416,7 @@ esp_err_t emac_hal_ptp_stop(emac_hal_context_t *hal)
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esp_err_t emac_hal_ptp_adj_inc(emac_hal_context_t *hal, int32_t adj_ppb)
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{
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if (emac_ll_get_ts_update_method(hal->ptp_regs) != ETH_PTP_UPDATE_METHOD_FINE ||
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!emac_ll_is_ts_addend_update_done(hal->ptp_regs)) {
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!emac_ll_is_ts_addend_update_done(hal->ptp_regs)) {
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return ESP_ERR_INVALID_STATE;
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}
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/**
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@@ -464,7 +464,7 @@ esp_err_t emac_hal_ptp_adj_inc(emac_hal_context_t *hal, int32_t adj_ppb)
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esp_err_t emac_hal_adj_freq_factor(emac_hal_context_t *hal, double scale_factor)
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{
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if (emac_ll_get_ts_update_method(hal->ptp_regs) != ETH_PTP_UPDATE_METHOD_FINE ||
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!emac_ll_is_ts_addend_update_done(hal->ptp_regs)) {
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!emac_ll_is_ts_addend_update_done(hal->ptp_regs)) {
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return ESP_ERR_INVALID_STATE;
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}
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@@ -529,7 +529,6 @@ esp_err_t emac_hal_ptp_enable_ts4all(emac_hal_context_t *hal, bool enable)
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}
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#endif // SOC_EMAC_IEEE1588V2_SUPPORTED
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void emac_hal_start(emac_hal_context_t *hal)
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{
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/* Enable Ethernet MAC and DMA Interrupt */
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@@ -3,7 +3,7 @@
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "soc/emac_periph.h"
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#include "hal/emac_periph.h"
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#include "soc/io_mux_reg.h"
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const emac_io_info_t emac_io_idx = {
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@@ -134,7 +134,6 @@ extern "C" {
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/* Enable needed DMA interrupts (recv/recv_buf_unavailabal/normal must be enabled to make eth work) */
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#define EMAC_LL_CONFIG_ENABLE_INTR_MASK (EMAC_LL_INTR_RECEIVE_ENABLE | EMAC_LL_INTR_NORMAL_SUMMARY_ENABLE)
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/* Maximum number of MAC address to be filtered */
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#define EMAC_LL_MAX_MAC_ADDR_NUM 8
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@@ -3,7 +3,7 @@
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "soc/emac_periph.h"
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#include "hal/emac_periph.h"
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#include "soc/io_mux_reg.h"
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#if __has_include("soc/emac_reg.h")
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#include "soc/emac_reg.h"
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@@ -465,8 +465,6 @@ static inline void emac_ll_disable_corresponding_emac_intr(emac_mac_dev_t *mac_r
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/*************** End of mac regs operation *********************/
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/************** Start of dma regs operation ********************/
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/* dmabusmode */
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static inline void emac_ll_reset(emac_dma_dev_t *dma_regs)
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@@ -659,7 +657,6 @@ __attribute__((always_inline)) static inline void emac_ll_clear_all_pending_intr
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dma_regs->dmastatus.val = 0xFFFFFFFF;
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}
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/* dmatxpolldemand / dmarxpolldemand */
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static inline void emac_ll_transmit_poll_demand(emac_dma_dev_t *dma_regs, uint32_t val)
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{
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@@ -714,7 +711,8 @@ static inline void emac_ll_ts_all_enable(emac_ptp_dev_t *ptp_regs, bool enable)
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ptp_regs->timestamp_ctrl.en_ts4all = enable;
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}
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static inline void emac_ll_ptp_v2_proc_enable(emac_ptp_dev_t *ptp_regs, bool enable) {
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static inline void emac_ll_ptp_v2_proc_enable(emac_ptp_dev_t *ptp_regs, bool enable)
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{
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ptp_regs->timestamp_ctrl.en_ptp_pkg_proc_ver2_fmt = enable;
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}
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@@ -987,8 +985,7 @@ static inline void emac_ll_clock_enable_ptp(void *ext_regs, soc_periph_emac_ptp_
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{
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uint8_t clk_src_val;
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switch (clk_src)
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{
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switch (clk_src) {
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case EMAC_PTP_CLK_SRC_XTAL:
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clk_src_val = 0;
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break;
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@@ -33,7 +33,6 @@ extern "C" {
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#define EMAC_HAL_DMA_DESC_SIZE (32)
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#endif
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/* DMA descriptor control bits */
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#define EMAC_HAL_TDES0_INTR_ON_COMPLET (1 << 30)
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#define EMAC_HAL_TDES0_CRC_APPEND_DISABLE (1 << 27)
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@@ -189,7 +188,6 @@ typedef struct {
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ASSERT_TYPE_SIZE(eth_dma_rx_descriptor_t, EMAC_HAL_DMA_DESC_SIZE);
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typedef struct emac_mac_dev_s *emac_mac_soc_regs_t;
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typedef struct emac_dma_dev_s *emac_dma_soc_regs_t;
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#if SOC_IS(ESP32)
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@@ -83,6 +83,7 @@ else()
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esp_hal_lcd
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esp_hal_mcpwm
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esp_hal_jpeg
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esp_hal_emac
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LDFRAGMENTS "linker.lf" "app.lf")
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add_subdirectory(port)
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@@ -139,10 +139,6 @@ elseif(NOT BOOTLOADER_BUILD)
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list(APPEND srcs "sdmmc_hal.c")
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endif()
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if(CONFIG_ETH_USE_ESP32_EMAC)
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list(APPEND srcs "emac_hal.c")
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endif()
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if(CONFIG_SOC_ETM_SUPPORTED)
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list(APPEND srcs "etm_hal.c")
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endif()
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@@ -80,9 +80,6 @@ if(CONFIG_SOC_DEBUG_PROBE_SUPPORTED)
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list(APPEND srcs "${target_folder}/debug_probe_periph.c")
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endif()
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if(CONFIG_SOC_EMAC_SUPPORTED)
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list(APPEND srcs "${target_folder}/emac_periph.c")
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endif()
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if(CONFIG_SOC_ETM_SUPPORTED)
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list(APPEND srcs "${target_folder}/etm_periph.c")
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