feat(dma2d,ppa): Support flash encryption for DMA2D and PPA

This commit is contained in:
Song Ruo Jing
2026-02-26 16:39:40 +08:00
parent 29d62fa6ae
commit 9362907287
71 changed files with 499 additions and 165 deletions
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -245,23 +245,23 @@ static inline void dma2d_ll_rx_enable_page_bound_wrap(dma2d_dev_t *dev, uint32_t
* @brief Set 2D-DMA RX channel maximum burst reading data length in bytes
*/
__attribute__((always_inline))
static inline void dma2d_ll_rx_set_data_burst_length(dma2d_dev_t *dev, uint32_t channel, dma2d_data_burst_length_t length)
static inline void dma2d_ll_rx_set_data_burst_length(dma2d_dev_t *dev, uint32_t channel, uint32_t length)
{
uint32_t sel;
switch (length) {
case DMA2D_DATA_BURST_LENGTH_8:
case 8:
sel = 0;
break;
case DMA2D_DATA_BURST_LENGTH_16:
case 16:
sel = 1;
break;
case DMA2D_DATA_BURST_LENGTH_32:
case 32:
sel = 2;
break;
case DMA2D_DATA_BURST_LENGTH_64:
case 64:
sel = 3;
break;
case DMA2D_DATA_BURST_LENGTH_128:
case 128:
sel = 4;
break;
default:
@@ -761,23 +761,23 @@ static inline void dma2d_ll_tx_enable_page_bound_wrap(dma2d_dev_t *dev, uint32_t
* @brief Set 2D-DMA TX channel maximum burst reading data length in bytes
*/
__attribute__((always_inline))
static inline void dma2d_ll_tx_set_data_burst_length(dma2d_dev_t *dev, uint32_t channel, dma2d_data_burst_length_t length)
static inline void dma2d_ll_tx_set_data_burst_length(dma2d_dev_t *dev, uint32_t channel, uint32_t length)
{
uint32_t sel;
switch (length) {
case DMA2D_DATA_BURST_LENGTH_8:
case 8:
sel = 0;
break;
case DMA2D_DATA_BURST_LENGTH_16:
case 16:
sel = 1;
break;
case DMA2D_DATA_BURST_LENGTH_32:
case 32:
sel = 2;
break;
case DMA2D_DATA_BURST_LENGTH_64:
case 64:
sel = 3;
break;
case DMA2D_DATA_BURST_LENGTH_128:
case 128:
sel = 4;
break;
default:
@@ -58,7 +58,6 @@
#define GDMA_LL_AHB_DESC_ALIGNMENT 4
#define GDMA_LL_AXI_DESC_ALIGNMENT 8
#define GDMA_LL_MAX_BURST_SIZE_PSRAM 128 // PSRAM controller doesn't support burst access with size > 128 bytes
#define GDMA_LL_ACCESS_ENCRYPTION_MEM_ALIGNMENT 16 // The alignment of the memory and size when DMA accesses encrypted memory
#if HAL_CONFIG(CHIP_SUPPORT_MIN_REV) >= 300
#define GDMA_LL_AHB_BURST_SIZE_ADJUSTABLE 1 // AHB GDMA supports adjustable burst size