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feat(esp_hw_support): disable all unused pll source in rtc_clk_init to save power
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@@ -34,7 +34,6 @@
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#include "esp_rom_sys.h"
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#include "soc/regi2c_bias.h"
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#include "hal/regi2c_ctrl.h"
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#include "hal/clk_tree_ll.h"
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#include "hal/psram_ctrlr_ll.h"
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ESP_LOG_ATTR_TAG(TAG, "boot.esp32s31");
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@@ -61,11 +60,11 @@ static inline void bootloader_hardware_init(void)
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REGI2C_WRITE_MASK(I2C_BIAS, I2C_BIAS_DREG_1P1, 10);
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REGI2C_WRITE_MASK(I2C_BIAS, I2C_BIAS_DREG_1P1_PVT, 10);
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/* Disable MPLL by default, during mmu_hal_init, a valid clock source is required for the PSRAM,
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so before shutting down mpll, the PSRAM clock source should be selected to an always-on source. */
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/* During mmu_hal_init, a valid clock source is required for the PSRAM,
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so before shutting down MPLL in rtc_clk_init, the PSRAM clock source
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should be selected to an always-on source. */
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_psram_ctrlr_ll_select_clk_source(PSRAM_CTRLR_LL_MSPI_ID_2, PSRAM_CLK_SRC_XTAL);
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_psram_ctrlr_ll_select_clk_source(PSRAM_CTRLR_LL_MSPI_ID_3, PSRAM_CLK_SRC_XTAL);
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clk_ll_mpll_disable();
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}
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void bootloader_enable_cpu_reset_info(void)
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