Mirrors/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-10-01 10:40:47 +03:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'fix/phycfg-check-mask_v5.4' into 'release/v5.4'

Browse Source 
fix(esp_eth): correct PHYCFGR sanity check mask and bit validation (v5.4)

See merge request espressif/esp-idf!47211
This commit is contained in:
Euripedes Rocha
2026-04-22 06:41:39 +02:00
parent 4f84d90001 2716f9ff65
commit 8c4449be1d
1 changed files with 1 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/esp_eth/src/spi/w5500/esp_eth_mac_w5500.c
+1 -1
View File
@@ -544,7 +544,7 @@ static inline bool is_w5500_sane_for_rxtx(emac_w5500_t *emac)
{
uint8_t phycfg;
/* phy is ok for rx and tx operations if bits RST and LNK are set (no link down, no reset) */
if (w5500_read(emac, W5500_REG_PHYCFGR, &phycfg, 1) == ESP_OK && (phycfg & 0x8001)) {
if (w5500_read(emac, W5500_REG_PHYCFGR, &phycfg, 1) == ESP_OK && (phycfg & 0x81) == 0x81) {
return true;
}
return false;